CIRCUIT BOARD

Abstract

Provided is a circuit board having a plurality of fastening holes used to fasten the circuit board to a predetermined part. The circuit board has a plurality of electronic components mounted on a surface thereof, and is fastened to the predetermined part by fasteners inserted into the fastening holes. Around a certain fastening hole, a stress relieving portion for relieving stress is provided in a region that does not intersect with a straight line connecting that fastening hole and another adjacent fastening hole. Thus, a decrease in anti-vibration performance due to a decrease in resonance frequency can be suppressed.

Claims

1. A circuit board fastened to a predetermined part by a fastener, the circuit board having a plurality of fastening holes used to fasten the circuit board to the predetermined part, the fastening holes including a first fastening hole and a second fastening hole, the circuit board comprising a plurality of electronic components mounted on a surface of the circuit board, wherein: the circuit board has a stress relieving portion for relieving stress provided around the first fastening hole; and the stress relieving portion is provided in a region that does not intersect with a straight line connecting the first fastening hole and the second fastening hole located adjacent to the first fastening hole.

2. The circuit board according to claim 1, wherein, around the first fastening hole from which a distance to the second fastening hole is smaller than a predetermined distance, the stress relieving portion is provided in a region intersecting with the straight line.

3. The circuit board according to claim 1, wherein: an electronic component that develops an abnormality when a predetermined distortion stress is applied to the circuit board is disposed on the straight line connecting the first fastening hole and the second fastening hole; and around the first fastening hole and the second fastening hole, the stress relieving portion is provided in a region intersecting with the straight line.

4. The circuit board according to claim 3, wherein the electronic component is an electronic component that develops the abnormality when a distortion stress equivalent to an average value of a degree of distortion that is input into the circuit board in a state of not having the stress relieving portion is applied to the circuit board.

5. The circuit board according to claim 3, wherein the electronic component is a resistor element or an integrated circuit.

6. The circuit board according to claim 1, wherein the stress relieving portion is a through-hole.

7. The circuit board according to claim 1, wherein the stress relieving portion is a recess.

8. The circuit board according to claim 1, further comprising at least one wiring layer that is made of metal and provided inside the circuit board, wherein the stress relieving portion is a region around the fastening hole in which the wiring layer is not provided.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Features, advantages, and technical and industrial significance of exemplary embodiments of the invention will be described below with reference to the accompanying drawings, in which like numerals denote like elements, and wherein:

[0016] FIG. 1 is an exploded perspective view schematically showing the configuration of a PCU 10 equipped with a circuit board of an embodiment;

[0017] FIG. 2 is an illustration schematically showing the configuration of a circuit board 40;

[0018] FIG. 3 is an enlarged view of a fastening hole 42a of the circuit board 40;

[0019] FIG. 4 is a schematic view schematically showing a main part of a circuit board 140 of a modified example;

[0020] FIG. 5 is a schematic view schematically showing a main part of a circuit board 240 of a modified example;

[0021] FIG. 6 is a schematic view schematically showing a main part of a circuit board 340 of a modified example;

[0022] FIG. 7 is a schematic view schematically showing a section of a main part of a circuit board 440 of a modified example; and

[0023] FIG. 8 is a schematic view schematically showing a section of a main part of a circuit board 540 of a modified example.

DETAILED DESCRIPTION OF EMBODIMENTS

[0024] Next, a mode for carrying out the present invention will be described using an embodiment.

[0025] FIG. 1 is an exploded perspective view schematically showing the configuration of a power control unit (hereinafter referred to as a PCU) 10 equipped with a circuit board of the embodiment. FIG. 2 is an illustration schematically showing the configuration of a circuit board 40. FIG. 3 is an enlarged view of a fastening hole 42a of the circuit board 40. As shown in FIG. 1, the PCU 10 includes a power converter 20, the circuit board 40, and a casing 50. For example, the PCU 10 is installed in a hybrid vehicle that runs on power from an engine or power from a motor, and functions as a control device that controls the motor.

[0026] The power converter 20 has a plurality of built-in power elements including a diode and an IGBT that compose a circuit for converting electricity, such as a boost converter or an inverter.

[0027] As shown in FIG. 2, the circuit board 40 has a plurality of electronic components mounted thereon that compose a control circuit for controlling the boost converter or the inverter built in the power converter 20. Examples of the electronic components include a resistor element R, an integrated circuit IC, a connector Cn, an electrolytic capacitor Cap, a coil Coil, and a metal-oxide-semiconductor field-effect transistor (MOSFET; hereinafter referred to as a transistor) M. When a predetermined degree of distortion stress that is determined in advance is applied to the circuit board 40, the resistor element R and the integrated circuit IC are more likely to develop an abnormality, such as cracking, than the electrolytic capacitor Cap, the coil Coil, and the transistor M. The predetermined degree is a degree that is determined in advance as an average value of a degree of distortion input into the circuit board 40 in a state of not having slits S, to be described later, formed therein. In the circuit board 40, fastening holes 42a to 42g and a plurality of slits S (slits S1, S2, etc.) are formed. As shown in FIG. 1, the circuit board 40 is fixed to a mount member 51 of the casing 50 by screws 44a to 44g inserted into the fastening holes 42a to 42g.

[0028] As shown in FIG. 3, the fastening holes 42a to 42g have a diameter of a value D1 (e.g., 4 mm, 5 mm, or 6 mm) and are formed so as to extend through the circuit board 40. As shown in FIG. 2 and FIG. 3, the slits S are formed around the fastening holes 42a to 42e. The slits S1, S2 around the fastening hole 42a are formed so as to extend through the circuit board 40, at positions separated from the fastening hole 42a by a distance D2 (e.g., 3.0 mm, 3.5 mm, or 4.0 mm), and have an arc shape with a width W (e.g., 0.8 mm, 1.0 mm, or 1.2 mm) and an arc length of a value L (e.g., 5 mm, 6 mm, or 7 mm). The slit S2 is disposed at a position defined by turning the slit S1 90 degrees around a central axis of the fastening hole 42a as a rotational axis. The slits S around the fastening holes 42b to 42e are formed in the same shape as the slits S1, S2. When the slits S are disposed around the fastening holes 42b to 42e, the slits S are disposed such that one slit S is located at a position defined by turning the other slit S 90 degrees around the central axis of the fastening hole 42a as the rotational axis. Details of the arrangement of the slits S will be described later.

[0029] The casing 50 includes cases 52, 54, a lid member 56, and a bottom member 58. The power converter 20 is housed in the case 52, and the case 52 is fitted in the case 54 in a state of being closed at a lower side as seen in FIG. 1 by the bottom member 58. The circuit board 40 is fixed to an upper side as seen in FIG. 1 of the mount member 51 inside the case 54, and the case 52 housing the power converter 20 is fitted in the case 54 from the lower side as seen in FIG. 1 and fixed to the mount member 51.

[0030] Here, the arrangement of the slits S formed around the fastening holes 42a to 42e of the circuit board 40 will be described by using the fastening hole 42a as an example. The arrangement of the slits S is determined after the arrangement of the fastening holes 42a to 42g and the electronic components of the circuit board 40 is determined.

[0031] First, a distance Dh between the fastening hole 42a and adjacent fastening holes (fastening holes 42b, 42c and 42d) is measured. When the distance Dh is smaller than a predetermined distance Dref, the slit S is formed so as to overlap a straight line Lref connecting the center of the fastening hole 42a and the center of the adjacent fastening hole, without avoiding the straight line Lref. In this embodiment, the straight line Lref is a straight line connecting the center of the fastening hole 42a and the center of the adjacent fastening hole. However, the straight line Lref is not limited to the straight line connecting the center of the fastening hole 42a and the center of the adjacent fastening hole, and may be any straight line that connects a certain position in the fastening hole 42a and a certain position in the adjacent fastening hole. The predetermined distance Dref is determined in advance by experiment, analysis, etc. as a distance at which the likelihood of resonance of the circuit board 40 in response to low-frequency vibration starts to increase, because of a decrease in the rigidity of a region between the fastening hole 42a and the adjacent fastening hole due to formation of the slit S, and because of a significant decrease in the resonance frequency of the circuit board 40 occurring when the circuit board 40 is fixed to the casing 50 by the screws 44a to 44g inserted into the fastening holes 42a to 42g. When the distance Dh is smaller than the predetermined distance Dref, the resonance frequency of the circuit board 40 does not significantly decrease even when the slit S is formed at a position overlapping the straight line Lref. From the viewpoint of reducing the distortion of the circuit board 40, it is desirable that the slit S be formed as far as possible between two fastening holes. Therefore, when the distance Dh is smaller than the predetermined distance Dref, the slit S can be formed at a position overlapping the straight line Lref, such that, when distortion stress is applied to the circuit board 40, the resulting stress on the circuit board 40 can be relieved by the slit S. As a result, the distortion of the circuit board 40 can be suppressed.

[0032] When the distance Dh is equal to or larger than the predetermined distance Dref and the resistor element R or the integrated circuit IC is disposed on the straight line Lref, the slit S is formed so as to overlap the straight line Lref, without avoiding the straight line Lref. The resistor element R and the integrated circuit IC are more susceptible to distortion stress than the electrolytic capacitor Cap, the coil Coil, the transistor M, and the connector Cn. Therefore, when the distance Dh is equal to or larger than the predetermined distance Dref and the resistor element R or the integrated circuit IC is disposed on the straight line Lref, the slit S can be formed such that, when distortion stress is applied to the circuit board 40, the resulting stress on the circuit board 40 can be relieved by the slit S. As a result, it is possible to suppress the distortion of the circuit board 40 and at the same time protect the electronic components that are susceptible to distortion stress, such as the resistor element R and the integrated circuit IC.

[0033] When the distance Dh is equal to or larger than the predetermined distance Dref and the electrolytic capacitor Cap, the coil Coil, or the transistor M is disposed on the straight line Lref or no electronic component is disposed on the straight line Lref, the slit S is formed so as to avoid the straight line Lref. The electrolytic capacitor Cap, the coil Coil, the transistor M, and the connector Cn are less susceptible to distortion stress than the resistor element R and the integrated circuit IC. Therefore, when the distance Dh is equal to or larger than the predetermined distance Dref and the electrolytic capacitor Cap, the coil Coil, or the transistor M is disposed on the straight line Lref or no electronic component is disposed on the straight line Lref, the slit S can be formed so as to avoid the straight line to thereby form a beam between the fastening hole 42a and the adjacent fastening hole. A beam formed between the fastening hole 42a and the adjacent fastening hole enhances the rigidity of the region between the fastening hole 42a and the adjacent fastening hole, so that a decrease in the resonance frequency of the circuit board 40 can be suppressed. As a result, resonance of the circuit board 40 occurring when low-frequency vibration is input into the circuit board 40 can be suppressed, and thus a decrease in the anti-vibration performance can be suppressed.

[0034] With the above considerations in mind, the slits S1, S2 are formed around the fastening hole 42a so as to avoid the straight line Lref connecting the center of the fastening hole 42a and the center of the fastening hole 42c (the distance Dh to the fastening hole 42c is equal to or larger than the predetermined distance Dref and the transistor M is disposed on the straight line Lref), and so as to overlap the straight lines Lref connecting the center of the fastening hole 42a and the centers of the fastening holes 42b, 42d (the distance Dh to each of the fastening holes 42b, 42d is equal to or larger than the predetermined distance Dref and the electrolytic capacitor Cap, the coil Coil, or the transistor M is not disposed on the straight lines Lref). The slits S are formed around the fastening holes 42b to 42e in the same manner.

[0035] Around the fastening holes 42a, 42b, 42d to 42g that are formed at positions close to edges of the circuit board 40, no slit S is formed in regions that are close to the edges of the circuit board 40. This is because the regions close to the edges of the circuit board 40 are likely to chip or crack due to vibration, and therefore a decrease in the rigidity of those regions close to the edges needs to be suppressed. Thus, a decrease in the anti-vibration performance can be further suppressed.

[0036] According to the PCU 10 equipped with the circuit board 40 of the embodiment having been described above, when the distance Dh between one of the fastening holes 42a to 42g and an adjacent fastening hole is equal to or larger than the predetermined distance Dref and the electrolytic capacitor Cap, the coil Coil, or the transistor M is disposed on the straight line Lref or no electronic component is disposed on the straight line Lref, the slit S is formed so as to avoid the straight line Lref. Thus, a decrease in the anti-vibration performance of the circuit board 40 due to a decrease in the resonance frequency thereof can be suppressed.

[0037] On the other hand, when the distance Dh is smaller than the predetermined distance Dref, the slit S is formed so as to overlap the straight line Lref connecting one of the fastening holes 42a to 42g and an adjacent fastening hole, without avoiding the straight line Lref. Thus, the distortion of the circuit board 40 can be suppressed.

[0038] Moreover, when the distance Dh is equal to or larger than the predetermined distance Dref and the resistor element R or the integrated circuit IC is disposed on the straight line Lref, the slit S is formed so as to overlap the straight line Lref, without avoiding the straight line Lref. Thus, the distortion of the circuit board 40 can be suppressed.

[0039] In the PCU 10 equipped with the circuit board 40 of the embodiment, when the distance Dh is equal to or larger than the predetermined distance Dref and the electrolytic capacitor Cap, the coil Coil, or the transistor M is disposed on the straight line Lref or no electronic component is disposed on the straight line Lref, the slit S is formed so as to avoid the straight line Lref. However, the slit S may be uniformly formed so as to avoid the straight line Lref, regardless of whether the distance Dh is equal to or larger than the predetermined distance Dref, of what type of electronic component is disposed on the straight line Lref, or of whether an electronic component is disposed on the straight line Lref.

[0040] In the PCU 10 equipped with the circuit board 40 of the embodiment, the arc-shaped slits S are formed around the fastening holes 42a to 42d. However, the slits S may have any shape that can relieve stress on the circuit board 40. For example, rectangular slits S may be adopted as illustrated in a circuit board 140 of a modified example of FIG. 4. Or one or more circular slits S may be formed around each of the fastening holes 42a to 42d as illustrated in a circuit board 240 of a modified example of FIG. 5.

[0041] In the PCU 10 equipped with the circuit board 40 of the embodiment, the arc-shaped slits S are formed at a 90-degree interval around the fastening holes 42a to 42d. However, the arc-shaped slits S may be formed at an interval smaller than 90 degrees around the fastening holes 42a to 42d as illustrated in a circuit board 340 of a modified example of FIG. 6.

[0042] In the PCU 10 equipped with the circuit board 40 of the embodiment, the slits S are formed as through-holes extending through the circuit board 40 around the fastening holes 42a to 42d. However, what is essential is to form a structure around the fastening holes 42a to 42d that relieves stress on the circuit board 40. Therefore, as illustrated in a circuit board 440 of a modified example of FIG. 7, instead of the slits S, recesses Re may be formed on both sides of the circuit board 440, around the fastening holes 42a to 42d. The recesses Re may be formed on either both sides or only one side of the circuit board 440. Further, as illustrated in a circuit board 540 of a modified example of FIG. 8, in the case where the circuit board 540 is a multilayer board in which wiring layers M1 to M4 are sequentially formed inside an insulation material Is in a depth direction, instead of the slits S, regions Rnm having no wiring layer may be formed around the fastening holes 42a to 42d by removing portions of the wiring layers M1 to M4 around the fastening holes 42a to 42d.

[0043] In the PCU 10 equipped with the circuit board 40 of the embodiment, when the distance Dh is equal to or larger than the predetermined distance Dref and the resistor element R or the integrated circuit IC is disposed on the straight line Lref, the slit S is formed so as to overlap the straight line Lref, without avoiding the straight line Lref. However, when the distance Dh is equal to or larger than the predetermined distance Dref and an electronic component that is different from the resistor element R or the integrated circuit IC but develops an abnormality when a predetermined distortion stress is applied to the circuit board 40 is disposed on the straight line Lref, the slit S may be formed so as to overlap the straight line Lref, without avoiding the straight line Lref.

[0044] The fastening holes 42a to 42d in the embodiment are an example of the fastening holes. The slit S is an example of the stress relieving portion.

[0045] Since the embodiment is one example for specifically describing the mode for carrying out the disclosure described in SUMMARY, the correspondence relationship between the main elements of the embodiment and the main elements of the disclosure described in SUMMARY does not limit the elements of the disclosure described in that section. Therefore, the disclosure described in SUMMARY should be interpreted based on the description in that section, and the embodiment is merely one specific example of the disclosure described in SUMMARY.

[0046] While the mode for carrying out the present disclosure has been described above by using the embodiment, it should be understood that the present disclosure is in no way limited to this embodiment and can be carried out in various modes within the scope of the gist of the disclosure.

[0047] The present disclosure is applicable to the circuit board manufacturing industry and the like.