COMMUTATION CELL, FLYING CAPACITOR MODULE AND MULTILEVEL CONVERTER

Abstract

A commutation cell for a flying capacitor module, to a flying capacitor module having the commutation cell and to a multi-level converter having the flying capacitor module is disclosed. The commutation cell includes a circuit board, two semiconductors mounted either on the same side or on opposite sides of the circuit board, four capacitors arranged in pairs on opposite sides of the circuit board, and flying capacitors connected to the input and output sides of the commutation cell, respectively. The capacitors located on opposite sides are connected to one another by way of via holes. Different commutation paths between the various capacitors extend on the first side and on the second side of the circuit board and along the vias, with currents flowing through the respective adjacent capacitors in opposing directions for an overall reduction in the parasitic inductances.

Claims

1-13. (canceled)

14. A commutation cell for a flying capacitor module, the commutation cell comprising: a circuit board having a first side and an opposite second side; a first semiconductor comprising a first terminal connected to a first d.c. voltage phase and a second terminal; a second semiconductor comprising a third terminal connected to a second d.c. voltage phase and fourth terminal; a first capacitor and a second capacitor formed as low-inductance commutation capacitors and connected in parallel between the first and third terminal; a third capacitor and a fourth capacitor formed as low-inductance commutation capacitors and connected in parallel between the second and fourth terminal, wherein for an overall reduction in the parasitic inductances the second and fourth capacitors are arranged on the first side and the first and third capacitors are arranged on the second side of the circuit board, with the first and third capacitors being connected to the second and fourth capacitors at the terminals by vias, the first and third capacitors form a first commutation path on the first side, the second and the fourth capacitors form a second commutation path on the second side, the second and the third capacitors form a third commutation path and the first and the fourth capacitors form a fourth commutation path, with the third and fourth commutation paths being formed along the vias and on the first and second sides; and the commutation cell further comprising a first flying capacitor connected between the first d.c. voltage phase and the second d.c. voltage phase in parallel with the first and second capacitors on an input side of the commutation cell; and a second flying capacitor connected between the first d.c. voltage phase and the second d.c. voltage phase in parallel with the third and fourth capacitor on an output side of the commutation cell.

15. The commutation cell of claim 14, wherein the first semiconductor and the second semiconductor are arranged on one of the first side or the second side of the circuit board.

16. The commutation cell of claim 14, wherein the first semiconductor is arranged on the first side of the circuit board and the second semiconductor is arranged on the second side of the circuit board.

17. The commutation cell of claim 14, wherein the first, second, third and fourth terminals are formed as multiple parts.

18. The commutation cell of claim 14, wherein both the first semiconductor and the second semiconductor are GaN semiconductors.

19. The commutation cell of claim 14, wherein during a commutation operation, a current flows through the first capacitor and the third capacitor along the first commutation path in a first direction, and the current flows through the second capacitor and the fourth capacitor along the second commutation path in a second direction opposite the first direction.

20. The commutation cell of claim 14, wherein first sections of the third and fourth commutation paths that extend through the vias are arranged orthogonally to second sections of the first and second commutation paths that are routed along the first side or the second side of the circuit board.

21. A flying capacitor module, comprising: a commutation cell as set forth on claim 14; and a third semiconductor connected in series with a fourth semiconductor at a center tap forming a first a.c. voltage phase with a serial connection connected between the first d.c. voltage phase and the second d.c. voltage phase in parallel with the second flying capacitor facing away from the second flying capacitor and from the output side of the commutation cell.

22. The flying capacitor module of claim 21, further comprising: a further said commutation cell, said further commutation cell being connected in parallel with the first flying capacitor at the first d.c. voltage phase and the second d.c. voltage phase, with the first flying capacitor is arranged between the further commutation cell and the commutation cell, and a further flying capacitor connected in parallel with and on the input side to the further commutation cell between the first d.c. voltage phase and the second d.c. voltage phase.

23. A multilevel converter, comprising a flying capacitor module as set forth in claim 21, wherein the first and second d.c. voltage phases of the flying capacitor module are connected to a d.c. voltage intermediate circuit of the multilevel converter, said flying capacitor module being connected via a supply line to a supply grid by way of the d.c. voltage intermediate circuit, wherein a first a.c. voltage phase is connected via an a.c. voltage line to an energy consumer or to an energy generator.

24. The multilevel converter of claim 23, further comprising additional second and third flying capacitor modules, each constructed as a flying capacitor module as set forth in claim 21, wherein the additional second and third flying capacitor modules are each connected to the d.c. voltage intermediate circuit by way of their respective first and second d.c. voltage phases, said additional second flying capacitor module having a second a.c. voltage phase and said additional third flying capacitor module having a third a.c. voltage phase, wherein the second and third a.c. voltage phases are each connected to the a.c. voltage line, and wherein the additional second and third flying capacitor modules are each connected to the supply grid by way of the d.c. voltage intermediate circuit and the supply line and to the energy consumer or the energy generator by way of the a.c. voltage line.

Description

[0035] The above-described properties, features and advantages of this invention and the manner in which they are achieved will become clearer and more readily understandable in connection with the following description of the exemplary embodiments, which are explained in greater detail in connection with the figures, in which:

[0036] FIG. 1 shows a schematic representation of a circuit of a flying capacitor module with a known commutation cell,

[0037] FIG. 2 shows a first schematic representation of the commutation cell in accordance with FIG. 1 with a single commutation path,

[0038] FIG. 3 shows a second schematic representation of the commutation cell in accordance with FIG. 1 with a further single commutation path,

[0039] FIG. 4 shows a schematic partial representation of an inventive commutation cell,

[0040] FIG. 5 shows a first schematic partial representation of the inventive commutation cell which is supplementary to FIG. 4,

[0041] FIG. 6 shows a second schematic partial representation of the inventive commutation cell which is supplementary to FIG. 4 and FIG. 5,

[0042] FIG. 7 shows a third schematic partial representation of the inventive commutation cell which is supplementary to FIG. 4 and FIG. 5,

[0043] FIG. 8 shows a schematic representation of a circuit of an inventive flying capacitor module with the inventive commutation cell in accordance with FIG. 4 to FIG. 7, and

[0044] FIG. 9 shows a schematic representation of an inventive multilevel converter with an inventive flying capacitor module and the inventive commutation cell of the flying capacitor module for operation of an energy generator or energy consumer by means of the multilevel converter on a supply grid.

[0045] FIG. 1 shows a schematic representation of a circuit of a flying capacitor module 102 with a known commutation cell 101. This flying capacitor module 102 can generate three voltage levels and is hence referred to as a 3-level flying capacitor module 102.

[0046] The commutation cell 101 here comprises in the circuit of FIG. 1 a first semiconductor 103 with a first and second terminal 104,105 and a second semiconductor 106 with a third and fourth terminal 107,108. Furthermore, the commutation cell 101 in this circuit also has a first and second capacitor 109,110.

[0047] The first semiconductor 103 is connected in a first d.c. voltage phase 114 and the second semiconductor 106 is connected in a second d.c. voltage phase 115.

[0048] The first capacitor 109 is connected between the first and third terminal 104,107 and the second capacitor 110 is connected between the second and fourth terminal 105,108.

[0049] A first flying capacitor 126 is connected at an input side 128 of the commutation cell 101, and in parallel with the first capacitor 109 of the commutation cell 101, between the first d.c. voltage phase 114 and the second d.c. voltage phase 115.

[0050] A second flying capacitor 127 is connected at an output side 129 of the commutation cell 101, and in parallel with the second capacitor 110 of the commutation cell 101, between the first d.c. voltage phase 114 and the second d.c. voltage phase 115.

[0051] A third and a fourth semiconductor 130,131 are connected in series in parallel with the second flying capacitor 127, facing away from the output side of the commutation cell 101 and the second flying capacitor 127, between the first and the second d.c. voltage phase 114,115.

[0052] A center tap 132 for a connection to a first a.c. voltage phase 133 is formed between the third and fourth semiconductor 130,131.

[0053] FIG. 2 shows a first schematic representation of the commutation cell 101 in accordance with FIG. 1 with a commutation path 122. The connection of the commutation cell 1 to the components shown in FIG. 2, which here are arranged on a first side 116 of a circuit board 113, can be taken analogously from FIG. 1.

[0054] The commutation path 122 is formed laterally along the first side 116 of the circuit board 113 and additionally shows two opposing directions I.sub.1,I.sub.2 of a current I flowing along the commutation path 122.

[0055] FIG. 3 discloses a second schematic representation of the commutation cell in accordance with FIG. 1 with a further commutation path 123. The connection of the commutation cell 1 to the components shown in FIG. 3, which here are arranged on a first and second side 116,117 of a circuit board 113, can be taken analogously from FIG. 1.

[0056] The first and the second semiconductor 103,105 and the second capacitor 110 are here arranged in the exemplary embodiment on the first side 116 of the circuit board 113. The first capacitor 109 is arranged on a second side 117 of the circuit board 113. The connection of the components takes place by way of a first and a second via 118,119.

[0057] The commutation path 123 is formed laterally along the first and the second side 116,117 of the circuit board 113 and orthogonally thereto by way of the first and the second via 118,119 and additionally shows two opposing directions I.sub.1,I.sub.2 of a current I flowing along the commutation path 123.

[0058] FIG. 4 shows a schematic partial representation of an inventive commutation cell 1.

[0059] The overall representation of the inventive commutation cell 1 comprises FIGS. 4 to 7. The schematic of the commutation cell 1 for FIGS. 4 to 7 can be taken from FIG. 8.

[0060] A first and a second semiconductor 3,6 and a first and a third capacitor 9,11 are arranged and electrically connected on a first side 16 of a circuit board 13.

[0061] The first semiconductor 3 is connected in the first d.c. voltage phase 14 and the second semiconductor 6 is connected in the second d.c. voltage phase 15. The first capacitor 9 is connected between the first terminal 4 of the first semiconductor 3 and the third terminal 7 of the second semiconductor 6. The third capacitor 11 is connected between the second terminal 5 of the first semiconductor 3 and the fourth terminal 8 of the second semiconductor 6.

[0062] A first commutation path 24 is formed in FIG. 4 with its second sections 43 fully laterally along the first side 16 of the circuit board 13 and in the first commutation path 22 additionally shows two opposing directions I.sub.1,I.sub.2 of the current I flowing in the capacitors 9,11.

[0063] A second commutation path 23 is formed in FIG. 4 with its second sections 43 at least partially laterally along the first side 16 of the circuit board 13. The second commutation path 23 is routed on a second side of the circuit board 13 facing away from the first side 16 of the circuit board 13 (not shown in FIG. 4) by way of vias 18,19,20,21, which can be taken from FIG. 5.

[0064] FIG. 5 discloses a first schematic partial representation of the inventive commutation cell 1 supplementary to FIG. 4.

[0065] FIG. 5 shows the second side 17 of the circuit board 13, which corresponds to the circuit board 13 shown in FIG. 4. FIG. 5 should in this case be viewed from the same perspective (from above) as FIG. 4, as if the circuit board 13 were transparent.

[0066] A second capacitor 10 and a fourth capacitor 12 are electrically connected to the components arranged on the first side 16 of the circuit board 13 by way of the vias 18,19,20,21.

[0067] In this case the second and fourth capacitor 10,12 are connected in parallel between the first d.c. voltage phase 14 and the second d.c. voltage phase 15.

[0068] The second commutation path 23 is formed in FIG. 5 with its second sections 43 laterally along the second side 17 of the circuit board 13 and in the second commutation path 23 additionally shows two opposing directions I.sub.1,I.sub.2 of the current I flowing in the capacitors 10,12.

[0069] The second commutation path 23 is routed onto the first side 16 of the circuit board 13 (not shown in FIG. 4) by way of the vias 18,19,20,21, which can be taken from FIG. 4.

[0070] FIGS. 4 and 5 each show a first and a second line of intersection 44,45, wherein the first line of intersection 44 corresponds to a sectional view in FIG. 6 and the second line of intersection 45 corresponds to a sectional view in FIG. 7.

[0071] FIG. 6 shows a second schematic partial representation of the inventive commutation cell 1 which is supplementary to FIG. 4 and FIG. 5.

[0072] FIG. 6 corresponds to a sectional view at the first line of intersection 44 from FIG. 4 and FIG. 5.

[0073] The electrical connection of both the semiconductors 3 and 6 and of both the capacitors 10,11 can also be taken from the circuit shown in FIG. 8.

[0074] Only the second capacitor 10 is arranged on the second side 17 of the circuit board 13.

[0075] In FIG. 6 a third commutation path 24 can be seen, which runs through the vias 19,21, both the semiconductors 3,6 and the second and the third capacitor 10,11.

[0076] The third commutation path 24 is formed with its second sections 43 laterally along the first and second side 16,17 of the circuit board 13 but is also formed orthogonally with its first sections 42 by means of the vias 19,21 through the circuit board 13. In addition, the third commutation path 24 shows two opposing directions I.sub.1,I.sub.2 of the current I flowing in the capacitors 10,11.

[0077] FIG. 7 shows a third schematic partial representation of the inventive commutation cell which is supplementary to FIG. 4 and FIG. 5.

[0078] FIG. 7 corresponds to a sectional view at the second line of intersection 45 from FIG. 4 and FIG. 5.

[0079] The electrical connection of both the semiconductors 3 and 6 and of both the capacitors 9 and 10 can also be taken from the circuit shown in FIG. 8.

[0080] FIG. 7 shows a fourth commutation path 25, which runs through the vias 18,20, both the semiconductors 3,6 and the first and fourth capacitor 9,12.

[0081] Only the fourth capacitor 12 is arranged on the second side 17 of the circuit board 13.

[0082] The fourth commutation path 25 is formed with its second sections 43 laterally along the first and second side 16,17 of the circuit board 13 but is also formed orthogonally with its first sections 42 by means of the vias 18,20 through the circuit board 13. In addition, the fourth commutation path 25 shows two opposing directions I.sub.1,I.sub.2 of the current I flowing in the capacitors 9,12.

[0083] FIG. 8 shows a schematic representation of a circuit of an inventive flying capacitor module 2 with the inventive commutation cell 1 in accordance with FIG. 4 to FIG. 7.

[0084] The commutation cell 101 here comprises in the circuit of FIG. 8 a first semiconductor 3 with a first and second terminal 4,5 and a second semiconductor 6 with a third and fourth terminal 7,8. Furthermore, the commutation cell 101 in this circuit also has a first, second, third and fourth capacitor 9,10,11,12.

[0085] The first semiconductor 3 is connected in a first d.c. voltage phase 14 and the second semiconductor 6 is connected in a second d.c. voltage phase 15.

[0086] The first and the second capacitor 9,10 are connected to one another in parallel between the first and third terminal 4,7 and the third and fourth capacitor 11,12 are connected to one another in parallel between the second and fourth terminal 5,8.

[0087] A first flying capacitor 26 is connected at an input side 28 of the commutation cell 1, and in parallel with the first capacitor 9 of the commutation cell 1 between the first d.c. voltage phase 14 and the second d.c. voltage phase 15.

[0088] A second flying capacitor 27 is connected at an output side 29 of the commutation cell 1, and in parallel with the fourth capacitor 12 of the commutation cell 1 between the first d.c. voltage phase 14 and the second d.c. voltage phase 15.

[0089] A third and a fourth semiconductor 30,31 are connected in series in parallel with the second flying capacitor 27, facing away from the output side of the commutation cell 1 and the second flying capacitor 27 between the first and the second d.c. voltage phase 14,15.

[0090] A center tap 32 for a connection to a first a.c. voltage phase 33 is formed between the third and fourth semiconductor 30,31.

[0091] FIG. 9 discloses a schematic representation of an inventive multilevel converter 35 with an inventive flying capacitor module 2 and the inventive commutation cell 1 of the flying capacitor module 2 for operation of an energy consumer 39 or energy generator 40 by means of the multilevel converter 35 at a supply grid 38.

[0092] In this exemplary embodiment the multilevel converter 35 has a flying capacitor module 2 for single-phase operation, wherein the flying capacitor module 2 has at least one commutation cell 1, as is required for example for 3-level operation. The commutation cell 1 is connected to the d.c. voltage intermediate circuit 36 at or in the flying capacitor module 2 by way of the first and the second d.c. voltage phase 14,15.

[0093] Whether a d.c. voltage is provided by the supply grid 38 by way of the supply line 41 to the multilevel converter 35 and accordingly also to the flying capacitor module 2, which ideally can be fed into the d.c. voltage intermediate circuit 35 without conversion, or whether the electrical energy first has to be converted from an a.c. voltage from the supply grid 38 to a d.c. voltage for the d.c. voltage intermediate circuit, is left open here. Both are possible.

[0094] The energy consumer 39 or the energy generator 40 can be operated at the supply grid 38 by way of an a.c. voltage phase 33 of the flying capacitor module 2, which has the commutation cell 1, by means of the a.c. voltage line 37 connected to the multilevel converter 35 and the flying capacitor module 2.