Method and apparatus for polishing a substrate

Abstract

A polishing method is used for polishing a substrate such as a semiconductor wafer to a flat mirror finish. A method of polishing a substrate by a polishing apparatus includes a polishing table (100) having a polishing surface, a top ring (1) for holding a substrate and pressing the substrate against the polishing surface, and a vertically movable mechanism (24) for moving the top ring (1) in a vertical direction. The top ring (1) is moved to a first height before the substrate is pressed against the polishing surface, and then the top ring (1) is moved to a second height after the substrate is pressed against the polishing surface.

Claims

1. An apparatus for polishing a substrate, the apparatus comprising: a controller; a polishing table having a polishing surface; a top ring configured to hold a rear face of the substrate by a substrate holding surface and to hold an outer peripheral edge of the substrate by a retainer ring, and configured to press the substrate against the polishing surface; and a vertically movable mechanism configured to move the top ring in a vertical direction, wherein the top ring comprises at least one elastic membrane constituting the substrate holding surface and forming a plurality of pressure chambers that are configured to be supplied with a pressurized fluid, and a top ring body for holding the elastic membrane, the elastic membrane being configured to press the substrate against the polishing surface under a fluid pressure when the plurality of pressure chambers are supplied with the pressurized fluid, and wherein the controller is configured to remove the substrate from the elastic membrane by concurrently pressurizing at least one of the plurality of pressure chambers and depressurizing at least another one of the plurality of pressure chambers into a vacuum state.

2. The apparatus according to claim 1, wherein the elastic membrane has a plurality of concentric partition walls, a circular central chamber, an annular ripple chamber, an annular outer chamber and an annular edge chamber, as the plurality of pressure chambers, are defined by the partition walls between an upper surface of the elastic membrane and a lower surface of the top ring body, the central chamber is located at a central portion of the top ring body, and the annular ripple chamber, the annular outer chamber and the annular edge chamber are concentrically located in order from the central portion to a peripheral portion of the top ring body, and the controller is configured to remove the substrate from the elastic membrane by concurrently pressurizing the annular ripple chamber and depressurizing the central chamber, the annular outer chamber and the annular edge chamber.

3. The apparatus according to claim 2, wherein the controller is configured to remove the substrate from the elastic membrane by concurrently pressurizing the annular ripple chamber and depressurizing the annular outer chamber.

4. The apparatus according to claim 1, further comprising a substrate transfer apparatus configured to support the substrate when the substrate is removed from the top ring.

5. The apparatus according to claim 4, wherein the substrate transfer apparatus comprises a top ring guide configured to fit to an outer peripheral surface of the retainer ring to center the top ring with the substrate transfer apparatus, a pusher stage for supporting the substrate when the substrate is transferred between the top ring and the substrate transfer apparatus, a first mechanism for vertically moving the pusher stage, and a second mechanism for vertically moving the pusher stage and the top ring guide.

6. The apparatus according to claim 5, wherein the substrate transfer apparatus further comprises a plurality of release nozzles for ejecting a fluid to remove the substrate from the top ring.

7. The apparatus according to claim 6, wherein the plurality of release nozzles are provided at certain intervals in a circumferential direction of the top ring guide.

8. The apparatus according to claim 6, wherein the plurality of release nozzles are configured to eject a mixed fluid of pressurized nitrogen and pure water, or only a pressurized gas, or only a pressurized liquid.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) FIG. 1 is a schematic view showing an entire structure of a polishing apparatus according to an embodiment of the present invention;

(2) FIG. 2 is a schematic cross-sectional view showing a top ring constituting a polishing head for holding a semiconductor wafer as an object to be polished and pressing the semiconductor wafer against a polishing surface on a polishing table;

(3) FIG. 3 is a flowchart of a series of polishing processes of the polishing apparatus according to the present embodiment;

(4) FIGS. 4A, 4B and 4C are schematic views showing a membrane height;

(5) FIG. 5 is a schematic view showing the state of the top ring which vacuum-chucks the semiconductor wafer before the top ring is lowered;

(6) FIG. 6 is a schematic view showing the state of the top ring which vacuum-chucks the semiconductor wafer and is lowered, with a large clearance between the semiconductor wafer and the polishing pad left;

(7) FIG. 7A is a schematic view showing deformation state of the semiconductor wafer in the case where application of the pressure is started from the state of a large clearance between the semiconductor wafer and the polishing pad as shown in FIG. 6;

(8) FIG. 7B is a graph showing deformation quantity of the semiconductor wafer in the case where application of the pressure is started from the state of a large clearance between the semiconductor wafer and the polishing pad;

(9) FIG. 7C is a view showing a passage communicating with the ripple chamber as a means for improving the pressure responsiveness of the ripple chamber;

(10) FIG. 8 is a view showing a first aspect of the present invention, and is a schematic view showing the case in which the top ring holding the wafer under vacuum is lowered and there is a small clearance between the wafer and the polishing pad;

(11) FIG. 9A is a schematic cross-sectional view showing the state in which application of the pressure to the membrane is started from the state of a small clearance between the wafer and the polishing pad;

(12) FIG. 9B is a graph showing deformation quantity of the wafer in the case where application of the pressure is started from the state of a small clearance between the wafer and the polishing pad;

(13) FIG. 10 is a schematic view showing the state in which the top ring is moved from the state shown in FIG. 9A to an optimum height in order to obtain desired polishing profile;

(14) FIG. 11 is a view showing a second aspect of the present invention, and is a schematic view showing the case in which the top ring holding the wafer under vacuum is lowered and there is a large clearance between the wafer and the polishing pad;

(15) FIG. 12A is a schematic cross-sectional view showing the state in which application of the pressure to the membrane is started from the state of a high membrane height;

(16) FIG. 12B is a graph showing deformation quantity of the wafer in the case where application of the pressure is started from the state of a large clearance between the wafer and the polishing pad;

(17) FIG. 13 is a schematic view showing the case in which a substantial polishing is performed in the state shown in FIG. 12A without moving the top ring;

(18) FIG. 14 is a schematic view showing the case in which after completing the wafer processing on the polishing pad and when the wafer is vacuum-chucked to the top ring, there is a large clearance between the surface of the carrier and the rear face of the membrane;

(19) FIG. 15 is a schematic view showing deformation state of the wafer in the case where vacuum-chucking of the wafer is started from the state in which there is a large clearance between the surface of the carrier and the rear face of the membrane as shown in FIG. 14;

(20) FIG. 16A is a schematic view showing the state of the wafer in the case where vacuum-chucking of the wafer is started from the state of a large clearance between the surface of the carrier and the rear face of the membrane and showing the case in which the polishing pad has grooves;

(21) FIG. 16B is a schematic view showing the state of the wafer in the case where vacuum-chucking of the wafer is started from the state of a large clearance between the surface of the carrier and the rear face of the membrane and showing the case in which the polishing pad has no grooves;

(22) FIG. 17 is a view showing one aspect of the present invention, and is a schematic view showing the case in which after completing the wafer processing on the polishing pad and when the wafer is vacuum-chucked to the top ring, there is a small clearance between the surface of the carrier and the rear face of the membrane (the membrane height is low);

(23) FIG. 18 is a schematic view showing deformation state of the wafer in the case where vacuum-chucking of the wafer is started from the state in which there is a small clearance between the surface of the carrier and the rear face of the membrane as shown in FIG. 17;

(24) FIG. 19A is a schematic view showing the state in which vacuum-chucking of the wafer to the top ring has been completed and showing the case in which the polishing pad has grooves;

(25) FIG. 19B is a schematic view showing the state in which vacuum-chucking of the wafer to the top ring has been completed and showing the case in which the polishing pad has no grooves;

(26) FIG. 20 is a graph showing experimental data, and is a graph showing the relationship between the membrane height (clearance between the lower surface of the carrier and the upper surface of the membrane) at the time of vacuum-chucking of the wafer and stress applied to the wafer at the time of vacuum-chucking of the wafer;

(27) FIG. 21 is a schematic view showing the top ring and a pusher, and is the view showing the state in which the pusher is elevated in order to transfer the wafer from the top ring to the pusher;

(28) FIG. 22 is a schematic view showing a detailed structure of the pusher;

(29) FIG. 23 is a schematic view showing the state of the wafer release for removing the wafer from the membrane;

(30) FIG. 24A is a schematic view showing the case in which a ripple area is pressurized when the wafer is removed from the membrane and showing the case in which the ripple area is pressurized;

(31) FIG. 24B is a schematic view showing the case in which the ripple area is pressurized when the wafer is removed from the membrane and showing the case in which the ripple area is pressurized and the outer area is depressurized;

(32) FIG. 25 is a view showing the top ring shown in FIG. 1 in more detail;

(33) FIG. 26 is a cross-sectional view showing the top ring shown in FIG. 1 in more detail;

(34) FIG. 27 is a cross-sectional view showing the top ring shown in FIG. 1 in more detail;

(35) FIG. 28 is a cross-sectional view showing the top ring shown in FIG. 1 in more detail;

(36) FIG. 29 is a cross-sectional view showing the top ring shown in FIG. 1 in more detail; and

(37) FIG. 30 is an enlarged view of XXX part of a retainer ring shown in FIG. 27.

BEST MODE FOR CARRYING OUT THE INVENTION

(38) A polishing apparatus according to embodiments of the present invention will be described below with reference to FIGS. 1 through 30. Like or corresponding parts are denoted by like or corresponding reference numerals throughout drawings and will not be described below repetitively.

(39) FIG. 1 is a schematic view showing an entire structure of a polishing apparatus according to an embodiment of the present invention. As shown in FIG. 1, the polishing apparatus comprises a polishing table 100, and a top ring 1 constituting a polishing head for holding a substrate such as a semiconductor wafer as an object to be polished and pressing the substrate against a polishing surface on the polishing table 100.

(40) The polishing table 100 coupled via a table shaft 100A to a motor (not shown) disposed below the polishing table 100. Thus, the polishing table 100 is rotatable about the table shaft 100A. A polishing pad 101 is attached to an upper surface of the polishing table 100. An upper surface 101a of the polishing pad 101 constitutes a polishing surface to polish a semiconductor wafer. A polishing liquid supply nozzle (not shown) is provided above the polishing table 100 to supply a polishing liquid onto the polishing pad 101 on the polishing table 100.

(41) The top ring 1 is connected to a lower end of a top ring shaft 18, and the top ring shaft 18 is vertically movable with respect to a top ring head 16 by a vertically movable mechanism 24. When the vertically movable mechanism 24 moves the top ring shaft 18 vertically, the top ring 1 is lifted and lowered as a whole for positioning with respect to the top ring head 16. The top ring shaft 18 is rotatable by energizing a top ring rotating motor (not shown). The top ring 1 is rotatable about an axis of the top ring shaft 18 by rotation of the top ring shaft 18. A rotary joint 25 is mounted on the upper end of the top ring shaft 18.

(42) Various kinds of polishing pads are available on the market. For example, some of these are SUBA800, IC-1000, and IC-1000/SUBA400 (two-layer cloth) manufactured by Rodel Inc., and Surfin xxx-5 and Surfin 000 manufactured by Fujimi Inc. SUBA800, Surfin xxx-5, and Surfin 000 are non-woven fabrics bonded by urethane resin, and IC-1000 is made of rigid foam polyurethane (single layer). Foam polyurethane is porous and has a large number of fine recesses or holes formed in its surface.

(43) The top ring 1 is configured to hold a substrate such as a semiconductor wafer on its lower surface. The top ring head 16 is pivotable (swingable) about a top ring head shaft 114. Thus, the top ring 1, which holds a semiconductor wafer on its lower surface, is moved between a position at which the top ring 1 receives the semiconductor wafer and a position above the polishing table 100 by pivotal movement of the top ring head 16. The top ring 1 is lowered to press the semiconductor wafer against a surface (polishing surface) 101a of the polishing pad 101. At this time, while the top ring 1 and the polishing table 100 are respectively rotated, a polishing liquid is supplied onto the polishing pad 101 from the polishing liquid supply nozzle (not shown), which is provided above the polishing table 100. The semiconductor wafer is brought into sliding contact with the polishing surface 101a on the polishing pad 101. Thus, a surface of the semiconductor wafer is polished.

(44) The vertical movement mechanism 24, which vertically moves the top ring shaft 18 and the top ring 1, has a bridge 28 supporting the top ring shaft 18 in a manner such that the top ring shaft 18 is rotatable via a bearing 26, a ball screw 32 mounted on the bridge 28, a support stage 29 which is supported by poles 130, and an AC servomotor 38 provided on the support stage 29. The support stage 29, which supports the servomotor 38, is fixed to the top ring head 16 via the poles 130.

(45) The ball screw 32 has a screw shaft 32a which is coupled to the servomotor 38, and a nut 32b into which the screw shaft 32a is threaded. The top ring shaft 18 is configured to be vertically movable together with the bridge 28. Accordingly, when the servomotor 38 is driven, the bridge 28 is vertically moved through the ball screw 32. As a result, the top ring shaft 18 and the top ring 1 are vertically moved. The polishing apparatus has a distance measuring sensor 70 serving as a position detecting device for detecting the distance from the distance measuring sensor 70 to a lower surface of the bridge 28, i.e. the position of the bridge 28. By detecting the position of the bridge 28 by the distance measuring sensor 70, the position of the top ring 1 can be detected. The distance measuring sensor 70 constitutes the vertically movable mechanism 24 together with the ball screw 32 and the servomotor 38. The distance measuring sensor 70 may comprise a laser sensor, an ultrasonic sensor, or an eddy current sensor, or a linear scale sensor. The polishing apparatus has a controller 47 for controlling various equipment including the distance measuring sensor 70 and the servomotor 38 in the polishing apparatus.

(46) The polishing apparatus in the present embodiment has a dressing unit 40 for dressing the polishing surface 101a on the polishing table 100. The dressing unit 40 includes a dresser 50 which is brought into sliding contact with the polishing surface 101a, a dresser shaft 51 to which the dresser 50 is connected, an air cylinder 53 provided at an upper end of the dresser shaft 51, and a swing arm 55 rotatably supporting the dresser shaft 51. The dresser 50 has a dressing member 50a attached on a lower portion of the dresser 50. The dressing member 50a has diamond particles in the form of needles. These diamond particles are attached on a lower surface of the dressing member 50a. The air cylinder 53 is disposed on a support stage 57, which is supported by poles 56. The poles 56 are fixed to the swing arm 55.

(47) The swing arm 55 is pivotable (swingable) about the support shaft 58 by actuation of a motor (not shown). The dresser shaft 51 is rotatable by actuation of a motor (not shown). Thus, the dresser 50 is rotated about the dresser shaft 51 by rotation of the dresser shaft 51. The air cylinder 53 vertically moves the dresser 50 via the dresser shaft 51 so as to press the dresser 50 against the polishing surface 101a of the polishing pad 101 under a predetermined pressing force.

(48) Dressing operation of the polishing surface 101a on the polishing pad 101 is performed as follows. The dresser 50 is pressed against the polishing surface 101a by the air cylinder 53. Simultaneously, pure water is supplied onto the polishing surface 101a from a pure water supply nozzle (not shown). In this state, the dresser 50 is rotated about the dresser shaft 51, and the lower surface (diamond particles) of the dressing member 50a is brought into contact with the polishing surface 101a. Thus, the dresser 50 removes a portion of the polishing pad 101 so as to dress the polishing surface 101a.

(49) The polishing apparatus in the present embodiment utilizes the dresser 50 to measure the amount of wear of the polishing pad 101. Specifically, the dressing unit 40 includes a displacement sensor 60 for measuring displacement of the dresser 50. The displacement sensor 60 constitutes a wear detecting device for detecting an amount of wear of the polishing pad 101, and is provided on an upper surface of the swing arm 55. A target plate 61 is fixed to the dresser shaft 51. The target plate 61 is vertically moved by vertical movement of the dresser 50. The displacement sensor 60 is inserted into a hole of the target plate 61. The displacement sensor 60 measures displacement of the target plate 61 to measure displacement of the dresser 50. The displacement sensor 60 may comprise any type of sensors including a linear scale sensor, a laser sensor, an ultrasonic sensor, and an eddy-current sensor.

(50) In the present embodiment, the amount of wear of the polishing pad 101 is measured as follows. First, the air cylinder 53 is operated to bring the dresser 50 into contact with a polishing surface 101a of an unused polishing pad 101 which has been initially dressed. In this state, the displacement sensor 60 measures an initial position (initial height value) of the dresser 50 and stores the initial position (initial height value) in the storage device of the controller (arithmetical unit) 47. After completion of a polishing process for one or more semiconductor wafers, the dresser 50 is brought into contact with the polishing surface 101a. In this state, the position of the dresser 50 is measured. Since the position of the dresser 50 is shifted downward by the amount of wear of the polishing pad 101, the controller 47 calculates a difference between the initial position and the measured position of the dresser 50 after polishing to obtain the amount of wear of the polishing pad 101. In this manner, the amount of wear of the polishing pad 101 is calculated based on the position of the dresser 50.

(51) When the semiconductor wafer is polished by the polishing apparatus shown in FIG. 1, the thickness of the polishing pad 101 varies at all times because the polishing pad 101 is progressively worn, dressed, and replaced. If the semiconductor wafer is pressed by an inflated elastic membrane in the top ring 1, then the range in which the outer peripheral area of the semiconductor wafer and the elastic membrane contact each other, and the surface pressure distribution over the outer peripheral area of the semiconductor wafer change depending on the distance between the elastic membrane and the semiconductor wafer. In order to prevent the surface pressure distribution over the semiconductor wafer from changing as the polishing process progresses, it is necessary to keep the distance between the top ring 1 and the polishing surface of the polishing pad 101 constant at the time of polishing. For keeping the distance between the top ring 1 and the polishing surface of the polishing pad 101 constant, it is necessary to detect the vertical position of the polishing surface of the polishing pad 101 and adjust the lowered position of the top ring 1 after the polishing pad 101 is replaced and initially dressed by the dresser 50 as described later, for example. The process of detecting the vertical position of the polishing surface of the polishing pad 101 will be referred to as “pad search” by the top ring.

(52) The pad search by the top ring is carried out by detecting the vertical position (height) of the top ring 1 when the lower surface of the top ring 1 or the lower surface of the semiconductor wafer is brought into contact with the polishing surface of the polishing pad 101. Specifically, in the pad search by the top ring, the top ring 1 is lowered by the servomotor 38 while the number of revolutions of the servomotor 38 is being counted by an encoder combined with the servomotor 38. When the lower surface of the top ring 1 contacts the polishing surface of the polishing pad 101, the load on the servomotor 38 increases, and the current flowing through the servomotor 38 increases. The current flowing through the servomotor 38 is detected by a current detector in the controller 47. When the detected current becomes large, the controller 47 judges that the lower surface of the top ring 1 contacts the polishing surface of the polishing pad 101. At the same time, the controller 47 calculates the lowered distance (position) of the top ring 1 from the count (integration value) of the encoder, and stores the calculated lowered distance. The controller 47 then obtains the vertical position (height) of the polishing surface of the polishing pad 101 from the lowered distance of the top ring 1, and calculates a preset polishing position of the top ring 1 from the vertical position of the polishing surface of the polishing pad 101.

(53) The semiconductor wafer used in the pad search by the top ring should preferably be a dummy wafer for use in the pad search, rather than a product wafer. Although a product wafer may be used in the pad search, semiconductor devices on such product wafer may possibly be broken in the pad search. Using a dummy wafer in the pad search is effective to prevent semiconductor devices on such product wafer from being damaged or broken.

(54) The servomotor 38 should preferably be a servomotor with a variable maximum current. In the pad search, the maximum current of the servomotor 38 may be adjusted to a value ranging from about 25% to 30% to prevent the semiconductor wafer (dummy wafer), the top ring 1, and the polishing pad 101 from being placed under an excessive load when the lower surface of the top ring 1 or the lower surface of the semiconductor wafer (dummy wafer) is brought into contact with the polishing surface of the polishing pad 101. Since the time when the top ring 1 will contact the polishing pad 101 can approximately be predicted from the descending time or the descending distance of the top ring 1, the maximum current of the servomotor 38 should preferably be lowered before the top ring 1 contacts the polishing pad 101. In this manner, the top ring 1 can be lowered quickly and reliably.

(55) Next, a polishing head (top ring) of the polishing apparatus according to the present invention will be described below with reference to FIG. 2. FIG. 2 is a schematic cross-sectional view showing the top ring 1 constituting a polishing head for holding a semiconductor wafer as an object to be polished and pressing the semiconductor wafer against the polishing surface on the polishing table. FIG. 2 shows only main structural elements constituting the top ring 1.

(56) As shown in FIG. 2, the top ring 1 basically comprises a top ring body 2, also referred to as carrier, for pressing a semiconductor wafer W against the polishing surface 101a, and a retainer ring 3 for directly pressing the polishing surface 101a. The top ring body (carrier) is in the form of a circular plate, and the retainer ring 3 is attached to a peripheral portion of the top ring body 2. The top ring body 2 is made of resin such as engineering plastics (e.g. PEEK). As shown in FIG. 2, the top ring 1 has an elastic membrane (membrane) 4 attached to a lower surface of the top ring body 2. The elastic membrane 4 is brought into contact with a rear face of a semiconductor wafer held by the top ring 1. The elastic membrane 4 is made of a highly strong and durable rubber material such as ethylene propylene rubber (EPDM), polyurethane rubber, silicone rubber, or the like.

(57) The elastic membrane (membrane) 4 has a plurality of concentric partition walls 4a, and a circular central chamber 5, an annular ripple chamber 6, an annular outer chamber 7 and an annular edge chamber 8 are defined by the partition walls 4a between the upper surface of the elastic membrane 4 and the lower surface of the top ring body 2. Specifically, the central chamber 5 is defined at the central portion of the top ring body 2, and the ripple chamber 6, the outer chamber 7 and the edge chamber 8 are concentrically defined in the order from the central portion to the peripheral portion of the top ring body 2. A passage 11 communicating with the central chamber 5, a passage 12 communicating with the ripple chamber 6, a passage 13 communicating with the outer chamber 7 and a passage 14 communicating with the edge chamber 8 are formed in the top ring body 2. The passage 11 communicating with the center chamber 5, the passage 13 communicating with the outer chamber 7 and the passage 14 communicating with the edge chamber 8 are connected via a rotary joint 25 to passages 21, 23 and 24, respectively. The respective passages 21, 23 and 24 are connected via respective valves V1-1, V3-1, V4-1 and respective pressure regulators R1, R3, R4 to a pressure regulating unit 30. Further, the respective passages 21, 23 and 24 are connected via respective valves V1-2, V3-2, V4-2 to a vacuum source 31, and are also connected via respective valves V1-3, V3-3, V4-3 to the atmosphere.

(58) On the other hand, the passage 12 communicating with the ripple chamber 6 is connected via the rotary joint 25 to the passage 22. The passage 22 is connected via a water separating tank 35, a valve V2-1 and the pressure regulator R2 to the pressure regulating unit 30. Further, the passage 22 is connected via the water separating tank 35 and the valve V2-2 to a vacuum source 131, and is also connected via a valve V2-3 to the atmosphere.

(59) Further, a retainer ring chamber 9 is formed immediately above the retainer ring 3, and the retainer ring chamber 9 is connected via a passage 15 formed in the top ring body (carrier) 2 and the rotary joint 25 to a passage 26. The passage 26 is connected via a valve V5-1 and a pressure regulator R5 to the pressure regulating unit 30. Further, the passage 26 is connected via a valve V5-2 to the vacuum source 31, and is also connected via a valve V5-3 to the atmosphere. The pressure regulators R1, R2, R3, R4 and R5 have a pressure adjusting function for adjusting pressures of the pressurized fluid supplied from the pressure regulating unit 30 to the central chamber 5, the ripple chamber 6, the outer chamber 7, the edge chamber 8 and the retainer ring chamber 9, respectively. The pressure regulators R1, R2, R3, R4 and R5 and the respective valves V1-1-V1-3, V2-1-V2-3, V3-1-V3-3, V4-1-V4-3 and V5-1-V5-3 are connected to the controller 47 (see FIG. 1), and operations of these pressure regulators and these valves are controlled by the controller 47. Further, pressure sensors P1, P2, P3, P4 and P5 and flow rate sensors F1, F2, F3, F4 and F5 are provided in the passages 21, 22, 23, 24 and 26, respectively.

(60) In the top ring 1 constructed as shown in FIG. 2, as described above, the central chamber 5 is defined at the central portion of the top ring body 2, and the ripple chamber 6, the outer chamber 7 and the edge chamber 8 are concentrically defined in the order from the central portion to the peripheral portion of the top ring body 2. The pressures of the fluid supplied to the central chamber 5, the ripple chamber 6, the outer chamber 7, the edge chamber 8 and the retainer ring chamber 9 can be independently controlled by the pressure regulating unit 30 and the pressure regulators R1, R2, R3, R4 and R5. With this arrangement, pressing forces for pressing the semiconductor wafer W against the polishing pad 101 can be adjusted at respective local areas of the semiconductor wafer by adjusting pressures of the fluid to be supplied to the respective pressure chambers, and a pressing force for pressing the retainer ring 3 against the polishing pad 101 can be adjusted by adjusting a pressure of the fluid to be supplied to the pressure chamber.

(61) A series of polishing processes of the polishing apparatus shown in FIGS. 1 and 2 will be described below with reference to FIG. 3. FIG. 3 is a flowchart of the series of polishing processes of the polishing apparatus according to the present embodiment. As shown in FIG. 3, the polishing processes start with the replacement of the polishing pad in step S101. Specifically, the polishing pad which has been worn is detached from the polishing table 100, and a brand-new polishing pad 101 is mounted on the polishing pad 100.

(62) The brand-new polishing pad 101 has a low polishing capability because its polishing surface is not rough and has surface undulations due to the way in which the polishing pad 101 is mounted on the polishing table 100 or due to the individual configuration of the polishing pad 101. In order to correct such surface undulations to prepare the polishing pad 101 for polishing, it is necessary to dress the polishing pad 101 to roughen the polishing surface thereof for an increased polishing capability. The initial surface adjustment (dressing) is referred to as initial dressing (step S102).

(63) Then, the pad search is performed by the top ring 1 using a dummy wafer for pad search in step S103. As described above, the pad search is a process for detecting the vertical height (position) of the surface of the polishing pad 101. The pad search is performed by detecting the vertical height of the top ring 1 when the lower surface of the top ring 1 is brought into contact with the polishing surface of the polishing pad 101.

(64) Specifically, in the pad search, the servomotor 38 is energized to lower the top ring 1 while the number of revolutions of the servomotor 38 is being counted by the encoder combined with the servomotor 38. When the lower surface of the top ring 1 contacts the polishing surface of the polishing pad 101, the load on the servomotor 38 increases, and the current flowing through the servomotor 38 increases. The current flowing through the servomotor 38 is detected by the current detector in the controller 47. When the detected current becomes large, the controller 47 judges that the lower surface of the top ring 1 contacts the polishing surface of the polishing pad 101. At the same time, the controller 47 calculates the lowered distance (position) of the top ring 1 from the count (integration value) of the encoder, and stores the calculated lowered distance. The controller 47 then obtains the vertical height of the polishing surface of the polishing pad 101 from the lowered distance of the top ring 1, and calculates the optimum position of the top ring 1 before polishing from the vertical height of the polishing surface of the polishing pad 101.

(65) In the present embodiment, when the top ring 1 is in an optimum position before polishing, the lower surface, i.e. the surface to be polished, of the semiconductor wafer W which is held as a product wafer by the top ring 1 is spaced from the polishing surface of the polishing pad 101 by a slight gap.

(66) The vertical position of the top ring in which the lower surface, i.e. the surface to be polished, of the semiconductor wafer W held as a product wafer by the top ring 1 is not brought into contact with the polishing surface of the polishing pad 101, but is spaced by the slight gap from the polishing surface of the polishing pad 101, is set as an optimum position (H.sub.initial-best) of the top ring 1 in the controller 47 (step S103).

(67) Then, a pad search by the dresser 50 is performed in step S104. The pad search by the dresser 50 is carried out by detecting the vertical height of the dresser 50 when the lower surface of the dresser 50 is brought into contact with the polishing surface of the polishing pad 101 under a predetermined pressure. Specifically, the air cylinder 53 is actuated to bring the dresser 50 into contact with the polishing surface 101a of the polishing pad 101 which has been initially dressed. The displacement sensor 60 detects the initial position (initial height) of the dresser 50, and the controller (processor) 47 stores the detected initial position (initial height) of the dresser 50. The initial dressing process in step S102 and the pad search by the dresser in step S104 may be carried out simultaneously. Specifically, the vertical position (initial position) of the dresser 50 may be detected finally in the initial dressing process, and the detected vertical position (initial height value) of the dresser 50 may be stored in the controller (processor) 47.

(68) If the initial dressing process in step S102 and the pad search by the dresser in step S104 are carried out simultaneously, then they are followed by the pad search by the top ring in step S103.

(69) Then, the top ring 1 receives and holds a semiconductor wafer as a product wafer from a substrate transfer apparatus (pusher). Thereafter, the top ring 1 is lowered to the preset position (H.sub.initial-best) which has been obtained in the pad search by the top ring in step S103. Before the semiconductor wafer is polished, since the semiconductor wafer is attached to and held by the top ring 1, there is a small gap between the lower surface (the surface to be polished) of the semiconductor wafer and the polishing surface of the polishing pad 101. At this time, the polishing table 100 and the top ring 1 are being rotated about their own axes. Then, the elastic membrane (membrane) located at the upper surface of the semiconductor wafer is inflated under the pressure of a fluid supplied thereto to press the lower surface (surface to be polished) of the semiconductor wafer against the polishing surface of the polishing pad 101. As the polishing table 100 and the top ring 1 are being moved relative to each other, the lower surface of the semiconductor wafer is polished to a predetermined state, e.g. a predetermined film thickness, in step S105.

(70) When the polishing of the lower surface of the semiconductor wafer is finished in step S105, the top ring 1 transfers the polished semiconductor wafer to the substrate transfer apparatus (pusher), and receives a new semiconductor wafer to be polished from the substrate transfer apparatus. While the top ring 1 is replacing the polished semiconductor wafer with the new semiconductor wafer, the dresser 50 dresses the polishing pad 101 in step S106.

(71) The polishing surface 101a of the polishing pad 101 is dressed as follows: The air cylinder 53 presses the dresser 50 against the polishing surface 101a, and at the same time a pure water supply nozzle (not shown) supplies pure water to the polishing surface 101a. In this state, the dresser 50 rotates around the dresser shaft 51 to bring the lower surface (diamond particles) of the dressing member 50a into sliding contact with the polishing surface 101a. The dresser 50 scrapes off a surface layer of the polishing pad 101, and the polishing surface 101a is dressed.

(72) After the polishing surface 101a is dressed, the pad search by the dresser 50 is performed in step S106. The pad search by the dresser 50 is carried out in the same manner as with step S104. Although the pad search by the dresser may be performed after the dressing process separately from the dressing process, alternatively, the pad search by the dresser 50 may be performed finally in the dressing process, so that the pad search by the dresser 50 and the dressing process can be carried out simultaneously. In step S106, the dresser 50 and the polishing table 100 should be rotated at the same speeds, and the dresser 50 may be loaded under the same conditions, as with step S104. According to the pad search by the dresser 50, the vertical position of the dresser 50 after dressing is detected in step S106.

(73) Then, the controller 47 determines the difference between the initial position (initial height value) of the dresser 50 determined in step S104 and the vertical position of the dresser 50 determined in step S106, thereby determining an amount of wear (ΔH) of the polishing pad 101.

(74) The controller 47 then calculates an optimum position (H.sub.post-best) of the top ring 1 for polishing a next semiconductor wafer according to the following equation (1) based on the amount of wear (ΔH) of the polishing pad 101 and the preset position (H.sub.initial-best) of the top ring 1 at the time of polishing, which has been determined in the pad search in step S103, in step S107:
H.sub.post-best=H.sub.initial-best+ΔH  (1)

(75) Specifically, the amount of wear (ΔH) of the polishing pad 101, which is a factor that affects the vertical position of the top ring 1 during the polishing process, is detected, and the preset position (H.sub.initial-best) of the top ring 1 which has been set is corrected based on the amount of wear (ΔH) of the polishing pad 101 which has been detected, thereby determining a preset position (H.sub.post-best) of the top ring 1 for polishing a next semiconductor wafer. In this manner, the top ring 1 is controlled so as to take an optimum vertical position at all times in the polishing process.

(76) Next, the servomotor 38 is energized to lower the top ring 1 which holds the semiconductor wafer W to the preset position (H.sub.post-best) of the top ring 1 determined in step S107, thereby adjusting the height of the top ring 1 in step S108. Thereafter, steps S105 through S108 are repeated until the polishing pad 101 is worn out to polish a number of semiconductor wafers. Thereafter, the polishing pad 101 is replaced in step S101.

(77) As described above with reference to the flowchart shown in FIG. 3, while the polishing apparatus is in operation, the amount of wear (ΔH) of the polishing pad 101, which is a factor that affects the vertical position of the top ring 1 at the time of polishing, is detected, and the preset position (H.sub.initial-best) of the top ring 1 which has been set is corrected based on the amount of wear (ΔH) of the polishing pad 101 which has been detected, thereby determining a preset position (H.sub.post-best) of the top ring 1 for polishing a next semiconductor wafer W. In this manner, the top ring 1 is controlled so as to take an optimum vertical position at all times in the polishing process. Therefore, the pad search by the top ring for directly obtaining the preset position of the top ring 1 at the time of polishing should be performed only when the polishing pad is replaced, resulting in a greatly increased throughput.

(78) Next, an optimum height of the elastic membrane (membrane) when application of the pressure to the semiconductor wafer is started or the semiconductor wafer is vacuum-chucked to the top ring in the polishing apparatus constructed as shown in FIGS. 1 and 2 will be described with reference to FIGS. 4 through 24.

(79) FIGS. 4A through 4C are schematic views for explaining a membrane height. FIG. 4A is a schematic view showing the state in which a membrane height, which is defined as a clearance between the semiconductor wafer W and the polishing pad 101 under the condition that the semiconductor wafer W is vacuum-chucked to the membrane 4, is equal to 0 mm, i.e. “membrane height=0 mm.” The “membrane height=0 mm” (contact position between the semiconductor wafer and the polishing pad 101) can be detected by the above-mentioned pad search. As shown in FIG. 4A, the top ring height in which the semiconductor wafer W is brought into contact with the polishing pad 101 under the condition that the semiconductor wafer is vacuum-chucked to the top ring is taken as “membrane height=0 mm.” Then, the position of the top ring in which the top ring is moved upwardly by X mm from the position shown in FIG. 4A (membrane height=0 mm) is taken as “membrane height=X mm.” For example, the membrane height=1 mm (clearance 1 mm) is obtained by rotating the top ring shaft motor by certain pulses corresponding to 1 mm to rotate the ball screw, thereby displacing 1 mm.

(80) The pad surface can be detected by the pad search with an accuracy of about ±0.01 mm. Further, an error of the top ring height is regarded as the total error of a control error of the top ring shaft motor plus a control error of the ball screw, and is negligibly small. The error of the membrane height is about ±0.01 mm.

(81) FIG. 4B is a schematic view showing the state of “membrane height=0.5 mm.” As shown in FIG. 4B, the semiconductor wafer W is vacuum-chucked to the top ring, and the top ring 1 is lifted by 0.5 mm from the position shown in FIG. 4A. This lifted state of the top ring 1 is taken as “membrane height=0.5 mm.”

(82) FIG. 4C is a schematic view showing the membrane height which is defined as a clearance between the top ring body (carrier) 2 and the membrane 4 under the condition that the semiconductor wafer is pressed against the polishing pad 101 by the membrane 4. As shown in FIG. 4C, the membrane 4 is lowered to press the semiconductor wafer W against the polishing pad 101 by supplying a pressurized fluid to the pressure chambers. In this state, the membrane height is defined as a clearance between the lower surface of the carrier and the upper surface of the membrane. In FIG. 4C, the clearance between the lower surface of the carrier and the upper surface of the membrane is 0.5 mm, and thus it follows that “membrane height=0.5 mm.” In FIGS. 4A through 4C, the retainer ring 3 is brought into contact with the polishing surface 101a of the polishing pad 101.

(83) Next, an optimum membrane height in various operations performed in the polishing process will be described below.

(84) (1) At the Time of Starting Application of the Pressure

(85) FIG. 5 is a schematic view showing the state of the top ring 1 which vacuum-chucks the semiconductor wafer W before the top ring 1 is lowered. As shown in FIG. 5, the semiconductor wafer W is vacuum-chucked to the top ring 1. The polishing table 100 and the top ring 1 are rotated in a state in which the top ring 1 vacuum-chucks the semiconductor wafer W, and the top ring 1 is lowered onto the polishing pad 101.

(86) FIG. 6 is a schematic view showing the state of the top ring 1 which vacuum-chucks the semiconductor wafer W and is lowered, with a large clearance between the semiconductor wafer W and the polishing pad 101 left. FIG. 7A is a schematic view showing deformation state of the semiconductor wafer in the case where application of the pressure is started from the state of a large clearance between the semiconductor wafer and the polishing pad as shown in FIG. 6. FIG. 7B is a graph showing deformation quantity of the semiconductor wafer in the case where application of the pressure is started from the state of a large clearance between the semiconductor wafer and the polishing pad. In FIG. 7B, the horizontal axis represents measuring points (mm) within the wafer plane in 300 mm Wafer, and the vertical axis represents distances from the polishing pad to the semiconductor wafer obtained every time one revolution of the polishing table is performed when the eddy current sensor provided on the polishing table scans the lower surface (surface to be polished) of the semiconductor wafer by rotation of the polishing table.

(87) In the example shown in FIG. 7A, because pressurization of the ripple area (the ripple chamber 6) is delayed in comparison with pressurization in other areas (the central chamber 5, the outer chamber 7 and the edge chamber 8), the semiconductor wafer W is deformed into substantially M-shape. As shown in FIG. 7A, deformation allowance of the wafer corresponding to the clearance before starting pressurization exists, and thus the wafer is deformed to a large degree. The reason why pressurization of the ripple area is delayed is that the membrane has holes for vacuum-chucking the wafer in the ripple area, and the ripple area serves as an area for vacuum-chucking the wafer, and thus the water separating tank 35 (see FIG. 2) having a large volume is provided in the middle of the line to cause inferior response of pressurization in comparison with other areas.

(88) From experimental data of FIG. 7B, the manner in which the wafer is deformed into substantially M-shape in the process of pressing the wafer W against the polishing pad 101 after starting pressurization can be traced. As shown in FIG. 7B, the wafer is deformed by about 0.7 mm within the wafer plane. Therefore, in order to reduce this influence, a buffer equivalent to the water separating tank 35 in volume is provided in the line other than the ripple area line so that the respective lines are equivalent in volume to adjust the responsiveness of pressurization at the same level. Further, pressurization may be made in the order from the large volume area to the small volume area. For example, after the ripple chamber 6 is pressurized, the central chamber 5, the outer chamber 7 and the edge chamber 8 are pressurized in the order from the central portion to the outer peripheral portion of the top ring 1.

(89) Further, as a means for adjusting the responsiveness, set pressures in the respective pressure chambers may be changed. For example, by pressurizing the ripple chamber 6 having a large volume at a set pressure higher than set pressures of other chambers, i.e. the central chamber 5, the outer chamber 7 and the edge chamber 8, build-up responsiveness of pressure of the ripple chamber 6 may be improved. Further, as a means for improving the pressure responsiveness of the ripple chamber 6, as shown in FIG. 7C, a passage 22 communicating with the ripple chamber 6 may be provided. In the top ring 1 thus constructed, when the ripple chamber 6 is pressurized, the pressure regulator R2 is operated, and the valve V2-1 is opened and the shut valve V2-4 is closed, so that the pressurized fluid may be supplied to the ripple chamber 6 without passing through the water separating tank 35 to obtain quick pressure response.

(90) FIG. 8 is a view showing a first aspect of the present invention, and is a schematic view showing the case in which the top ring 1 holding the wafer W under vacuum is lowered and there is a small clearance between the wafer W and the polishing pad 101. In the first aspect of the present invention, the top ring 1 holding the wafer W under vacuum is lowered, and the retainer ring 3 is brought into contact with the polishing surface 101a of the polishing pad 101. In this state, the membrane height, i.e. the clearance between the wafer W and the polishing pad 101 is arranged in the range of 0.1 mm to 1.7 mm. Specifically, the vertical distance (height) of the top ring 1 from the polishing pad is defined as “the first height” in a state in which the top ring 1 holding the wafer W under vacuum is lowered and the retainer ring 3 is brought into contact with the polishing surface 101a of the polishing pad 101.

(91) As described above, the membrane height is as follows: The top ring height in which the wafer W is vacuum-chucked to the top ring and is brought into contact with the polishing pad 101 is taken as “membrane height=0 mm.” For example, in the state of “membrane height=0.5 mm”, the clearance between the wafer W vacuum-chucked to the top ring and the polishing pad 101 becomes 0.5 mm.

(92) When the wafer W is pressed against the polishing pad 101, the lower surface of the wafer is brought in contact with the polishing pad, and the upper surface of the wafer is brought in contact with the lower surface of the membrane. Therefore, if the membrane height is made high, the clearance between the lower surface of the top ring body (carrier) and the upper surface of the membrane increases. If the clearance between the wafer W and the polishing pad 101 is too small, the wafer may be brought into contact with the polishing pad locally, and excessive polishing may occur at local regions of the wafer. Therefore, according to the present invention, the clearance between the wafer W and the polishing pad 101 is arranged in the range of 0.1 mm to 1.7 mm, preferably 0.1 mm to 0.7 mm, more preferably 0.2 mm. Specifically, the reason why the clearance is not less than 0.1 mm is that undulation of the polishing table 100 in its vertical direction occurs during rotation of the polishing table 100 and there is variation in perpendicularity between the polishing table 100 and the top ring shaft 18, the clearance no longer exists in local areas within the wafer plane, and thus the carrier may be brought into contact with the membrane and excessive pressurization may occur in certain areas of the wafer. Further, the reason why the clearance is not more than 0.7 mm is that the deformation quantity of the wafer at the time of starting pressurization does not become too large. In order to prevent the wafer W from colliding with the retainer rig 3 strongly at the time of starting pressurization, it is desirable that when pressurization is started, the polishing table 100 and the top ring 1 should be rotated at a low rotational speed of 50 rpm or less. Alternatively, pressurization may be started in a state in which rotation of the polishing table 100 and the top ring 1 is stopped.

(93) FIG. 9A is a schematic cross-sectional view showing the state in which application of the pressure to the membrane is started from the state of a small clearance between the wafer and the polishing pad (clearance of 0.1 mm to 0.7 mm).

(94) FIG. 9B is a graph showing deformation quantity of the wafer in the case where application of the pressure is started from the state of a small clearance between the wafer and the polishing pad. In FIG. 9B, the horizontal axis represents measuring points (mm) within the wafer plane in 300 mm Wafer, and the vertical axis represents distances from the polishing pad to the wafer obtained every time one revolution of the polishing table is performed when the eddy current sensor provided on the polishing table scans the lower surface (surface to be polished) of the wafer by rotation of the polishing table. For example, the pressure is applied to the membrane from the state of “membrane height=0.2 mm”, and the wafer W is brought into contact with the polishing pad 101 and is pressed against the polishing pad 101. At this time, the membrane is expanded by an amount corresponding to the clearance between the wafer and the polishing pad, and thus the clearance between the wafer and the polishing pad no longer exists. Instead, the clearance between the lower surface of the carrier and the upper surface of the membrane becomes 0.2 mm. Thereafter, the top ring is moved to an optimum height in order to obtain a desired polishing profile.

(95) From experimental data of FIG. 9B, the manner in which the wafer is not deformed in the process of pressing the wafer W against the polishing pad 101 after starting pressurization can be traced.

(96) FIG. 10 is a schematic view showing the state in which the top ring 1 is moved from the state shown in FIG. 9A to an optimum height in order to obtain a desired polishing profile. FIG. 10 shows the membrane height defined as a clearance between the top ring body (carrier) 2 and the membrane 4 in a state in which the wafer W is pressed against the polishing pad 101 by the membrane 4. In this case, if stock removal of the edge portion of the wafer should be increased, the wafer should be polished at a low membrane height, and if stock removal of the edge portion of the wafer should be decreased, the wafer should be polished at a high membrane height. This is because if the membrane height is high, an elongation of the membrane in a vertical direction increases to increase pressure loss due to tension of the membrane, thus decreasing the pressure applied to the edge portion of the wafer. According to the present invention, after the wafer W is pressed against the polishing pad 101, the top ring is moved so that the membrane height becomes in the range of 0.1 mm to 2.7 mm, preferably 0.1 mm to 1.2 mm, and then the wafer W is polished. Specifically, the vertical distance from the polishing pad to the top ring when the top ring 1 is moved to obtain more desired polishing profile from “the first height” in a state in which the top ring 1 holding the wafer W under vacuum is lowered and the retainer wing 3 is brought in contact with the polishing surface 101a of the polishing pad 101 is defined as “the second height.”

(97) FIG. 11 is a view showing a second aspect of the present invention, and is a schematic view showing the case in which the top ring 1 holding the wafer W under vacuum is lowered and there is a large clearance between the wafer W and the polishing pad 101. As shown in FIG. 11, in the second aspect of the present invention, the clearance between the wafer W and the polishing pad 101 is made large at the time of starting pressurization. Specifically, at the time of starting pressurization, the membrane height defined as a clearance between the wafer W and the polishing pad 101 is made large in a state in which the wafer W is vacuum-chucked to the membrane 4.

(98) FIG. 12A is a schematic cross-sectional view showing the state in which application of the pressure to the membrane is started from the state of a high membrane height. FIG. 12B is a graph showing deformation quantity of the wafer in the case where application of the pressure is started from the state of a large clearance between the wafer and the polishing pad. In FIG. 12B, the horizontal axis represents measuring points (mm) within the wafer plane in 300 mm Wafer, and the vertical axis represents distances from the polishing pad to the wafer obtained every time one revolution of the polishing table is performed when the eddy current sensor provided on the polishing table scans the lower surface (surface to be polished) of the wafer by rotation of the polishing table. As shown in FIG. 12A, the pressure is applied to the membrane from the state of a high membrane height at a low pressure, and the wafer W is brought into contact with the polishing pad 101 and pressed against the polishing pad 101. At this time, the membrane is expanded by an amount corresponding to the clearance between the wafer and the polishing pad, and the clearance between the wafer and the polishing pad no longer exists. Instead, a clearance between the lower surface of the carrier and the upper surface of the membrane is formed. Even if the clearance between the wafer and the polishing pad (equal to a membrane height defined as a clearance between the wafer W and the polishing pad 101 in a state in which the wafer W is vacuum-chucked to the membrane 4) when application of the pressure is started is large, the deformation quantity of the wafer can be small by pressurizing the membrane at a low pressure to bring the wafer into contact with the polishing pad.

(99) In this case, the low pressure means a pressure of not more than a membrane pressure at the time of substantial polishing, and it is desirable that such low pressure is less than half that at the time of the substantial polishing. Further, the substantial polishing process is referred to as a process of polishing for over twenty seconds, and plural substantial polishing processes may exist. During this substantial polishing process, a polishing liquid or chemical liquid is supplied onto the polishing pad, and the wafer (substrate) is pressed against the polishing surface and brought into sliding contact with the polishing surface, thereby polishing the wafer, or cleaning the wafer. Instead of pressurizing the membrane at a low pressure to bring the wafer into contact with the polishing pad, the membrane is exposed to atmospheric pressure to bring the wafer into contact with the polishing pad, so that the deformation quantity of the wafer can be small. From experimental data of FIG. 12B, the state in which the wafer is not deformed in the process of pressing the wafer W against the polishing pad 101 after starting pressurization can be traced.

(100) FIG. 13 is a schematic view showing the case in which the substantial polishing is performed in the state shown in FIG. 12A without moving the top ring 1. According to the method shown in FIGS. 12A and 13, it is possible to perform polishing of the wafer without changing the top ring height between at the time of starting pressurization and at the time of the substantial polishing subsequent to the starting pressurization, i.e. between the successive steps. As described above, after the wafer is brought into contact with the polishing pad by pressurizing the membrane at a low pressure or allowing the membrane to be exposed to atmospheric pressure, the membrane is pressurized at a pressure of the substantial polishing, thereby polishing the wafer.

(101) According to the present invention, as a method for detecting contact of the wafer W with the polishing pad 101 or a method for detecting pressing of the wafer W against the polishing pad 101, an optical reflection intensity measuring device or an eddy current sensor provided in the polishing table 100 may be used, or current value change of the table rotating motor may be used by utilizing a change of a rotating torque of the polishing table 100. Further, the current value change of the top ring rotating motor or the current value change of the ball screw driving motor for lifting and lowering the top ring may be used. Furthermore, after the wafer is brought into contact with the polishing pad, a volume increase of the membrane does not occur, and thus pressure change or flow rate change of the pressurized fluid for the membrane may be used.

(102) In the above embodiments, although the first and second aspects of the present invention have been described separately, the membrane may be pressurized at a low pressure from the state of a small clearance between the wafer and the polishing pad, for example, a clearance of 0.2 mm.

(103) (2) At the Time of Vacuum-Chucking the Wafer

(104) After completing wafer processing on the polishing pad 101, the wafer W is vacuum-chucked to the top ring 1, and the top ring 1 is lifted and is then moved to a substrate transfer apparatus (pusher) where the wafer W is removed from the top ring 1. In this case, vacuum-chucking of the wafer is performed at a vacuum pressure of about −10 kPa in the center chamber 5 and about −80 kPa in the ripple chamber 6.

(105) FIG. 14 is a schematic view showing the case in which after completing the wafer processing on the polishing pad and when the wafer W is vacuum-chucked to the top ring 1, there is a large clearance between the surface of the carrier and the rear face of the membrane (the membrane height is high). FIG. 15 is a schematic view showing deformation state of the wafer in the case where vacuum-chucking of the wafer is started from the state in which there is a large clearance between the surface of the carrier and the rear face of the membrane as shown in FIG. 14. In the example shown in FIG. 15, there is deformation allowance of the wafer corresponding to the clearance before starting vacuum-chucking of the wafer, and thus the wafer is deformed to a large degree.

(106) FIGS. 16A and 16B are schematic views showing the state of the wafer in the case where vacuum-chucking of the wafer is started from the state of a large clearance between the surface of the carrier and the rear face of the membrane. FIG. 16A shows the case in which the polishing pad has grooves, and FIG. 16B shows the case in which the polishing pad has no grooves. As shown in FIG. 16A, in the case of the polishing pad with grooves, the wafer W is removed from the polishing pad 101 and is vacuum-chucked to the top ring 1. However, as shown in FIG. 15, the wafer has large deformation immediately after the wafer is vacuum-chucked to the top ring, and hence there is a possibility that the wafer is broken or damaged. As shown in FIG. 16B, in the case of the polishing pad with no grooves, the wafer W cannot be removed from the polishing pad 101 and large deformation of the wafer W is formed. In the example shown in FIG. 16B, there is deformation allowance of the wafer corresponding to the clearance before starting vacuum-chucking of the wafer, and thus the wafer is deformed to a large degree.

(107) FIG. 17 is a view showing one aspect of the present invention, and a schematic view showing the case in which after completing the wafer processing on the polishing pad and when the wafer W is vacuum-chucked to the top ring 1, there is a small clearance between the surface of the carrier and the rear face of the membrane (the membrane height is low). FIG. 18 is a schematic view showing deformation state of the wafer in the case where vacuum-chucking of the wafer is started from the state in which there is a small clearance between the surface of the carrier and the rear face of the membrane as shown in FIG. 17. In the example shown in FIG. 18, because the clearance before vacuum-chucking of the wafer is small, deformation allowance of the wafer is small, and thus the deformation quantity of the wafer can be extremely small.

(108) As described above, the substantial polishing process and the cleaning process such as water polishing are carried out in a state in which the membrane height, defined as a clearance between the top ring body (carrier) 2 and the membrane 4 with the wafer W being pressed against the polishing pad 101, is in the range of 0.1 mm to 1.2 mm. Then, at the time of vacuum-chucking of the wafer, it is desirable that the top ring should be moved so that the membrane height becomes in the range of 0.1 mm to 0.4 mm. When the top ring vacuum-chucks the wafer and removes the wafer from the polishing pad, the polishing surface and the wafer are spaced with a small clearance. Therefore, a liquid supplied to the polishing surface flows through the clearance and presents obstacles to removal of the wafer from the polishing surface. Accordingly, when the top ring exerts an attracting force onto the wafer, an amount of the liquid to be supplied to the polishing surface is reduced to allow air to enter between the wafer and the polishing surface, thereby reducing a suction force for pulling the wafer toward the polishing surface, i.e. reducing a negative pressure produced between the wafer and the polishing surface. In order to decrease the deformation quantity of the wafer, a vacuum pressure at the time of vacuum-chucking of the wafer may be in the range of −30 kPa to −80 kPa so as to produce a weak suction force. Further, by reducing stress applied to the wafer and the deformation quantity of the wafer at the time of vacuum-chucking of the wafer, it is possible to reduce a defect of the wafer such as residual abrasive grains on the wafer.

(109) FIGS. 19A and 19B are schematic views showing the state in which vacuum-chucking of the wafer W to the top ring 1 has been completed. FIG. 19A shows the case in which the polishing pad has grooves, and FIG. 19B shows the case in which the polishing pad has no grooves. As shown in FIG. 19A, in the case of the polishing pad with grooves, because the clearance before vacuum-chucking of the wafer is small, deformation allowance of the wafer is small, and thus the wafer can be vacuum-chucked to the top ring without causing deformation of the wafer. As shown in FIG. 19B, in the case of the polishing pad with no grooves, generally, the wafer is not removed from the polishing pad before completing an overhang operation of the top ring. However, since deformation allowance is small, the deformation quantity of the wafer can be extremely small. That is, the wafer can be vacuum-chucked to the top ring without causing deformation of the wafer.

(110) FIG. 20 is a graph showing experimental data, and is a graph showing the relationship between the membrane height (clearance between the lower surface of the carrier and the upper surface of the membrane) at the time of vacuum-chucking of the wafer and stress applied to the wafer at the time of vacuum-chucking of the wafer. In FIG. 20, the horizontal axis represents a membrane height (mm) at the time of starting vacuum-chucking of the wafer, and the vertical axis represents stress applied to the wafer at the time of vacuum-chucking of the wafer. FIG. 20 shows the case in which the polishing pad has grooves, and the case in which the polishing pad has no grooves. As is apparent from FIG. 20, in the case of the polishing pad with grooves, if the membrane height becomes not less than 0.6 mm, then the deformation quantity of the wafer at the time of vacuum-chucking of the wafer becomes large. Accordingly, stress applied to the wafer increases. In the case of the polishing pad with no grooves, since the wafer cannot be removed from the polishing pad at the time of vacuum-chucking of the wafer, stress applied to the wafer gradually increases as the membrane height increases.

(111) (3) At the Time of Releasing of the Wafer

(112) After completing wafer processing on the polishing pad 101, the wafer W is vacuum-chucked to the top ring 1, and the top ring 1 is lifted and is then moved to a substrate transfer apparatus (pusher) where the wafer W is removed from the top ring 1.

(113) FIG. 21 is a schematic view showing the top ring 1 and a pusher 150, and is the view showing the state in which the pusher is elevated in order to transfer the wafer from the top ring 1 to the pusher 150. As shown in FIG. 21, the pusher 150 comprises a top ring guide 151 capable of being fitted with the outer peripheral surface of the retainer ring 3 for centering the top ring 1, a pusher stage 152 for supporting the wafer when the wafer is transferred between the top ring 1 and the pusher 150, an air cylinder (not shown) for vertically moving the pusher stage 152, and an air cylinder (not shown) for vertically moving the pusher stage 152 and the top ring guide 151.

(114) Next, operation of transfer of the wafer W from the top ring 1 to the pusher 150 will be described in detail. After the top ring 1 is moved above the pusher 150, the pusher stage 152 and the top ring guide 151 of the pusher 150 are lifted, and the top ring guide 151 is fitted with the outer peripheral surface of the retainer ring 3 to perform centering of the top ring 1 and the pusher 150. At this time, the top ring guide 151 pushes the retainer ring 3 up, and at the same time, vacuum is created in the retainer ring chamber 9, thereby lifting the retainer ring 3 quickly. Then, when lifting of the pusher is completed, the bottom surface of the retainer ring 3 is pushed by the upper surface of the top ring guide 151 and is thus located at a vertical position higher than the lower surface of the membrane 4. Therefore, a boundary between the wafer and the membrane is exposed. In the example shown in FIG. 21, the bottom surface of the retainer ring 3 is located at a position higher than the lower surface of the membrane by 1 mm. Thereafter, vacuum-chucking of the wafer W to the top ring 1 is stopped, and wafer release operation is carried out. Instead of lifting of the pusher, the top ring may be lowered to arrange a desired positional relationship between the pusher and the top ring.

(115) FIG. 22 is a schematic view showing a detailed structure of the pusher 150. As shown in FIG. 22, the pusher 150 has the top ring guide 151, the pusher stage 152, and release nozzles 153 formed in the top ring guide 151 for ejecting a fluid. A plurality of release nozzles 153 are provided at certain intervals in a circumferential direction of the top ring guide 151 to eject a mixed fluid of pressurized nitrogen and pure water in a radially inward direction of the top ring guide 151. Thus, a release shower comprising the mixed fluid of pressurized nitrogen and pure water is ejected between the wafer W and the membrane 4, thereby performing wafer release for removing the wafer from the membrane.

(116) FIG. 23 is a schematic view showing the state of the wafer release for removing the wafer from the membrane. As shown in FIG. 23, because a boundary between the wafer W and the membrane 4 is exposed, it is possible to eject the release shower between the wafer and the membrane 4 from the release nozzles 153 in a state of exposure of the membrane 4 to atmospheric pressure without pressurizing the membrane 4, i.e. without applying stress to the wafer W. Although the mixed fluid of pressurized nitrogen and pure water is ejected from the release nozzles 153, only a pressurized gas or a pressurized liquid may be ejected from the release nozzles 153. Further, a pressurized fluid of other combination may be ejected from the release nozzles 153. In some cases, adhesive force between the membrane and the rear surface of the wafer is strong depending on the condition of the rear surface of the wafer, and the wafer is difficult to be removed from the membrane. In such cases, the ripple area (ripple chamber 6) should be pressurized at a low pressure of not more than 0.1 MPa to assist removal of the wafer.

(117) FIGS. 24A and 24B are schematic views showing the case in which the ripple area is pressurized when the wafer is removed from the membrane. FIG. 24A shows the case in which the ripple area is pressurized, and FIG. 24B shows the case in which the ripple area is pressurized and the outer area is depressurized. As shown in FIG. 24A, when the ripple area (ripple chamber 6) is pressurized, the membrane 4 continues to be inflated to a large degree in a state in which the wafer W adheres to the membrane 4 (thus, stress applied to the wafer is large). Then, as shown in FIG. 24B, in the case where the ripple area (ripple chamber 6) is pressurized, in order to prevent the membrane from continuing to be inflated in a state in which the wafer W adheres to the membrane 4, the area other than the ripple area is depressurized to suppress inflation of the membrane 4. In the example shown in FIG. 24B, the outer area (outer chamber 7) is depressurized.

(118) Next, a specific structure of a top ring 1 which is suitably used in the present invention will be described below in detail. FIGS. 25 through 29 are cross-sectional views showing the top ring 1 along a plurality of radial directions of the top ring 1. FIGS. 25 through 29 are views showing the top ring 1 shown in FIG. 2 in more detail. As shown in FIGS. 25 through 29, the top ring 1 has a top ring body 2 for pressing a semiconductor wafer W against the polishing surface 101a, and a retainer ring 3 for directly pressing the polishing surface 101a. The top ring body 2 includes an upper member 300 in the form of a circular plate, an intermediate member 304 attached to a lower surface of the upper member 300, and a lower member 306 attached to a lower surface of the intermediate member 304. The retainer ring 3 is attached to a peripheral portion of the upper member 300 of the top ring body 2. As shown in FIG. 26, the upper member 300 is connected to the top ring shaft 111 by bolts 308. Further, the intermediate member 304 is fixed to the upper member 300 by bolts 309, and the lower member 306 is fixed to the upper member 300 by bolts 310. The top ring body 2 including the upper member 300, the intermediate member 304, and the lower member 306 is made of resin such as engineering plastics (e.g. PEEK). The upper member 300 may be made of metal such as SUS or aluminium.

(119) As shown in FIG. 25, the top ring 1 has an elastic membrane 4 attached to a lower surface of the lower member 306. The elastic membrane 4 is brought into contact with a rear face of a semiconductor wafer held by the top ring 1. The elastic membrane 4 is held on the lower surface of the lower member 306 by an annular edge holder 316 disposed radially outward and annular ripple holders 318 and 319 disposed radially inward of the edge holder 316. The elastic membrane 4 is made of a highly strong and durable rubber material such as ethylene propylene rubber (EPDM), polyurethane rubber, silicone rubber, or the like.

(120) The edge holder 316 is held by the ripple holder 318, and the ripple holder 318 is held on the lower surface of the lower member 306 by a plurality of stoppers 320. As shown in FIG. 26, the ripple holder 319 is held on the lower surface of the lower member 306 by a plurality of stoppers 322. As shown in FIG. 13, the stoppers 320 and the stoppers 322 are arranged along a circumferential direction of the top ring 1 at equal intervals.

(121) As shown in FIG. 25, a central chamber 5 is formed at a central portion of the elastic membrane 4. The ripple holder 319 has a passage 324 communicating with the central chamber 5. The lower member 306 has a passage 325 communicating with the passage 324. The passage 324 of the ripple holder 319 and the passage 325 of the lower member 306 are connected to a fluid supply source (not shown). Thus, a pressurized fluid is supplied through the passages 325 and 324 to the central chamber 5 formed by the elastic membrane 4.

(122) The ripple holder 318 has a claw 318b for pressing a ripple 314b of the elastic membrane 4 against the lower surface of the lower member 306. The ripple holder 319 has a claw 319a for pressing a ripple 314a of the elastic membrane 4 against the lower surface of the lower member 306. An edge 314c of the elastic membrane 4 is pressed by a claw 318c of the ripple holder 318 against the edge holder 316.

(123) As shown in FIG. 27, an annular ripple chamber 6 is formed between the ripple 314a and the ripple 314b of the elastic membrane 4. A gap 314f is formed between the ripple holder 318 and the ripple holder 319 of the elastic membrane 4. The lower member 306 has a passage 342 communicating with the gap 314f. Further, as shown in FIG. 25, the intermediate member 304 has a passage 344 communicating with the passage 342 of the lower member 306. An annular groove 347 is formed at a connecting portion between the passage 342 of the lower member 306 and the passage 344 of the intermediate member 304. The passage 342 of the lower member 306 is connected via the annular groove 347 and the passage 344 of the intermediate member 304 to a fluid supply source (not shown). Thus, a pressurized fluid is supplied through the passages to the ripple chamber 6. Further, the passage 342 is selectively connected to a vacuum pump (not shown). When the vacuum pump is operated, a semiconductor wafer is attached to the lower surface of the elastic membrane 4 by suction.

(124) As shown in FIG. 28, the ripple holder 318 has a passage 326 communicating with an annular outer chamber 7 formed by the ripple 314b and the edge 314c of the elastic membrane 4. Further, the lower member 306 has a passage 328 communicating with the passage 326 of the ripple holder 318 via a connector 327. The intermediate member 304 has a passage 329 communicating with the passage 328 of the lower member 306. The passage 326 of the ripple holder 318 is connected via the passage 328 of the lower member 306 and the passage 329 of the intermediate member 304 to a fluid supply source (not shown). Thus, a pressurized fluid is supplied through the passages 329, 328, and 326 to the outer chamber 7 formed by the elastic membrane 4.

(125) As shown in FIG. 29, the edge holder 316 has a claw for holding an edge 314d of the elastic membrane 4 on the lower surface of the lower member 306. The edge holder 316 has a passage 334 communicating with an annular edge chamber 8 formed by the edges 314c and 314d of the elastic membrane 4. The lower member 306 has a passage 336 communicating with the passage 334 of the edge holder 316. The intermediate member 304 has a passage 338 communicating with the passage 336 of the lower member 306. The passage 334 of the edge holder 316 is connected via the passage 336 of the lower member 306 and the passage 338 of the intermediate member 304 to a fluid supply source. Thus, a pressurized fluid is supplied through the passages 338, 336, and 334 to the edge chamber 8 formed by the elastic membrane 4. The central chamber 5, the ripple chamber 6, the outer chamber 7, the edge chamber 8, and the retainer ring chamber 9 are connected to the fluid supply source through regulators R1 to R5 (not shown), and valves V1-1-V1-3, V2-1-V2-3, V3-1-V3-3, V4-1-V4-3 and V5-1-V5-3 (not shown) as with the embodiment shown in FIG. 2.

(126) As described above, according to the top ring 1 in the present embodiment, pressing forces for pressing a semiconductor wafer against the polishing pad 101 can be adjusted at local areas of the semiconductor wafer by adjusting pressures of fluids to be supplied to the respective pressure chambers (i.e. the central chamber 5, the ripple chamber 6, the outer chamber 7, and the edge chamber 8) formed between the elastic membrane 4 and the lower member 306.

(127) FIG. 30 is an enlarged view of XXX part of the retainer ring shown in FIG. 27. The retainer ring 3 serves to hold a peripheral edge of a semiconductor wafer. As shown in FIG. 30, the retainer ring 3 has a cylinder 400 having a cylindrical shape, a holder 402 attached to an upper portion of the cylinder 400, an elastic membrane 404 held in the cylinder 400 by the holder 402, a piston 406 connected to a lower end of the elastic membrane 404, and a ring member 408 which is pressed downward by the piston 406.

(128) The ring member 408 comprises an upper ring member 408a coupled to the piston 406, and a lower ring member 408b which is brought into contact with the polishing surface 101a. The upper ring member 408a and the lower ring member 408b are coupled by a plurality of bolts 409. The upper ring member 408a is composed of a metal such as SUS or a material such as ceramics. The lower ring member 408b is composed of a resin material such as PEEK or PPS.

(129) As shown in FIG. 30, the holder 402 has a passage 412 communicating with the retainer ring chamber 9 formed by the elastic membrane 404. The upper member 300 has a passage 414 communicating with the passage 412 of the holder 402. The passage 412 of the holder 402 is connected via the passage 414 of the upper member 300 to a fluid supply source (not shown). Thus, a pressurized fluid is supplied through the passages 414 and 412 to the retainer ring chamber 9. Accordingly, by adjusting a pressure of a fluid to be supplied to the retainer ring chamber 9, the elastic membrane 404 can be expanded and contracted so as to vertically move the piston 406. Thus, the ring member 408 of the retainer ring 3 can be pressed against the polishing pad 101 under a desired pressure.

(130) In the illustrated example, the elastic membrane 404 employs a rolling diaphragm formed by an elastic membrane having bent portions. When an inner pressure in a chamber defined by the rolling diaphragm is changed, the bent portions of the rolling diaphragm are rolled so as to widen the chamber. The diaphragm is not brought into sliding contact with outside components and is hardly expanded and contracted when the chamber is widened. Accordingly, friction due to sliding contact can extremely be reduced, and a lifetime of the diaphragm can be prolonged. Further, pressing forces under which the retainer ring 3 presses the polishing pad 101 can accurately be adjusted.

(131) With the above arrangement, only the ring member 408 of the retainer ring 3 can be lowered. Accordingly, a pressing force of the retainer ring 3 can be maintained at a constant level by widening the space of the chamber 451 formed by the rolling diaphragm comprising an extremely low friction material even if the ring member 408 of the retainer ring 3 is worn out, without changing the distance between the lower member 306 and the polishing pad 101. Further, since the ring member 408, which is brought into contact with the polishing pad 101, and the cylinder 400 are connected by the deformable elastic membrane 404, no bending moment is produced by offset loads. Accordingly, surface pressures by the retainer ring 3 can be made uniform, and the retainer ring 3 becomes more likely to follow the polishing pad 101.

(132) Further, as shown in FIG. 30, the retainer ring 3 has ring-shaped retainer ring guide 410 for guiding vertical movement of the ring member 408. The ring-shaped retainer ring guide 410 comprises an outer peripheral portion 410a located at an outer circumferential side of the ring member 408 so as to surround an entire circumference of an upper portion of the ring member 408, an inner peripheral portion 410b located at an inner circumferential side of the ring member 408, and an intermediate portion 410c configured to connect the outer peripheral portion 410a and the inner peripheral portion 410b. The inner peripheral portion 410b of the retainer ring guide 410 is fixed to the lower member 306 of the top ring 1 by a plurality of bolts 411. The intermediate portion 410c configured to connect the outer peripheral portion 410a and the inner peripheral portion 410b has a plurality of openings 410h which are formed at equal intervals in a circumferential direction of the intermediate portion 410c.

(133) As shown in FIGS. 25 through 30, a connection sheet 420, which can be expanded and contracted in a vertical direction, is provided between an outer circumferential surface of the ring member 408 and a lower end of the retainer ring guide 410. The connection sheet 420 is disposed so as to fill a gap between the ring member 408 and the retainer ring guide 410. Thus, the connection sheet 420 serves to prevent a polishing liquid (slurry) from being introduced into the gap between the ring member 408 and the retainer ring guide 410. A band 421 comprising a belt-like flexible member is provided between an outer circumferential surface of the cylinder 400 and an outer circumferential surface of the retainer ring guide 410. The band 421 is disposed so as to cover a gap between the cylinder 400 and the retainer ring guide 410. Thus, the band 421 serves to prevent a polishing liquid (slurry) from being introduced into the gap between the cylinder 400 and the retainer ring guide 410.

(134) The elastic membrane 4 includes a seal portion (seal member) 422 which connects the elastic membrane 4 to the retainer ring 3 at an edge (periphery) 314d of the elastic membrane 4. The seal portion 422 has an upwardly curved shape. The seal portion 422 is disposed so as to fill a gap between the elastic membrane 4 and the ring member 408. The seal portion 422 is preferably made of a deformable material. The seal portion 422 serves to prevent the polishing liquid from being introduced into the gap between the elastic membrane 4 and the retainer ring 3 while allowing the top ring body 2 and the retainer ring 3 to be moved relative to each other. In the present embodiment, the seal portion 422 is formed integrally with the edge 314b of the elastic membrane 4 and has a U-shaped cross-section.

(135) If the connection sheet 420, the band 421 and the seal portion 422 are not provided, a polishing liquid, or a liquid for polishing an object may be introduced into an interior of the top ring 1 so as to inhibit normal operation of the top ring body 2 and the retainer ring 3 of the top ring 1. According to the present embodiment, the connection sheet 420, the band 421 and the seal portion 422 prevent a polishing liquid from being introduced into the interior of the top ring 1. Accordingly, it is possible to operate the top ring 1 normally. The elastic membrane 404, the connection sheet 420, and the seal portion 422 are made of a highly strong and durable rubber material such as ethylene propylene rubber (EPDM), polyurethane rubber, silicone rubber, or the like.

(136) In the chucking plate floating-type top ring which has been heretofore used, if the retainer ring 3 is worn out, a distance between the semiconductor wafer and the lower member 306 is varied to change a deformation manner of the elastic membrane 4. Thus, surface pressure distribution is also varied on the semiconductor wafer. Such a variation of the surface pressure distribution causes unstable polishing profile of the polished semiconductor wafer.

(137) According to the present embodiment, because the retainer ring 3 can vertically be moved independently of the lower member 306, a constant distance can be maintained between the semiconductor wafer and the lower member 306 even if the ring member 408 of the retainer ring 3 is worn out. Accordingly, the polishing profile of the semiconductor wafer can be stabilized.

(138) Although certain preferred embodiments of the present invention have been shown and described in detail, it should be understood that various changes and modifications may be made therein without departing from the scope of the appended claims.

INDUSTRIAL APPLICABILITY

(139) The present invention is applicable to a method and apparatus of polishing an object to be polished, or substrate, such as a semiconductor wafer to a flat mirror finish.