Abstract
We disclose herein a CMOS-based flow sensor comprising a substrate comprising an etched portion; a dielectric region located on the substrate, wherein the dielectric region comprises a dielectric membrane over an area of the etched portion of the substrate; a p-n junction type device formed within the dielectric membrane, wherein the p-n junction type device is configured to operate as a temperature sensing device.
Claims
1. A CMOS-based flow sensor comprising: a substrate comprising an etched portion; a dielectric region located on the substrate, wherein the dielectric region comprises a dielectric membrane over an area of the etched portion of the substrate; a p-n junction type device formed within the dielectric membrane, wherein the p-n junction type device is configured to operate as a temperature sensing device.
2. A flow sensor according to claim 1, wherein the p-n junction type device comprises at least one diode or an array of diodes, optionally, further comprising a heating element within the dielectric membrane.
3. (canceled)
4. A flow sensor according to claim 1, wherein the p-n junction type device comprises a transistor or an array of transistors, optionally wherein the transistor or the array of transistors comprises a diode.
5. (canceled)
6. A flow sensor according to claim 1, comprising a further p-n junction type device located outside the dielectric membrane, wherein the further p-n junction type device is configured to measure substrate temperature of the flow sensor; and/or wherein the p-n junction type device is operationally connected to a temperature sensing circuit.
7. (canceled)
8. A flow sensor according to claim 6, wherein the temperature sensing circuit comprises any one of a voltage proportional to absolute temperature (VPTAT) and a current proportional to absolute temperature (IPTAT).
9. A flow sensor according to claim 1, wherein the p-n junction type device is configured to operate as a heating element.
10. A flow sensor according to claim 1, further comprising a heating element within the dielectric membrane, optionally: wherein the p-n type device is located underneath the heating element within the dielectric membrane having the relatively high increase in temperature; and/or wherein the heating element comprises a material comprising tungsten; and/or wherein the heating element comprises a material comprising any one of: n or p type single crystal silicon; n or p type polysilicon; aluminium, titanium, silicides or any other metal or semi-conductive material available in a CMOS process; and/or wherein the heating element comprises amperometric and voltammetric connections; and/or comprising a further heating element which is configured to recalibrate the heating element within the dielectric membrane.
11. (canceled)
12. (canceled)
13. (canceled)
14. (canceled)
15. (canceled)
16. A flow sensor according to claim 9, wherein the p-n junction type device and/or the heating element is configured to increase temperature within the dielectric membrane, optionally wherein: the p-n junction type device is configured to measure heat exchange between the p-n junction type device and a fluid, and the p-n junction type device is configured to correlate the heat exchange to at least one property of the fluid so as to differentiate between forms of the fluid, further optionally wherein: the property of the fluid comprises any one of velocity, flow rate, exerted wall shear stress, pressure, temperature, direction, thermal conductivity, diffusion coefficient, density, specific heat, and kinematic viscosity.
17. (canceled)
18. (canceled)
19. A flow sensor according to claim 1, wherein the p-n type device is configured to operate in a forward bias mode in which a forward voltage across the p-n type device decreases linearly with a temperature when operated at a constant forward current.
20. A flow sensor according to claim 1, wherein the p-n type device is configured to operate in a reverse bias mode where a leakage current is exponentially dependent on a temperature.
21. A flow sensor according to claim 10, wherein the p-n type device and the heating element are configured to operate in any one of a pulse mode and a continuous mode.
22. A flow sensor according to claim 1, further comprising one or more temperature sensing elements, optionally wherein: said one or more temperature sensing elements comprise one or more thermopiles each comprising one or more thermocouples connected in series, optionally wherein: each thermocouple comprises two dissimilar materials which form a junction at a first region of the dielectric membrane, and the other ends of the materials form a junction at a second region of the membrane or in the heat sink region where they are electrically connected, optionally wherein either: the thermocouple comprises a metal selected from any one of aluminium, tungsten, titanium, and a combination of these materials, and any other metal available in a CMOS process; or the thermocouple comprises a material comprising doped polysilicon or doped single crystal silicon.
23. (canceled)
24. (canceled)
25. (canceled)
26. (canceled)
27. A flow sensor according to claim 22, wherein one temperature sensing element is configured to use for flow sensing and another temperature sensing element is configured to recalibrate said one temperature sensing element.
28. A flow sensor according to claim 22, wherein when one temperature sensing element is configured to fail, another temperature sensing element is configured to replace said one temperature sensing element.
29. A flow sensor according to claim 1, comprising a further etched portion in the substrate and a further dielectric membrane located over an area of the further etched portion of the substrate; optionally wherein: the further dielectric membrane comprises a further p-n junction type device; and/or the further dielectric membrane comprises a pressure sensor comprising a piezo-element.
30. (canceled)
31. (canceled)
32. A flow sensor according to claim 1, further comprising: circuitry formed on the same chip with said flow sensor; and/or; being formed with circuitry in the same package, optionally wherein: the circuitry comprises any one of switches, multiplexer, decoder, filter, amplifier, analogue to digital converter, timing blocks, RF communications circuits, and memories; or; circuitry is placed outside the area of said dielectric membrane area using an application specific integrated circuit (ASIC) or a discrete component, or a combination of ASIC and the discrete component.
33. (canceled)
34. (canceled)
35. (canceled)
36. A flow sensor according to claim 1, wherein the substrate comprises any one of: silicon; silicon on insulator; silicon carbide; gallium arsenide; gallium nitride; and/or a combination of silicon carbide, gallium arsenide, gallium nitride with silicon.
37. A flow sensor according to claim 1, wherein the device is packaged using one or more of: a metal transistor output (TO) type package; a ceramic, metal or plastic surface mount package; a flip-chip method; a chip or wafer level package; a printed circuitry board (PCB); optionally wherein the package is hermetically or semi-hermetically sealed with air, dry air, argon, nitrogen, xenon or any other noble gas; and/or the device is packaged in vacuum.
38. (canceled)
39. A flow sensor according to claim 1, further comprising through silicon via (TSV) configured to implement three dimensional (3D) stacking techniques; and/or wherein the dielectric membrane has any one of: a circular shape; a rectangular shape; a square shape; and a rounded corner shape; and/or wherein the p-n junction type device has any one of a circular shape, a rectangular shape, and a hexagonal shape.
40. (canceled)
41. (canceled)
42. A method of manufacturing a CMOS-based flow sensor, the method comprising: forming at least one dielectric membrane on a substrate comprising an etched portion, wherein the dielectric membrane is over an area of the etched portion of the substrate; forming a p-n junction type device within said at least one dielectric membrane, wherein the p-n junction type device operates as a temperature sensing device; optionally wherein: wherein said at least one dielectric membrane is formed by any one of: back-etching using Deep Reactive Ion Etching (DRIE) of the substrate, which results in vertical sidewalls; and using anisotropic etching such as KOH (Potassium Hydroxide) or TMAH (Tetra Methyl Ammonium Hydroxide) which results in slopping sidewalls.
43. (canceled)
44. (canceled)
Description
BRIEF DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0037] Some preferred embodiments of the invention will now be described by way of example only and with reference to the accompanying drawings, in which:
[0038] FIG. 1 shows a schematic cross-section of a SOI CMOS flow sensor, having a diode embedded within a portion of the substrate (i.e. a membrane) etched by DRIE resulting in vertical sidewalls;
[0039] FIG. 2 shows a schematic cross-section of a CMOS flow sensor, having a diode embedded within a portion of the substrate (i.e. a membrane) etched by wet etching resulting in slanted sidewalls;
[0040] FIG. 3 shows a schematic top view of a rectangular diode embedded within a circular membrane;
[0041] FIG. 4 shows a schematic top view of a circular diode embedded within a square membrane;
[0042] FIG. 5 shows a schematic cross-section of a CMOS flow sensor, having three diodes in series embedded within a membrane;
[0043] FIG. 6 shows a schematic cross-section of a CMOS flow sensor, having a diode embedded within a membrane as well as additional structures within and above the dielectric region;
[0044] FIG. 7 shows a schematic top view of a CMOS flow sensor chip, having a diode embedded within a membrane as well as a reference diode on the substrate;
[0045] FIG. 8 shows a schematic cross-section of a SOI CMOS flow sensor, having a diode and a heating element embedded within a membrane;
[0046] FIG. 9 shows a schematic top view of a diode embedded within a membrane underneath a wire-type heating element;
[0047] FIG. 10 shows a schematic cross-section of a CMOS flow sensor, having a diode embedded within a membrane underneath a heating element along with thermocouples;
[0048] FIG. 11 shows a schematic top view of a diode embedded within a membrane underneath a heating element along with two thermopiles with reference junctions on the substrate;
[0049] FIG. 12 shows a schematic top view of a diode embedded within a membrane underneath a heating element along with a thermopile with both junctions within the membrane;
[0050] FIG. 13 shows a schematic top view of a diode embedded within a membrane underneath a heating element along with additional diodes;
[0051] FIG. 14 shows a schematic top view of a multi ring type heating element within a membrane along with additional diodes;
[0052] FIG. 15 shows a schematic top view of two diodes embedded within a membrane, each underneath a heating element;
[0053] FIG. 16 shows a schematic top view of two arrays of diodes embedded within a membrane, each underneath a heating element in a cross-like arrangement;
[0054] FIG. 17 shows a schematic top view of a diode embedded within a membrane underneath a heating element along with additional thermopiles;
[0055] FIG. 18 shows a schematic cross-section of a double membrane CMOS multi sensor chip;
[0056] FIG. 19 shows a schematic top view of a double membrane CMOS multi sensor chip;
[0057] FIG. 20 shows a schematic top view of a multi membrane CMOS multi sensor chip;
[0058] FIG. 21 is an example of circuit implementing Constant Temperature Difference driving method using diodes for thermal feedback;
[0059] FIG. 22 is an example of circuital blocks that could be monolithically integrated on-chip;
[0060] FIG. 23 shows a schematic cross-section of a CMOS flow sensor, having: three diodes in series embedded within a membrane; circuits integrated on-chip; and through silicon vias (TSV);
[0061] FIG. 24 is an example of flow sensor, 3D stacked on an ASIC embedded within a PCB, with its surface flush with the PCB surface;
[0062] FIG. 25 is an example of sensor chip, having a sealed membrane cavity;
[0063] FIG. 26 illustrates an exemplary flow diagram outlining the manufacturing method of the flow sensor.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0064] FIG. 1 shows a schematic cross section of a SOI CMOS flow sensor comprising a substrate 1 comprising an etched portion obtained by dry etching and resulting in vertical sidewalls; a dielectric region located on the substrate comprising a first dielectric layer 2 (in a SOI process this is usually referred to as buried oxide layer, BOX), a second dielectric layer 3, and a passivation layer 4. The dielectric region located on the substrate also comprises a membrane over an area of the etched portion of the substrate. In FIG. 1, the membrane region is shown using two dashed-line boundaries within the dielectric region. The same definition applies in the remaining figures. The flow sensor also comprises a p-n junction type device formed within the dielectric membrane, wherein the p-n junction type device is a diode and comprises a p region 5 and an n region 6. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The diode can also be configured to operate as a heating element.
[0065] FIG. 2 shows a schematic cross section of a CMOS flow sensor comprising: a substrate 1 comprising an etched portion obtained by wet etching and resulting in slanted sidewalls; a dielectric region located on the substrate comprising a first dielectric layer 3, and a passivation layer 4. The dielectric region located on the substrate also comprises a membrane over an area of the etched portion of the substrate. The flow sensor also comprises a p-n junction type device formed within the dielectric membrane, wherein the p-n junction type device is a diode and comprises a p region 5 and an n region 6. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The diode can also be configured to operate as a heating element.
[0066] FIG. 3 shows a schematic top view of a rectangular diode comprising a p region 5 and an n region 6 embedded within a circular membrane 8. The membrane region 9 is the entire area within the perimeter of the circle. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The diode can also be configured to operate as a heating element.
[0067] FIG. 4 shows a schematic top view of a circular diode comprising a p region 5 and an n region 6 embedded within a square membrane 8. In this example, the membrane region 9 is the entire area within the square. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The diode can also be configured to operate as a heating element.
[0068] FIG. 5 shows a schematic cross section of a CMOS flow sensor comprising: a substrate 1 comprising an etched portion obtained by dry etching and resulting in vertical sidewalls; a dielectric region located on the substrate comprising a first dielectric layer 3, and a passivation layer 4. The dielectric region located on the substrate also comprises a membrane over an area of the etched portion of the substrate. The flow sensor also comprises a p-n junction type device formed within the dielectric membrane. The p-n junction type device is an array of three diodes in series, each diode comprising a p region 5 and an n region 6. The array of diodes is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The array of diodes can also be configured to operate as a heating element.
[0069] FIG. 6 shows a schematic cross section of a CMOS flow sensor comprising: a substrate 1 comprising an etched portion obtained by dry etching and resulting in vertical sidewalls; a dielectric region located on the substrate comprising a first dielectric layer 3, and a passivation layer 4. The dielectric region located on the substrate also comprises a membrane over an area of the etched portion of the substrate. The flow sensor also comprises a p-n junction type device formed within the dielectric membrane, wherein the p-n junction type device is a diode and comprises a p region 5 and an n region 6. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The array of diodes can also be configured to operate as heating element. The flow sensor also comprises additional structures within and above the dielectric region located on the substrate to engineer the thermo-mechanical properties (e.g. stiffness, temperature profile distribution, etc.) of the dielectric region and/or the fluid dynamic interaction between the fluid and the dielectric region.
[0070] FIG. 7 shows a schematic top view of a flow sensor chip 10 comprising a rectangular diode comprising a p region 5 and an n region 6 embedded within a circular membrane 8. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The diode can also be configured to operate as heating element. The flow sensor chip 10 also comprises a reference p-n junction type device 11 outside the membrane 8. The reference p-n junction type device 11 can be a diode and used to measure the substrate/case/ambient temperature for compensation purposes. Any of the p-n junction type devices can also be part of a more complex temperature sensing circuit, such as a VPTAT (voltage proportional to absolute temperature) or IPTAT (current proportional to absolute temperature).
[0071] FIG. 8 shows a schematic cross section of a SOI CMOS flow sensor comprising: a substrate 1 comprising an etched portion obtained by dry etching and resulting in vertical sidewalls; a dielectric region located on the substrate comprising a first dielectric layer 2 (in a SOI process this is usually referred to as buried oxide layer, BOX), a second dielectric layer 3, and a passivation layer 4. The dielectric region located on the substrate also comprises a membrane over an area of the etched portion of the substrate. The flow sensor also comprises a p-n junction type device formed within the dielectric membrane, wherein the p-n junction type device is a diode and comprises a p region 5 and an n region 6. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The flow sensor also comprises a resistor 12 formed within the dielectric membrane, wherein the resistor is configured to operate as a heating element.
[0072] FIG. 9 shows a schematic top view of a rectangular diode comprising a p region 5 and an n region 6 embedded within a circular membrane 8. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The membrane 8 also comprises a resistor 12, wherein the resistor is configured to operate as a heating element. The resistor 12 is connected to metal tracks for external access, wherein the tracks are configured to allow 4-wires type measurement of the resistor 12 resistance and comprise amperometric tracks 13 and voltammetric tracks 14.
[0073] FIG. 10 shows a schematic cross section of a CMOS flow sensor comprising: a substrate 1 comprising an etched portion obtained by dry etching and resulting in vertical sidewalls; a dielectric region located on the substrate comprising a first dielectric layer 3, and a passivation layer 4. The dielectric region located on the substrate also comprises a membrane over an area of the etched portion of the substrate. The flow sensor also comprises a p-n junction type device formed within the dielectric membrane, wherein the p-n junction type device is a diode and comprises a p region 5 and an n region 6. The diode is configured to operate as a temperature sensing device. The flow sensor also comprises a resistor 12 formed within the dielectric membrane, wherein the resistor is configured to operate as heating element. The flow sensor also comprises thermopiles 15 and 16 used as additional temperature sensing elements. A thermopile comprises one or more thermocouples connected in series. Each thermocouple comprises two dissimilar materials which form a junction at a first region of the membrane, while the other ends of the materials form a junction in the heat sink region (substrate outside the membrane area), where they are connected electrically to the adjacent thermocouple or to pads for external readout.
[0074] FIG. 11 shows a schematic top view of a rectangular diode comprising a p region 5 and an n region 6 embedded within a circular membrane 8. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The membrane 8 also comprises a resistor 12, wherein the resistor is configured to operate as heating element. The resistor 12 is connected to metal tracks 13 for external access. The membrane also comprises thermopiles used as additional temperature sensing elements. A thermopile comprises one or more thermocouples connected in series. Each thermocouple comprises two dissimilar materials 17 and 18 which form a junction 19 at a first region of the membrane, while the other ends of the materials form a junction 20 in the heat sink region (substrate outside the membrane area), where they are connected electrically to the adjacent thermocouple or to pads for external readout.
[0075] FIG. 12 shows a schematic top view of a rectangular diode comprising a p region 5 and an n region 6 embedded within a circular membrane 8. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The membrane 8 also comprises a resistor 12, wherein the resistor is configured to operate as heating element. The resistor 12 is connected to metal tracks 13 for external access. The membrane also comprises a thermopile used as additional temperature sensing element. A thermopile comprises one or more thermocouples connected in series. Each thermocouple comprises two dissimilar materials 17 and 18 which form a junction 19 at a first region of the membrane, while the other ends of the materials form a junction 20 at a second region of the membrane, where they are connected electrically to the adjacent thermocouple or to pads for external readout.
[0076] FIG. 13 shows a schematic top view of a rectangular diode comprising a p region 5 and an n region 6 embedded within a circular membrane 8. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The membrane 8 also comprises a resistor 12, wherein the resistor is configured to operate as a heating element. The resistor 12 is connected to metal tracks 13 for external access. The membrane also comprises additional p-n junction type devices formed within the membrane 8, wherein the p-n junction types device are diodes 21 configured to operate as additional temperature sensing devices.
[0077] FIG. 14 shows a schematic top view of four diodes, each comprising a p region 5 and an n region 6 embedded within a circular membrane 8. The diodes are connected to metal tracks 7 for external access, and are configured to operate as temperature sensing devices. The membrane 8 also comprises a multi ring-type resistor 12, wherein the resistor is configured to operate as heating element. The resistor 12 is connected to metal tracks 13 for external access.
[0078] FIG. 15 shows a schematic top view of two rectangular diodes, each comprising a p region 5 and an n region 6 embedded within a rectangular membrane 8 with rounded corners. The diodes are connected to metal tracks 7 for external access, and are configured to operate as temperature sensing devices. The membrane 8 also comprises two resistors 12, wherein the resistors are configured to operate as heating elements. The resistors 12 are connected to metal tracks 13 for external access.
[0079] FIG. 16 shows a schematic top view of two arrays of diodes, each formed by two rectangular diodes, each comprising a p region 5 and an n region 6 embedded within a circular membrane 8 in a cross-like arrangement. The diodes are connected to metal tracks 7 for external access, and are configured to operate as a temperature sensing devices. The membrane 8 also comprises two resistors 12 in a cross-like arrangement, wherein the resistors are configured to operate as heating elements. The resistors 12 are connected to metal tracks 13 for external access.
[0080] FIG. 17 shows a schematic top view of a rectangular diode comprising a p region 5 and an n region 6 embedded within a rectangular membrane 8 with rounded corners. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The membrane 8 also comprises a resistor 12, wherein the resistor is configured to operate as heating element. The resistor 12 is connected to metal tracks 13 for external access. The membrane also comprises thermopiles used as additional temperature sensing elements. A thermopile comprises one or more thermocouples connected in series. Each thermocouple comprises two dissimilar materials 17 and 18 which form a junction 19 at a first region of the membrane, while the other ends of the materials form a junction 20 at a second region of the membrane, where they are connected electrically to the adjacent thermocouple or to pads for external readout.
[0081] FIG. 18 shows a schematic cross section of a double membrane CMOS multi sensor chip comprising: a substrate 1 comprising two etched portions obtained by dry etching and resulting in vertical sidewalls; a dielectric region located on the substrate comprising a first dielectric layer 3, and a passivation layer 4. The dielectric region located on the substrate also comprises two membranes over an area of the etched portions of the substrate. The flow sensor also comprises a p-n junction type device formed within a first dielectric membrane, wherein the p-n junction type device is a diode and comprises a p region 5 and an n region 6. The diode is configured to operate as a temperature sensing device. The flow sensor also comprises a resistor 12 formed within the first dielectric membrane, wherein the resistor is configured to operate as heating element. The flow sensor also comprises a p-n junction type device formed within a second dielectric membrane, wherein the p-n junction type device is a diode configured to operate as a temperature sensing device. The flow sensor also comprises piezo-elements 22 formed within the second dielectric membrane, wherein the piezo-elements are piezo-resistors configured to operate as pressure sensing devices.
[0082] FIG. 19 shows a schematic top view of a double membrane CMOS multi sensor chip 23. The multi sensor chip 23 comprises a first rectangular diode comprising a p region 5 and an n region 6 embedded within a first square membrane 8. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The membrane 8 also comprises a zigzag-type resistor 12, wherein the resistor is configured to operate as heating element. The resistor 12 is connected to metal tracks 13 for external access. The multi sensor chip also comprises a second rectangular diode embedded within a second square membrane 24 and configured to operate as a temperature sensing device. The flow sensor also comprises piezo-elements 22 formed within the second membrane 24, wherein the piezo-elements are piezo-resistors configured to operate as pressure sensing devices.
[0083] FIG. 20 shows a schematic top view of a multi membrane CMOS multi sensor chip 25. The multi sensor chip 25 comprises a first rectangular diode comprising a p region 5 and an n region 6 embedded within a first circular membrane 8. The diode is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The membrane 8 also comprises a wire-type resistor 12, wherein the resistor is configured to operate as heating element. The resistor 12 is connected to metal tracks 13 for external access. The membrane 8 also comprises a thermopile configured to operate as additional temperature sensing element. The multi sensor chip also comprises a second rectangular diode embedded within a second circular membrane 24 and configured to operate as a temperature sensing device. The membrane 24 also comprises a wire-type resistor, wherein the resistor is configured to operate as a heating element and a thermopile configured to operate as additional temperature sensing element. The multi sensor chip also comprises a third rectangular diode embedded within a first square membrane 26 and configured to operate as a temperature sensing device. The square membrane also comprises piezo-elements 22, wherein the piezo-elements are piezo-resistors configured to operate as pressure sensing devices. The multi sensor chip 25 also comprises a reference p-n junction type device 11 outside the membranes 8, 24, and 26. The reference p-n junction type device 11 can be a diode and used to measure the substrate/case/ambient temperature for compensation purposes.
[0084] FIG. 21 is an example of is an example of circuit implementing Constant Temperature Difference driving method using diode D.sub.h, driven with the current generator I.sub.Dh, to obtain a thermal feedback of the temperature of the heating resistor R.sub.h and using diode D.sub.a, driven with the current generator I.sub.Da, to obtain a thermal feedback of the substrate/case/ambient for compensation purposes. The operating temperature of the heating resistor R.sub.h is set through the signal V.sub.control. The current in the resistor R.sub.h is controlled with the transistor T, having its gate controlled by the output signal of the amplifier A2.
[0085] FIG. 22 is an example of circuital blocks that could be monolithically integrated on chip. These blocks include but are not limited to: driving circuital blocks, to drive the heating element and/or the sensing elements; substrate/case/ambient temperature sensing circuital blocks, that can be used as an input to the driving circuital blocks, as shown in FIG. 21; membranes comprising any of the sensing structures disclosed in the preferred embodiments; amplification circuital blocks to manipulate the analogue outputs of the sensing structures, the amplification circuital blocks may include amplifiers as well as filters for noise reduction or any other means to manipulate analogue signals; analogue to digital converters to allow digital processing, storage and communication of the sensing structures output. The circuital blocks can also receive data from the outside world, allowing remote control over amplification parameters, A/D conversion, driving and data stored in memory. Other circuital blocks might be included as well, such as multiplexers and de-multiplexer to select one among the many available sensing structures on chip; switches might also be integrated to switch on/off some or all circuital blocks and thus reducing power consumption.
[0086] FIG. 23 shows a schematic cross section of a CMOS flow sensor comprising: a substrate 1 comprising an etched portion obtained by dry etching and resulting in vertical sidewalls; a dielectric region located on the substrate comprising a first dielectric layer 3, and a passivation layer 4. The dielectric region located on the substrate also comprises a membrane over an area of the etched portion of the substrate. The flow sensor also comprises a p-n junction type device formed within the dielectric membrane, wherein the p-n junction type device is an array of three diodes in series, each diode comprising a p region 5 and an n region 6. The array of diodes is connected to metal tracks 7 for external access, and is configured to operate as a temperature sensing device. The array of diodes can also be configured to operate as a heating element. The flow sensor also comprises some monolithically integrated electronics herein exemplified by a MOSFET 27. The flow sensor may also comprise Through Silicon Vias (TSV) 28, thus avoiding the presence of bonding wires that could affect the flow on the device surface.
[0087] FIG. 24 is an example of a flow sensor, 3D stacked on an ASIC embedded within a PCB 29, with its surface flush with the PCB surface.
[0088] FIG. 25 is an example of sensor chip 3D stacked on a sealing substrate. The substrate may be a silicon substrate or any other substrate that allows sealing of the cavity below the sensor membrane. The substrate may also be an ASIC.
[0089] FIG. 26 illustrates an exemplary flow diagram outlining the manufacturing method of the flow sensor.
[0090] The skilled person will understand that in the preceding description and appended claims, positional terms such as above, overlap, under, lateral, etc. are made with reference to conceptual illustrations of an device, such as those showing standard cross-sectional perspectives and those shown in the appended drawings. These terms are used for ease of reference but are not intended to be of limiting nature. These terms are therefore to be understood as referring to a device when in an orientation as shown in the accompanying drawings.
[0091] It will be appreciated that all doping polarities mentioned above may be reversed, the resulting devices still being in accordance with embodiments of the present invention.
[0092] Although the invention has been described in terms of preferred embodiments as set forth above, it should be understood that these embodiments are illustrative only and that the claims are not limited to those embodiments. Those skilled in the art will be able to make modifications and alternatives in view of the disclosure which are contemplated as falling within the scope of the appended claims. Each feature disclosed or illustrated in the present specification may be incorporated in the invention, whether alone or in any appropriate combination with any other feature disclosed or illustrated herein.
