FIRMWARE UPDATE SYSTEM
20190317753 ยท 2019-10-17
Inventors
Cpc classification
H04L67/34
ELECTRICITY
International classification
Abstract
A server comprising: a controller; wherein the controller sends update notices of firmware to electronic devices of predetermined units per predetermined time.
Claims
1. A server comprising a controller, wherein the controller sends update notices of firmware to electronic devices of predetermined units per predetermined time.
2. The server according to claim 1, wherein the controller sends a notice indicating that there is no firmware update to the other electronic devices when the controller sends update notices of firmware to electronic devices of predetermined units.
3. The server according to claim 1, wherein the controller stores network addresses of electronic devices to which the update notices of firmware is sent.
4. The server according to claim 3, wherein the controller does not send the update notices of firmware to electronic devices of which network addresses are stored.
5. The server according to claim 3, wherein the controller deletes the stored network addresses after the controller stores network addresses and predetermined time passes.
6. A firmware update system comprising: a server comprising a controller, wherein the controller sends update notices of firmware to electronic devices of predetermined units per predetermined time, and an electronic device.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0012] An objective of the present invention is to control update of a firmware by an electronic device.
[0013] Hereinafter, an embodiment of the present disclosure will be described.
[0014]
[0015] As illustrated in
[0016] The microcomputer 201 is composed of hardware such as a CPU (Central Processing Unit), a ROM (Read Only Memory) and a RAM (Random Access Memory). The microcomputer 201 controls respective sections composing the AV receiver 2 according to a program which is stored in the ROM. The RAM functions as a main memory of the CPU. The ROM stores a program. The storage section 202 stores firmware.
[0017] The display section 203 displays a setting screen and so on, and is an LCD (Liquid Crystal Display) or a vacuum fluorescent display. The operation section 204 is for receiving user operation and is operation buttons which are provided at an enclosure of the AV receiver 2 and or a remote controller. For example, a user can direct a volume value of an audio signal to the AV receiver 2 by operating the operation section 204.
[0018] The CD player 10 is connected to the digital signal input terminal 205. An SPDIF signal is input to the digital signal input terminal 205 from the CD player 10. The DIR 206 converts the SPDIF signal which is input from the CD player 10 into an I2S signal. The converted I2S signal is output to the DSP 207. The DSP 207 performs digital signal processing such as equalizer processing to the I2S signal. The I2S signal subjected to the digital signal processing is output to the DAC 208. The DAC 208 D/A-converts the I2S signal into an analog audio signal. The
[0019] D/A-converted analog audio signal is output to the volume adjustment section 209.
[0020] The volume adjustment section 209 adjusts a volume value of the analog audio signal. The analog audio signal the volume value of which is adjusted is output to the amplifier 210. The amplifier 210 amplifies the analog audio signal the volume value of which is adjusted. The amplified analog audio signal is output to the speaker terminal 211. The speaker 20 is connected to the speaker terminal 211. The speaker 20 outputs an audio based on the analog audio signal.
[0021] The NW I/F 212 is for communicating with an external device via a network. The CPU 201 communicates with the external device (the server 5) via the network by the NW I/F 212.
[0022] The server 5 includes a microcomputer 501, a storage section 502, and a network interface (hereinafter referred as to NW I/F) 503. The microcomputer 501 (second controller) is composed of hardware such as a CPU, a RAM, and a ROM. The CPU controls respective sections composing the server 5 according to a program which is stored in the ROM. The RAM functions as a main memory of the CPU. The ROM stores a program. The storage section 502 (second storage section) stores update packages and MAC addresses (network addresses). The NW I/F 503 is for communicating with an external device. The CPU 501 communicates with external devices (the AV receivers 2 to 4) via the network by the NW I/F 503.
[0023] The microcomputer 501 sends notices which indicate performing update display of firmware (header information with update display, update notice of firmware) to AV receivers of M units (predetermined units) per one day (predetermined time). In other words, the microcomputer 501 limits number of notices which indicate performing update display of firmware which is sent to the AV receivers to M units per one day (predetermined time), for example. Further, when the microcomputer 501 sends notices which indicate performing update display of firmware to AV receivers of M units (predetermined units) per one day (predetermined time), the microcomputer 501 sends notices which indicate not to perform update display of firmware (header information without update display, notice indicating no update of a firmware) to the other AV receivers. In this manner, the header information without update display and the header information with update display are used. Publication package which is prepared in the server 5 is one.
[0024] When the microcomputer 501 counts accesses times and access times are within access limit count (M times), the microcomputer 501 sends the header information with update display to the AV receivers. When the microcomputer 501 counts accesses times and access times are more than access limit count (M times) per one day, the microcomputer 501 sends the header information without update display to the AV receivers. When there is an access from the AV receiver, the microcomputer 501 counts access times from the AV receivers by subtracting one from access limit count (M times) (access limit count1). Therefore, when access limit count is not 0, the microcomputer 501 sends the header information with update display to the AV receivers. When access limit count is 0, the microcomputer 501 sends the header information without update display to the AV receivers.
[0025] For example, as a place of destination, when there are America, Europe, and Japan, distinction is made between destinations, and when there is an access in each destination from 0 o'clock to 24 o'clock, update notices are preformed to AV receivers of first arrival M units. Therefore, when there is update check (file demand) against the server from AV receivers, the microcomputer 501 refers to access limit count for each destination. When there are accesses more than M times, update notice is not performed. In this case, a user performs update from a set-up screen.
[0026] Processing operation of the server 5 is described based on a flow chart illustrated in
[0027] When the microcomputer 501 judges that access times are within access limit count of one day, namely, access limit count is not 0(S2: Yes), the microcomputer 501 sends the header information with update display to the AV receiver (S4). Therefore, in the AV receiver, the message to ask the user to update firmware or not is displayed. When the user selects to update firmware, firmware update is performed by the AV receiver.
[0028] Next, the microcomputer 501 subtracts one from access limit count (S5). When the microcomputer 501 judges that there is not a file demand from the AV receiver (S1: No), the microcomputer 501 judges whether one day passes or not after processing of S3 or S5 (S6). When the microcomputer 501 judges that one day does not pass (S6: No), the microcomputer 501 performs processing of S1. When the microcomputer 501 judges that one day passes (S6: Yes), the microcomputer 501 resets access limit count (S7).
[0029] In this manner, access limit count is reset when date changes. And, access limit count is updated with a file demand first arrival order again. When there are accesses from the same AV receiver multiple times a day (or IP (Internet Protocol) address), multiple accesses are summarized to one count and count is not subtracted.
[0030] As described above, units of AV receivers to which update notices are sent per one day are limited. Units limit may be set per one hour, and limit is cleared per 24 hours (see
[0031] For example, in first one hour (access MAC 1), when there are accesses of AV receivers of MAC addresses MAC A, MAC B, MAC C and MAC D, the microcomputer 501 stores these MAC addresses. Further, the microcomputer 501 sends update notices to these AV receivers. In other words, the microcomputer 501 stores MAC addresses of the AV receivers to which update notices are sent.
[0032] Further, in next one hour (access MAC 2), when there are accesses of AV receivers of MAC addresses MAC E, MAC F, MAC G and MAC H, the microcomputer 501 stores these MAC addresses. Further, the microcomputer 501 sends update notices to these AV receivers. In other words, the microcomputer 501 stores MAC addresses of the AV receivers to which update notices are sent.
[0033] When there is access from the AV receiver of MAC address which is stored (recorded in the table), the microcomputer 501 does not send update notice to the AV receiver. The microcomputer stores MAC address for 24 hours. After 24 hours passes, the microcomputer 501 clears the MAC address. For example, the microcomputer 501 stores MAC addresses of MAC A, MAC B, MAC C, and MAC D. After 24 hours pass, the microcomputer 501 clears these MAC addresses.
[0034] And, newly, when there are accesses from AV receivers of MAC addresses MAC AA, MAC AB, MAC AC, and MAC AD, the microcomputer 501 stores these MAC addresses.
[0035] As described above, MAC addresses of MAC A to MAC D to which update notices are sent once are held in the table of access MAC 1 and update notices are not sent as long as 24 hours pass. For this reason, in the AV receiver, update display is not performed. After 24 hours pass, the table of access MAC 1 is discarded. Until AV receivers which newly access reach upper limit N units, update notices are sent and these MAC addresses are held in the table.
[0036] As described above, in the present embodiment, the microcomputer 501 sends update notices of firmware to AV receivers of a predetermined unit per predetermined time. Thus, concentration of accesses from AV receivers to the server 5 can be suppressed. In this manner, according to the present embodiment, firmware update by AV receivers can be controlled (suppressed) by simple means.
[0037] Further, in the present embodiment, the microcomputer 501 does not send update notice to AV receivers of which MAC addresses are stored. Thus, it is prevented that chances that the other AV receivers receive update notices are decreased by AV receivers to which update notice are sent once.
[0038] The embodiment of the present invention is described above, but the mode to which the present invention is applicable is not limited to the above embodiment and can be suitably varied without departing from the scope of the present invention.
[0039] In the above-mentioned embodiment, MAC address is illustrated as network address. Not limited to this, the network address may be IP address.
[0040] In the above-mentioned embodiment, the AV receivers 2 to 4 are illustrated as an electronic device. Not limited to this, the electronic device which includes firmware may be employed.
[0041] The present invention can be suitably employed in a firmware update system which updates firmware, and a server composing the firmware update system.