Interface conversion circuit, display panel driving method and display apparatus
10447964 ยท 2019-10-15
Assignee
Inventors
Cpc classification
H04N7/0125
ELECTRICITY
G09G5/005
PHYSICS
G09G2370/20
PHYSICS
G09G2370/14
PHYSICS
G09G2370/10
PHYSICS
H04N7/01
ELECTRICITY
G09G3/20
PHYSICS
International classification
H04N7/01
ELECTRICITY
G09G5/00
PHYSICS
G09G3/20
PHYSICS
Abstract
An interface conversion circuit, a display panel driving method and a display apparatus for realizing UHD image display at least by a LVDS interface together with an UHD display apparatus are provided. The interface conversion circuit comprises a low voltage differential signaling (LVDS) interface and a data format conversion module. The LVDS interface is configured to receive a LVDS signal from a LVDS signal source and transmit the LVDS signal to the data format conversion module. The data format conversion module is configured to convert the received LVDS signal into a digital video interface eDP signal.
Claims
1. An interface conversion circuit comprising a low voltage differential signaling (LVDS) interface, a digital video (eDP) interface, a timing controller and a data format conversion module, wherein the LVDS interface is configured to receive a LVDS signal from a LVDS signal source and transmit the LVDS signal to the data format conversion module; the eDP interface is configured to receive a first eDP signal from an eDP signal source and to transmit the first eDP signal to the timing controller; the data format conversion module is configured to convert the received LVDS signal into a second eDP signal and to transmit the second eDP signal to the timing controller; and the timing controller is configured to receive the first eDP signal from the eDP interface or the second eDP signal from the data format conversion module.
2. The interface conversion circuit according to claim 1, wherein the data format conversion module at least comprises a first data format converter and a second data format converter; the first data format converter is configured to convert the LVDS signal into a transistor-transistor logic level (TTL) signal; and the second data format converter is configured to convert the TTL signal into the second eDP signal.
3. The interface conversion circuit according to claim 1, further comprising a switch module whose first input terminal is connected to the data format conversion module, whose second input terminal is connected to the eDP interface, and whose output terminal is connected to the timing controller, wherein the switch module is configured to control the first eDP signal from the eDP interface or the second eDP signal from the data format conversion module to be output to the timing controller according to a control signal.
4. The interface conversion circuit according to claim 3, further comprising a controller connected to the switch module, wherein the controller is configured to control the switch module to output the second eDP signal from the data format conversion module when receiving a first control signal and to control the switch module to output the first eDP signal from the eDP interface when receiving a second control signal.
5. The interface conversion circuit according to claim 3, further comprising a controller connected to the switch module and a control interface connected to the controller, wherein the controller is configured to control the switch module to output the second eDP signal from the data format conversion module when receiving a first control signal from the control interface and to control the switch module to output the first eDP signal from the eDP interface when receiving a second control signal from the control interface.
6. The interface conversion circuit according to claim 3, further comprising a controller connected to the switch module, wherein a first input terminal of the controller is connected to the LVDS interface, and a second input terminal of the controller is connected to the eDP interface; and the controller is configured to control the switch module to output the second eDP signal from the data format conversion module when receiving a first control signal from the LVDS interface and to control the switch module to output the first eDP signal from the eDP interface when receiving a second control signal from the eDP interface.
7. A display apparatus comprising an interface conversion circuit and a display panel comprising a timing controller, wherein the interface conversion circuit is an interface conversion circuit comprising a low voltage differential signaling (LVDS) interface, a digital video (eDP) interface, a timing controller and a data format conversion module, wherein the LVDS interface is configured to receive a LVDS signal from a LVDS signal source and transmit the LVDS signal to the data format conversion module; the eDP interface is configured to receive a first eDP signal from an eDP signal source and to transmit the first eDP signal to the timing controller; the data format conversion module is configured to convert the received LVDS signal into a second eDP signal and to transmit the second eDP signal to the timing controller; and the timing controller is configured to receive the first eDP signal from the eDP interface or the second eDP signal from the data format conversion module.
8. The display apparatus according to claim 7, wherein the data format conversion module at least comprises a first data format converter and a second data format converter; the first data format converter is configured to convert the LVDS signal into a transistor-transistor logic level (TTL) signal; and the second data format converter is configured to convert the TTL signal into the second eDP signal.
9. The display apparatus according to claim 7, further comprising a switch module whose first input terminal is connected to the data format conversion module, whose second input terminal is connected to the eDP interface, and whose output terminal is connected to the timing controller, wherein the switch module is configured to control the first eDP signal from the eDP interface or the second eDP signal from the data format conversion module to be output to the timing controller according to a control signal.
10. The display apparatus according to claim 9, further comprising a controller connected to the switch module, wherein the controller is configured to control the switch module to output the second eDP signal from the data format conversion module when receiving a first control signal and to control the switch module to output the first eDP signal from the eDP interface when receiving a second control signal.
11. The display apparatus according to claim 9, further comprising a controller connected to the switch module and a control interface connected to the controller, wherein the controller is configured to control the switch module to output the second eDP signal from the data format conversion module when receiving a first control signal from the control interface and to control the switch module to output the first eDP signal from the eDP interface when receiving a second control signal from the control interface.
12. The display apparatus according to claim 9, further comprising a controller connected to the switch module, wherein a first input terminal of the controller is connected to the LVDS interface, and a second input terminal of the controller is connected to the eDP interface; and the controller is configured to control the switch module to output the second eDP signal from the data format conversion module when receiving a first control signal from the LVDS interface and to control the switch module to output the first eDP signal from the eDP interface when receiving a second control signal from the eDP interface.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1)
(2)
(3)
(4)
(5)
(6)
DETAILED DESCRIPTION
(7) Embodiments of the present disclosure provide an interface conversion circuit, a display panel driving method and a display apparatus for realizing UHD image display at least by a LVDS interface together with an UHD display apparatus.
(8) The interface conversion circuit comprises a low voltage differential signaling (LVDS) interface and a data format conversion module. The LVDS interface is configured to receive a LVDS signal from a LVDS signal source and transmit the LVDS signal to the data format conversion module. The data format conversion module is configured to convert the received LVDS signal into a digital video interface eDP signal. Thereby, UHD image display is realized at least by a LVDS interface together with an UHD display apparatus.
(9) In order to extend the function of the interface conversion circuit, further, the interface conversion circuit also comprises a digital video eDP interface configured to receive an eDP signal from an eDP signal source and to transmit the eDP signal to a timing controller.
(10) The new digital video interface eDP is a digital interface based on the Display Port structure and protocol, and is a new digital audio and video interface defined by the video electronics standards association (VESA) for replacing the conventional analog video interface (VGA), digital video interface (DVI) and internal interface between the system and the panel (LVDS interface), eDP has large bandwidth and supports HD and UHD. It has large advantages in the HD display. More and more related modules have been applied in the display modules of FHD and higher resolution.
(11) In the following, technical solutions provided by embodiments of the present disclosure will be described exemplarily in connection with the figures.
(12) Referring to
(13) The present disclosure provides the data format conversion module between the timing controller and the LVDS interface to convert the LVDS signal into the digital video interface eDP signal, realizing UHD image display by the LVDS interface. The UHD display panel with such a solution can be configured with a system side with the LVDS interface, improving compatibility between the system side and the display panel.
(14) The data format conversion module 2 is any data format conversion module that can convert the LVDS signal into the eDP signal. For example, the data format conversion module 2 can be a data format converter that directly converts the LVDS signal into the eDP signal, or can be a module that converts the LVDS signal into a signal with a preset format and then converts the signal with the preset format into the eDP signal.
(15) Referring to
(16) For example, the first data format converter 21 is for example configured to convert the LVDS signal into a transistor-transistor logic level (TTL) signal, that is, to convert the LVDS signal into R[0:9], G[0:9], B[0:9] signals and corresponding control signals; the second data format converter 22 is for example configured to convert the TTL signal into the eDP signal, that is, convert R[0:9], G[0:9], B[0:9] signals and corresponding control signals into an eDP data packet and a control signal.
(17) The above embodiment realizes the conversion of the LVDS signal into the eDP signal by the first data format converter 21 and the second data format converter 22.
(18) Referring to
(19) For example, the timing controller outputs the eDP signal to the display panel. The timing controller is a timing controller (eDP) with an eDP interface. The display panel is an UHD display panel.
(20) Further, referring to
(21) For example, when displaying HD images is needed, the eDP signal source is connected to the eDP interface to provide the eDP signal to the display apparatus, or the LVDS signal source is connected to the LVDS interface to realize UHD image display through converting the LVDS signal into the eDP signal by the data format conversion module.
(22) In order to avoid wrong input when inputting the data from the LVDS signal source and the data provided by the eDP signal source, referring to
(23) In other words, at a certain time, only the eDP signal from the data format conversion module or the eDP signal from the eDP interface can be sent to the timing controller to avoid the mistake of sending the eDP signal from the data format conversion module and the eDP signal from the eDP interface to the timing controller simultaneously.
(24) In some embodiments, the switch module can be a Single-Pole-Double-Throw switch.
(25) Referring to
(26) The system side outputs the first control signal or the second control signal to the controller to inform the controller to output the eDP signal of the corresponding interface to the timing controller while outputting the LVDS signal or the eDP signal.
(27) For example, it can be defined that the controller controls the switch module to output the eDP signal from the data format conversion module when receiving a high level signal, and the controller controls the switch module to output the eDP signal from the eDP interface when receiving a low level signal. As such, the system side can control switch module to output the eDP signal by supplying a high level or a low level signal to the controller while outputting the LVDS interface signal.
(28) The switch module can be realized by a control interface. As shown in
(29) For example, referring to
(30) Referring to
(31) An embodiment of the present disclosure also provides a display apparatus at least comprising an interface conversion circuit and a display panel comprising a timing controller, wherein the interface conversion circuit is any one of the interface conversion circuits provided by the above embodiments. The display apparatus can be a liquid crystal panel, a liquid crystal display, a liquid crystal TV set, an organic electroluminescence display OLED panel, an OLED display, an OLED TV set, an electronic paper or the like.
(32) An embodiment of the present disclosure also provides a display panel driving method, which, based on the interface conversion circuit, comprises the following: when the data format conversion module receives a LVDS signal, converting the LVDS signal into an eDP signal and transmitting the eDP signal to the timing controller; and the timing controller processing the eDP signal and outputting the processed eDP signal to a display panel.
(33) The procedure of the timing controller processing the eDP signal is to process the eDP signal as a gray-scale voltage signal for driving pixels to realize image display. The procedure is similar to the known technology, which will not be repeatedly described here.
(34) Since the LVDS signal can reduce electromagnetic disturbance and has high immunity from noise, currently, data transmission through the LVDS interface still occupies a large portion.
(35) Further, the LVDS signal is converted into the eDP signal, for example, the LVDS signal is converted into a TTL signal which is then converted into the eDP signal.
(36) Of course, it is not limited to convert the LVDS signal into the TTL signal.
(37) Before the data format conversion module transmits the eDP signal to the timing controller, it transmits the eDP signal to the switch module, transmits a control signal to the controller, and the controller switches on a corresponding data channel of the switch module based on the control signal so as to transmit the eDP signal to the timing controller.
(38) In conclusion, embodiments of the present disclosure provide a data format conversion module between the timing controller and the LVDS interface to convert the LVDS signal from the LVDS interface into the eDP signal, and the timing controller receives the eDP signal to drive the display panel to realize UHD image display. Further, an eDP interface connected to the timing controller is also provided to realize that an eDP signal drives the display panel to realize UHD image display and the function of multi-interface input at the same time. The compatibility between the signal source system side and the display panel is improved.
(39) Obviously, those skilled in the art can make various modifications and variations to the present disclosure without departing from the spirit and the scope of the present disclosure. As such, if those modifications and variations fall within the scope of the claims and their equivalent of the present disclosure, the present disclosure is intended to incorporate those modifications and variations.
(40) The present application claims the priority of Chinese Patent Application No. 201410030869.0 filed on Jan. 22, 2014, entire content of which is incorporated as part of the present invention by reference.