Envelope tracking power management circuit

Abstract

An envelope tracking (ET) power management circuit is provided. The ET power management circuit includes a number of tracker circuits each configured to operate based on a respective input voltage. In various operation scenarios, one or more selected tracker circuits may be configured to provide ET modulated voltages to a number of amplifier circuits. In examples discussed herein, each of the selected tracker circuits is configured to draw the respective input voltage from a single voltage circuit (e.g., an inductor-based buck-boost circuit) in the ET power management circuit. By utilizing the single voltage circuit to power the selected tracker circuits, as opposed to employing multiple voltage circuits, it is possible to reduce the footprint of the ET power management circuit, thus helping to reduce cost and power consumption of the ET power management circuit.

Claims

1. An envelope tracking (ET) power management circuit comprising: a voltage circuit comprising a voltage output and configured to generate a supply voltage at the voltage output; a plurality of tracker circuits comprising a plurality of voltage inputs configured to receive a plurality of input voltages, the plurality of tracker circuits configured to generate a plurality of ET modulated voltages based on the plurality of input voltages, respectively; and control circuitry configured to couple the voltage output to at least one selected voltage input among the plurality of voltage inputs to provide the supply voltage to at least one selected tracker circuit among the plurality of tracker circuits as a selected input voltage among the plurality of input voltages.

2. The ET power management circuit of claim 1 wherein the voltage circuit comprises an inductor-based buck-boost circuit configured to generate a constant voltage as the supply voltage at the voltage output.

3. The ET power management circuit of claim 1 further comprising a plurality of amplifier circuits.

4. The ET power management circuit of claim 3 wherein at least two selected amplifier circuits among the plurality of amplifier circuits are configured to amplify at least two radio frequency (RF) signals concurrently based on at least two selected ET modulated voltages among the plurality of ET modulated voltages.

5. The ET power management circuit of claim 4 wherein the control circuitry is further configured to configure at least two selected tracker circuits among the plurality of tracker circuits to generate the at least two selected ET modulated voltages based on at least two input voltages among the plurality of input voltages and provide the at least two selected ET modulated voltages to the at least two selected amplifier circuits, respectively.

6. The ET power management circuit of claim 5 wherein the control circuitry is further configured to couple the voltage output to at least two selected voltage inputs of the at least two selected tracker circuits to provide the supply voltage to the at least two selected tracker circuits as the at least two input voltages.

7. The ET power management circuit of claim 6 wherein the voltage circuit is further configured to generate the supply voltage based on a maximum input voltage among the at least two input voltages.

8. The ET power management circuit of claim 3 wherein a selected amplifier circuit among the plurality of amplifier circuits is configured to amplify a radio frequency (RF) signal based on a selected ET modulated voltage among the plurality of ET modulated voltages.

9. The ET power management circuit of claim 8 wherein the control circuitry is further configured to configure a selected tracker circuit among the plurality of tracker circuits to generate the selected ET modulated voltage based on an input voltage among the plurality of input voltages and provide the selected ET modulated voltage to the selected amplifier circuit.

10. The ET power management circuit of claim 9 wherein the control circuitry is further configured to couple the voltage output to a selected voltage input of the selected tracker circuit to provide the supply voltage to the selected tracker circuit as the input voltage.

11. The ET power management circuit of claim 10 wherein the voltage circuit is further configured to generate the supply voltage based on a maximum input voltage among the plurality of input voltages.

12. The ET power management circuit of claim 9 wherein the selected amplifier circuit is further configured to amplify the RF signal based on the selected ET modulated voltage and a current.

13. The ET power management circuit of claim 12 wherein the current comprises a direct current and an alternating current.

14. The ET power management circuit of claim 12 wherein the control circuitry is further configured to configure the selected tracker circuit to provide half of the current to the selected amplifier circuit.

15. The ET power management circuit of claim 14 wherein the control circuitry is further configured to configure a second selected tracker circuit different from the selected tracker circuit among the plurality of tracker circuits to generate and provide an other half of the current to the selected amplifier circuit.

16. The ET power management circuit of claim 15 wherein the control circuitry is further configured to configure the selected tracker circuit and the second selected tracker circuit to each generate the half of the current in response to determining that the selected amplifier circuit is required to amplify the RF signal to a power level of at least 33 dBm.

17. The ET power management circuit of claim 15 wherein each of the selected tracker circuit and the second selected tracker circuit includes a charge pump and a parallel amplifier.

18. The ET power management circuit of claim 17 wherein the charge pump and the parallel amplifier in the selected tracker circuit are configured to generate the half of the current and the selected ET modulated voltage, respectively.

19. The ET power management circuit of claim 17 wherein the charge pump in the second selected tracker circuit is configured to generate the other half of the current.

20. The ET power management circuit of claim 19 wherein the control circuitry is further configured to deactivate the parallel amplifier in the second selected tracker circuit.

21. The ET power management circuit of claim 3 wherein: two selected amplifier circuits among the plurality of amplifier circuits are configured to amplify two radio frequency (RF) signals concurrently based on two selected ET modulated voltages among the plurality of ET modulated voltages; the control circuitry is further configured to: configure two selected tracker circuits among the plurality of tracker circuits to generate the two selected ET modulated voltages based on two input voltages among the plurality of input voltages and provide the two selected ET modulated voltages to the two selected amplifier circuits, respectively; and couple the voltage output to two selected voltage inputs of the two selected tracker circuits to provide the supply voltage to the two selected tracker circuits as the two input voltages; and the voltage circuit is further configured to generate the supply voltage based on a maximum input voltage among the two input voltages.

Description

BRIEF DESCRIPTION OF THE DRAWING FIGURES

(1) The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.

(2) FIG. 1 is a schematic diagram of an exemplary ET power management circuit in which a number of tracker circuits are configured to provide ET modulated voltages for supporting uplink carrier aggregation (ULCA) and/or multiple-input multiple-output (MIMO) operations;

(3) FIG. 2 is a schematic diagram providing an exemplary illustration of the ET power management circuit of FIG. 1 configured to support at least two selected amplifier circuits concurrently;

(4) FIG. 3 is a schematic diagram providing an exemplary illustration of the ET power management circuit of FIG. 1 configured to support a single selected amplifier circuit; and

(5) FIG. 4 is a schematic diagram providing an exemplary illustration of the ET power management circuit of FIG. 1 configured to support a single selected amplifier circuit in very high power (VHP) mode.

DETAILED DESCRIPTION

(6) The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

(7) It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items.

(8) It will be understood that when an element such as a layer, region, or substrate is referred to as being on or extending onto another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being directly on or extending directly onto another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being over or extending over another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being directly over or extending directly over another element, there are no intervening elements present. It will also be understood that when an element is referred to as being connected or coupled to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being directly connected or directly coupled to another element, there are no intervening elements present.

(9) Relative terms such as below or above or upper or lower or horizontal or vertical may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.

(10) The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms a, an, and the are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms comprises, comprising, includes, and/or including when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

(11) Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

(12) Embodiments of the disclosure relate to an envelope tracking (ET) power management circuit. The ET power management circuit includes a number of tracker circuits each configured to operate based on a respective input voltage. In various operation scenarios, one or more selected tracker circuits may be configured to provide ET modulated voltages to a number of amplifier circuits. In examples discussed herein, each of the selected tracker circuits is configured to draw the respective input voltage from a single voltage circuit (e.g., an inductor-based buck-boost circuit) in the ET power management circuit. By utilizing the single voltage circuit to power the selected tracker circuits, as opposed to employing multiple voltage circuits, it is possible to reduce a footprint of the ET power management circuit, thus helping to reduce cost and power consumption of the ET power management circuit.

(13) In this regard, FIG. 1 is a schematic diagram of an exemplary ET power management circuit 10 in which a number of tracker circuits 12(1)-12(M) are configured to provide ET modulated voltages for supporting uplink carrier aggregation (ULCA) and/or multiple-input multiple-output (MIMO) operations. The tracker circuits 12(1)-12(M) are configured to receive a number of input voltages V.sub.BATAMP1-V.sub.BATAMPM via a number of voltage inputs 14(1)-14(M), respectively. Accordingly, the tracker circuits 12(1)-12(M) generate a number of ET modulated voltages V.sub.CC1-V.sub.CCM based on the input voltages V.sub.BATAMP1-V.sub.BATAMPM, respectively. The tracker circuits 12(1)-12(M) also receive a number of target voltages V.sub.TARGET1-V.sub.TARGETM, each representing a time-variant voltage envelope. Accordingly, the tracker circuits 12(1)-12(M) generate the ET modulated voltages V.sub.CC1-V.sub.CCM that track the time-variant envelope of the target voltages V.sub.TARGET1-V.sub.TARGETM, respectively.

(14) According to a conventional design, it may require multiple voltage circuits to generate and provide the input voltages V.sub.BATAMP1-V.sub.BATAMPM required by the tracker circuits 12(1)-12(M). However, employing multiple voltage circuits may significantly increase the footprint of the ET power management circuit 10 and, consequently, lead to increased cost, power consumption, and design complexity.

(15) To overcome the shortcomings associated with employing multiple voltage circuits, the ET power management circuit 10 is configured to supply the input voltages V.sub.BATAMP1-V.sub.BATAMPM based on a single voltage circuit. In examples discussed herein, the ET power management circuit 10 may dynamically adjust the voltage supplied by the single voltage circuit based on various operation scenarios. By utilizing the single voltage circuit to power the tracker circuits 12(1)-12(M), as opposed to employing the multiple voltage circuits, it is possible to reduce the footprint of the ET power management circuit 10, thus helping to reduce cost and power consumption of the ET power management circuit 10.

(16) In this regard, the ET power management circuit 10 includes a voltage circuit 16 that is configured to generate a supply voltage V.sub.BATAMP at a voltage output 18. In a non-limiting example, the voltage circuit 16 derives the supply voltage V.sub.BATAMP, which can be a constant voltage, from a battery voltage V.sub.BAT. The voltage circuit 16 may be an inductor-based buck-boost circuit or a capacitor-based buck-boost circuit.

(17) The ET power management circuit 10 includes control circuitry 20, which can be provided as a microprocessor, a microcontroller, or a field-programmable gate array (FPGA), for example. The control circuitry 20 can be configured to couple the voltage output 18 to at least one selected voltage input among the voltage inputs 14(1)-14(M) to provide the supply voltage V.sub.BATAMP to at least one selected tracker circuit among the tracker circuits 12(1)-12(M) as a selected input voltage among the input voltages V.sub.BATAMP1-V.sub.BATAMPM.

(18) In a non-limiting example, the control circuitry 20 can couple the voltage output 18 to the selected voltage input via input voltage switching circuitry 22. The input voltage switching circuitry 22 may be constructed based on any number, type, and/or layout of switches to selectively couple the voltage output 18 to the selected voltage input of the selected tracker circuit.

(19) The ET power management circuit 10 includes a number of amplifier circuits 24(1)-24(N) configured to amplify a number of RF signals 26(1)-26(N), respectively, based on a selected number of the ET modulated voltages V.sub.CC1-V.sub.CCM generated by the tracker circuits 12(1)-12(M). Notably, when the ET power management circuit 10 is supporting the ULCA operation, the RF signals 26(1)-26(N) may be different signals. In contrast, when the ET power management circuit 10 is supporting the MIMO operation, the RF signals 26(1)-26(N) may be identical signals.

(20) The ET power management circuit 10 may include output voltage switching circuitry 28. The output voltage switching circuitry 28 may be constructed based on any number, type, and/or layout of switches to selectively provide the selected number of the ET modulated voltages V.sub.CC1-V.sub.CCM to one or more of the amplifier circuits 24(1)-24(N).

(21) The ET power management circuit 10 can be configured to support various operation scenarios, which are discussed next with reference to FIGS. 2-4. In this regard, FIG. 2 is a schematic diagram providing an exemplary illustration of the ET power management circuit 10 of FIG. 1 configured to support at least two selected amplifier circuits concurrently. Common elements between FIGS. 1 and 2 are shown therein with common element numbers and will not be re-described herein.

(22) In examples discussed herein, the amplifier circuits 24(1), 24(2) are referenced as the selected amplifier circuits. It should be appreciated that the selected amplifier circuits can be more than two of the amplifier circuits 24(1)-24(N). Similarly, the tracker circuits 12(1), 12(2) are referenced herein as at least two selected tracker circuits for the sake of illustration. It should also be appreciated that more than two of the tracker circuits 12(1)-12(M) can be designated as the selected tracker circuits by the control circuitry 20. Accordingly, the ET modulated voltages V.sub.CC1, V.sub.CC2 are referred to as at least two selected ET modulated voltages.

(23) The selected tracker circuits 12(1), 12(2) include a pair of parallel amplifiers 30(1), 30(2) and a pair of charge pumps 32(1), 32(2), respectively. The parallel amplifiers 30(1), 30(2) are configured to generate a pair of ET voltages V.sub.CC1, V.sub.CC2 based on a pair of input voltages V.sub.BATAMP1, V.sub.BATAMP2, respectively. The selected tracker circuits 12(1), 12(2) include a pair of offset capacitors 34(1), 34(2). The offset capacitors 34(1), 34(2) are configured to raise the ET voltages V.sub.CC1, V.sub.CC2 by offset voltages V.sub.OFFSET1, V.sub.OFFSET2 to the ET modulated voltages V.sub.CC1, V.sub.CC2, respectively. In this regard, the selected ET modulated voltage V.sub.CC1 equals a sum of the ET voltage V.sub.CC1 and the offset voltage V.sub.OFFSET1 (V.sub.CC1=V.sub.CC1+V.sub.OFFSET1). Likewise, the selected ET modulated voltage V.sub.CC2 equals a sum of the ET voltage V.sub.CC2 and the offset voltage V.sub.OFFSET2 (V.sub.CC2=V.sub.CC2+V.sub.OFFSET2). In a non-limiting example, the offset voltages V.sub.OFFSET1, V.sub.OFFSET2 can each be approximately 800 mV.

(24) The charge pumps 32(1), 32(2) are coupled to the batter voltage V.sub.BAT and configured to generate a pair of currents I.sub.CC1 and I.sub.CC2, respectively. Each of the currents I.sub.CC1 and I.sub.CC2 can be a combination of a direct current and an alternating current.

(25) The control circuitry 20 controls the output voltage switching circuitry 28 to couple the selected tracker circuits 12(1), 12(2) to the selected amplifier circuits 24(1), 24(2), respectively. In this regard, the selected amplifier circuit 24(1) receives the selected ET modulated voltage V.sub.CC1 and the current I.sub.CC1 from the selected tracker circuit 12(1). Similarly, the selected amplifier circuit 24(2) receives the selected ET modulated voltage V.sub.CC2 and the current I.sub.CC2 from the selected tracker circuit 12(2).

(26) The control circuitry 20 further controls the input voltage switching circuitry 22 to couple the voltage output 18 to the voltage inputs 14(1), 14(2). In this regard, the selected tracker circuit 12(1) receives the supply voltage V.sub.BATAMP as the input voltage V.sub.BATAMP1 and the selected tracker circuit 12(2) receives the supply voltage V.sub.BATAMP as the input voltage V.sub.BATAMP2.

(27) Notably, the selected amplifier circuits 24(1), 24(2) may operate independently from each other. Accordingly, the selected tracker circuits may need to adapt the selected ET modulated voltages V.sub.CC1 and V.sub.CC2 to different levels. As a result, the selected tracker circuits 12(1), 12(2) may require the voltage circuit 16 to provide the input voltages V.sub.BATAMP1, V.sub.BATAMP2 at different levels as well. In this regard, in a non-limiting example, the control circuitry 20 can configure the voltage circuit 16 to generate the supply voltage V.sub.BATAMP based on a maximum input voltage between the input voltages V.sub.BATAMP1, V.sub.BATAMP2. More specifically, the voltage circuit 16 may be configured to generate the supply voltage V.sub.BATAMP based on the equation (Eq. 1) below.
V.sub.BATAMPMAX(V.sub.BATAMP1,V.sub.BATAMP2)
V.sub.BATAMP1=V.sub.CC1-Peak(V.sub.OFFSET1P.sub.Headroom)
V.sub.OFFSET1=V.sub.CC1-BottomN.sub.Headroom
V.sub.BATAMP2=V.sub.CC2-Peak(V.sub.OFFSET2P.sub.Headroom)
V.sub.OFFSET2=V.sub.CC2-BottomN.sub.Headroom(Eq. 1)

(28) In the equation (Eq. 1) above, V.sub.CC1-Peak and V.sub.CC1-Bottom represent a maximum (peak) and a minimum (bottom) of the ET modulated voltage V.sub.CC1. V.sub.CC2-Peak and V.sub.CC2-Bottom represent a maximum (peak) and a minimum (bottom) of the ET modulated voltage V.sub.CC2. P.sub.Headroom and N.sub.Headroom represent ceiling and floor voltage headrooms associated with an output stage, which may be constructed based on a p-type and an n-type transistor, in the selected tracker circuits 12(1), 12(2).

(29) Given that the voltage circuit 16 is configured to generate the supply voltage V.sub.BATAMP based on the maximum input voltage between the input voltages V.sub.BATAMP1, V.sub.BATAMP2, it may be necessary to configure the parallel amplifiers 30(1), 30(2) with proper supply voltage rejections to mitigate potential impact of input voltage swings. For example, the selected tracker circuit 12(1) may require the input voltage V.sub.BATAMP1 to be provided at 3 V, while the selected tracker circuit 12(2) is requiring the input voltage V.sub.BATAMP2 to be provided at 5 V. According to the equation (Eq. 1) above, the voltage circuit 16 would generate the supply voltage V.sub.BATAMP at 5V. In this regard, the parallel amplifier 30(1) in the selected tracker circuit 12(1) needs to be configured with appropriate supply voltage rejection such that the selected ET modulated voltage V.sub.CC1 is not impacted by the increased input voltage.

(30) FIG. 3 is a schematic diagram providing an exemplary illustration of the ET power management circuit 10 of FIG. 1 configured to support a single selected amplifier circuit. Common elements between FIGS. 1, 2, and 3 are shown therein with common element numbers and will not be re-described herein.

(31) In examples discussed herein, the amplifier circuit 24(1) is referenced as the selected amplifier circuit. It should be appreciate that the selected amplifier circuits can be any of the amplifier circuits 24(1)-24(N). Similarly, the tracker circuit 12(1) is referenced herein as a selected tracker circuit for the sake of illustration. It should also be appreciated that any of the tracker circuits 12(1)-12(M) can be designated as the selected tracker circuit by the control circuitry 20. Accordingly, the ET modulated voltage V.sub.CC1 is referred to as a selected ET modulated voltage.

(32) In this regard, the control circuitry 20 controls the output voltage switching circuitry 28 such that the selected tracker circuit 12(1) can provide the selected ET modulated voltage V.sub.CC1 and the current I.sub.CC1 to the selected amplifier circuit 24(1). Accordingly, the selected amplifier circuit 24(1) amplifies the RF signal 26(1) to a power level corresponding to the selected ET modulated voltage V.sub.CC1 and the current I.sub.CC1. The control circuitry 20 also controls the input voltage switching circuitry 22 such that the voltage circuit 16 can provide the supply voltage V.sub.BATAMP to the selected tracker circuit 12(1) as the input voltage V.sub.BATAMP1. The control circuitry 20 further configures the voltage circuit 16 to generate the supply voltage V.sub.BATAMP corresponding to the input voltage V.sub.BATAMP1.

(33) In a non-limiting example, the selected amplifier circuit 24(1) is required to amplify the RF signal 26(1) to a peak power greater than or equal to 33 dBm (approximately 2 Watts). In this regard, if a peak of the selected ET modulated voltage V.sub.CC1 is maintained at a specific level (e.g., 5 V), the current loci would need to be increased to a significant level such that the selected amplifier circuit 24(1) can amplify the RF signal 26(1) to the desired peak power. However, to produce the current I.sub.CC1 at the significantly increased level, the charge pump 32(1) may need to employ larger inductor(s), which can lead to increased footprint and heat dissipation in the selected tracker circuit 12(1).

(34) In this regard, FIG. 4 is a schematic diagram providing an exemplary illustration of the ET power management circuit 10 of FIG. 1 configured to support a single selected amplifier circuit in very high power (VHP) mode. Common elements between FIGS. 1, 2, 3, and 4 are shown therein with common element numbers and will not be re-described herein.

(35) In examples discussed herein, the amplifier circuit 24(1) is referenced as the selected amplifier circuit. It should be appreciated that the selected amplifier circuits can be any of the amplifier circuits 24(1)-24(N). Similarly, the tracker circuit 12(1) is referenced herein as a selected tracker circuit for the sake of illustration. It should also be appreciated that any of the tracker circuits 12(1)-12(M) can be designated as the selected tracker circuit by the control circuitry 20.

(36) The control circuitry 20 controls the output voltage switching circuitry 28 such that the selected tracker circuit 12(1) can provide the selected ET modulated voltage V.sub.CC1 to the selected amplifier circuit 24(1). The control circuitry 20 also configures the charge pump 32(1) in the selected tracker circuit 12(1) to provide one-half of the current I.sub.CC1 (I.sub.CC1) to the selected amplifier circuit 24(1). The control circuitry 20 further configures the charge pump 32(2) in a second selected tracker circuit 12(2) to provide one-half of the current I.sub.CC2 (I.sub.CC2) to the selected amplifier circuit 24(1). Accordingly, the selected amplifier circuit 24(1) can amplify the RF signal 26(1) to a desired higher power level corresponding to the selected ET modulated voltage V.sub.CC1 and a sum of (I.sub.CC1+I.sub.CC2). Given that the selected tracker circuit 12(1) alone is providing the ET modulated voltage V.sub.CC1, the control circuitry 20 may deactivate the parallel amplifier 30(2) in the second selected tracker circuit 12(2) to help reduce power consumption and heat dissipation.

(37) The control circuitry 20 also controls the input voltage switching circuitry 22 such that the voltage circuit 16 can provide the supply voltage V.sub.BATAMP to the selected tracker circuit 12(1) as the input voltage V.sub.BATAMP1. The control circuitry 20 further configures the voltage circuit 16 to generate the supply voltage V.sub.BATAMP corresponding to the input voltage V.sub.BATAMP1.

(38) Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.