INDUCTIVE INTERFACE CIRCUITS HAVING RIPPLE-REDUCTION LOOPS

Abstract

An amplifier circuits inductive/magnetic sensor interface can include a main signal path including one or more amplifiers configured to receive an input signal and to produce an output signal based on the input signal. The input signal may include a square-wave demodulated signal having an associated modulation frequency and an undesired frequency component at twice the modulation frequency of the square-wave demodulated signal. The amplifier circuit may include a gain feedback loop configured to set a gain of the amplifier circuit. The amplifier circuit may include a ripple reduction feedback loop configured to receive an intermediate signal on the main signal path and extract the undesired frequency component of the intermediate signal to produce a filtered version of the intermediate signal and provide the filtered version of the intermediate signal to the main signal path.

Claims

1. An amplifier circuit for an inductive sensor interface, the amplifier circuit comprising: a main signal path including a first amplifier configured to receive an input signal and to produce an output signal at an output based on the input signal, wherein the input signal comprises a square-wave demodulated signal having an associated modulation frequency and an undesired frequency component at twice the modulation frequency; a gain feedback loop configured to receive the output signal and, based on the output signal, provide a feedback signal to the main signal path, wherein the gain feedback loop is configured to set a gain of the amplifier circuit; and a ripple reduction feedback loop configured to receive an intermediate signal on the main signal path and extract the undesired frequency component of the intermediate signal to produce a filtered version of the intermediate signal, wherein the ripple reduction feedback loop is further configured to supply the filtered version of the intermediate signal to the main signal path.

2. The amplifier circuit of claim 1, further comprising a square wave demodulator configured to receive a sinusoidally modulated input signal and demodulate the sinusoidally modulated input signal to produce a square-wave demodulated signal for use as the input signal of the main signal path, wherein the square-wave demodulated signal includes a frequency component at twice the modulation frequency of the square-wave demodulated signal.

3. The amplifier circuit of claim 1, wherein the ripple reduction feedback loop comprises a low-pass filter configured with a desired cutoff frequency.

4. The amplifier circuit of claim 3, wherein the desired cutoff frequency is below twice the modulation frequency of the square-wave-demodulated signal.

5. The amplifier circuit of claim 3, wherein the ripple reduction feedback loop comprises a square-wave demodulator configured between the main signal path and the low-pass filter.

6. The amplifier circuit of claim 5, wherein the ripple reduction feedback loop comprises a square-wave modulator configured between the low-pass filter and the main signal path.

7. The amplifier circuit of claim 6, wherein the ripple reduction feedback loop comprises an amplifier disposed between the low-pass filter and the square-wave modulator.

8. The amplifier circuit of claim 1, wherein the amplifier circuit comprises an integrated circuit.

9. The amplifier circuit of claim 1, wherein the first amplifier on the main signal path comprises a transconductance amplifier.

10. The amplifier circuit of claim 1, wherein the main signal path comprises a second amplifier.

11. The amplifier circuit of claim 10, wherein the second amplifier is disposed on the main signal path between the output and a node where the ripple reduction feedback loop receives the intermediate signal.

12. The amplifier circuit of claim 1, further comprising a pick-up coil configured to detect a magnetic field.

13. The amplifier circuit of claim 12, wherein the pick-up coil is configured to detect a reflected sinusoidally modulated magnetic field.

14. The amplifier circuit of claim 1, further comprising a processor configured to determine positional information of a moveable target from the output signal.

15. An amplifier circuit comprising: (A) first and second ripple-reduction amplifier circuits configured to produce first and second output signals, each ripple-reduction amplifier circuit including, a main signal path including a first amplifier configured to receive an input signal and to produce an output signal at an output based on the input signal, wherein the input signal comprises a square-wave demodulated signal having an associated modulation frequency and an undesired frequency component at twice the modulation frequency; a feedback loop configured to receive the output signal and, based on the output signal, provide a feedback signal to the main signal path; a ripple reduction feedback loop configured to receive an intermediate signal on the main signal path and extract the undesired frequency component of the intermediate signal to produce a filtered version of the intermediate signal, wherein the ripple reduction feedback loop is further configured to supply the filtered version of the intermediate signal to the main signal path; and (B) a processor configured to determine sensor information from the output signals of the first and second ripple-reduction amplifier circuits.

16. The amplifier circuit of claim 15, further comprising first and second square-wave demodulators, each configured to receive a sinusoidally modulated input signal and demodulate the sinusoidally modulated input signal to produce a square-wave-demodulated signal, wherein the square-wave demodulated signal includes a frequency component at twice the modulation frequency of the square-wave demodulated signal, and wherein the first and second square-wave demodulators are configured to provide the input signals to the main signal paths of the first and second ripple-reduction amplifier circuits, respectively.

17. The amplifier circuit of claim 15, wherein the ripple reduction feedback loop comprises a low-pass filter configured with a desired cutoff frequency.

18. The amplifier circuit of claim 17, wherein the desired cutoff frequency is below twice the modulation frequency of the square-wave demodulated signal of the input signal of each of the first and second ripple-reduction amplifier circuits.

19. The amplifier circuit of claim 17, wherein the ripple reduction feedback loop comprises a square-wave demodulator configured between the main signal path and the low-pass filter.

20. The amplifier circuit of claim 19, wherein the ripple reduction feedback loop comprises a square-wave modulator configured between the low-pass filter and the main signal path.

21. The amplifier circuit of claim 20, wherein the ripple reduction feedback loop comprises an amplifier disposed between the low-pass filter and the square-wave modulator.

22. The amplifier circuit of claim 15, wherein the amplifier circuit comprises an integrated circuit.

23. The amplifier circuit of claim 15, wherein the first amplifier on the main signal path comprises a transconductance amplifier.

24. The amplifier circuit of claim 15, wherein the main signal path comprises a second amplifier.

25. The amplifier circuit of claim 24, wherein the second amplifier is disposed on the main signal path between the output and a node at which the ripple reduction feedback loop receives the intermediate signal.

26. The amplifier circuit of claim 16, further comprising first and second pick-up coils configured to detect a magnetic field and provide output signals to the first and second square-wave demodulators, respectively.

27. The amplifier circuit of claim 26, wherein each pick-up coil is configured to detect a reflected sinusoidally modulated magnetic field.

28. The amplifier circuit of claim 15, wherein the processor is configured to calculate an angle of rotation associated with a moveable target based on the first and second output signals.

29. The amplifier circuit of claim 15, wherein the processor is configured to calculate a distance associated with a moveable target based on the first and second output signals.

30. The amplifier circuit of claim 15, wherein the processor comprises a CORDIC processor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The manner and process of making and using the disclosed embodiments may be appreciated by reference to the figures of the accompanying drawings. It should be appreciated that the components and structures illustrated in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principals of the concepts described herein. Furthermore, embodiments are illustrated by way of example and not limitation in the figures, in which:

[0022] FIG. 1 is a diagram showing an example generalized rotary encoder;

[0023] FIG. 2 is a diagram showing an example of a prior art inductive interface circuit implementing square wave demodulation;

[0024] FIG. 3 is a diagram showing an example of a prior art inductive interface circuit implementing square wave demodulation used with a filter prior to the amplifier stage;

[0025] FIG. 4 is a diagram of an example inductive interface integrated circuit (IC) with a ripple reduction loop, in accordance with the present disclosure;

[0026] FIG. 5 is a diagram of an example inductive interface integrated circuit (IC) with first and second amplifier circuits having ripple-reduction loops (RRLs), in accordance with the present disclosure; and

[0027] FIG. 6 is a block diagram of an example computer system operative to perform processing, in accordance with the present disclosure.

DETAILED DESCRIPTION

[0028] The features and advantages described herein are not all-inclusive; many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the specification has been selected principally for readability and instructional purposes, and not to limit in any way the scope of the inventive subject matter. The subject technology is susceptible of many embodiments. What follows is illustrative, but not exhaustive, of the scope of the subject technology.

[0029] An aspect of the present disclosure is directed to inductive interface circuits, including integrated circuits (ICs), that allow for square wave demodulation (SWD) and highly linear amplification of an originally sinusoidal-modulated signal of interest. Circuits and related techniques according to the present disclosure can allow for operating at higher frequencies (e.g., tens of MHz) compared to existing inductive interface ICs by, e.g., a factor of 10? or more. Some existing inductive interface ICs are capable of operating at a few MHz and may be limited from use at higher frequencies (e.g., tens of MHz) due to linearity issues presented by square-wave demodulation of a sinusoidal carrier. The higher frequencies of operation afforded by examples of the present disclosure offer benefits including a reduction in the area and cost of associated LC tanks in practical applications. In addition, ICs and techniques according to the present disclosure can introduce only negligible delay (and only related to the RRL, once settled, the carrier residues from demodulation are fully removed) as opposed to circuits utilizing a conventional filter before and/or after amplification by an amplification stage/circuit.

[0030] FIG. 4 is a diagram of an example inductive interface integrated circuit (IC) 400 with a ripple reduction loop, in accordance with the present disclosure. IC 400 may include or be connected to transmitter coil 402, which is configured to direct a magnetic field (e.g., having a sinusoidal modulation) to a target 1, to produce a reflected magnetic field 2, which is detected by receiver coil 404, which produces an output 404 (e.g., V.sub.i). IC 400 is configured to receive signals (e.g., V.sub.i) from receiver (pick up) coil 404. IC400 may include or be connected to a square wave demodulation (SWD) section 405 having a square wave demodulator 406 and an amplifier 407. Square wave demodulator 406 is configured to receive the output signals from receiver coil 404 (at carrier modulation frequency, f.sub.CARRIER), demodulate the signals using square wave demodulation and produce a corresponding output signal 406. Although SWD is a coherent demodulation process, the multiplication operation for the SWD demodulation/modulation can be achieved by use of, e.g., cross-coupled switches, greatly reducing complexity compared to the use of linear multipliers typically required for coherent sinusoidal demodulation. While SWD may provide some gain loss, e.g., up to ? 30%, compared to sinusoidal demodulation, in many cases this may be more than acceptable.

[0031] Amplifier (e.g., preamp) 407 can receive the output 406 from square wave demodulator 406 providing an input, e.g., input (input current I.sub.i) 408, to amplifier circuit 409, which can include multiple circuit paths, e.g., forward path 410, feedback loop 420, and ripple-reduction feedback loop 430 as shown. Forward path 410 can be configured to receive input 408 and provide amplification with first amplifier 412. Forward path 410 can include second amplifier 414 and capacitor 416, e.g., configured in parallel with second amplifier 414, and an output 418 configured to provide an output signal (V.sub.O). In some examples, the preamp 407, first amplifier 412, and second amplifier 414 may each include a transconductance amplifier; in other examples, one or more of those amplifiers may differ (e.g., may include a transimpedance amplifier, etc.). In some examples, one or more resistors can take the place of or substitute for amplifier 407. Feedback path 420 can receive output signal (V.sub.O) from output 418 and provide it to forward path 410 at sum unit 450 to provide a desired amount of gain, indicated at gain element 422, e.g., to provide negative feedback for stability. In some examples, gain element 422 can include one or more amplifiers (e.g., op-amps) and/or one or more resistors, e.g., a single resistor. Output 418 can provide output signal V.sub.O to, e.g., an analog-to-digital converter (ADC) (not shown) and/or a processor, e.g., DSP, (not shown) for further signal processing, including for position and/or rotation calculation/determination.

[0032] As noted, IC 400 may further include a ripple reduction feedback loop 430, a.k.a., ripple reduction loop (RRL) 430 to remove or extract the undesired frequency component(s) resulting from (SWD). RRL 430 can receive a signal (intermediate signal) 413 on forward path 410, e.g., as shown by node or tap point 3 between sum unit 450 and output 418. RRL 430 is configured to operate as a local loop to extract one or more undesirable frequency components, e.g., at 2f.sub.CARRIER, produced by square wave demodulation (SWD) of the magnetic field signal received from the receiver (pick up) coil 404, which signal typically would be sinusoidally modulated.

[0033] Ripple reduction loop (RRL) 430 can be configured to receive signals on forward path 410 at a point between sum unit 450 and second amplifier 414 (intermediate signals on the forward path), such as from a node or tap point, e.g., shown at 3. RRL 430 can include square-wave demodulator (SWD) 432, low pass filter 434, amplifier 436, and SW modulator 438. RRL 430 can provide as an input, e.g., I.sub.RRL, a filtered version of intermediate signal 413 to sum unit 450.

[0034] Square wave demodulator (SWD) 432 can be configured to demodulate the signal (e.g., intermediate signal) received from the forward path 410 at a desired demodulation frequency, e.g., twice the carrier frequency (2f.sub.CARRIER) of the reflected magnetic field 2. As described below, RRL 430 can extract the undesired frequency components/content in signal 413 caused by the square wave demodulation and provide the component(s) as a feedback signal to sum unit 450 to subtract the components from signal 413, thereby producing smoothed-out signal 413 with a reduction in slew-rate changes (ripples).

[0035] Because signal 413 has the desired position information (of target 1) at baseband and also the undesired components at 2f.sub.CARRIER and other even harmonics of f.sub.CARRIER, SWD 432 operates to bring all the undesired components into baseband and, at the same time, shift the desired information to 2f.sub.CARRIER (and other even harmonics). Then, low-pass filter (LPF) 434 filters out all the high frequency content (i.e., the desired information contained in 413) while keeping the undesired components (which are in baseband, at that point). The undesired signal components/content can be further processed by amplifier 436 and then shifted back to their original frequency position (2f.sub.CARRIER and other even harmonics) by square-waved demodulator (SWD) 438 acting as a modulator. After SWD 438, e.g., at location 4, the signal 408 is effectively reconstructed but without the desired information on baseband (e.g., encoded position information about target 1), and only including the high frequency, undesired content. The undesired content is then provided to sum unit 450, which subtracts the undesired content from signal 413. When subtracting the undesired content from 408 using sum unit 450,413 is modified to produce 413, i.e., desired baseband information with no (or reduced) high frequency content produced by the square-wave demodulation performed by SWD 406.

[0036] Accordingly, RRL 430 can operate to extract or attenuate undesirable frequency components produced by square wave demodulation (by square wave demodulator 406) of the reflected magnetic field signal 404 (which may be sinusoidally modulated) from pick-up coil 404. Settling of the filtered intermediate signal, with decreasing amplitude of residues from square wave demodulation, is indicated by signal portion 413.

[0037] FIG. 5 is a diagram of an example inductive interface integrated circuit (IC) 500 with first and second amplifier circuits having ripple-reduction loops (RRLs), in accordance with the present disclosure. IC 500 is generally similar to IC 400 of FIG. 4 but has two amplifier circuits 509a-b (as opposed to one). The first and second amplifier circuits 509a-b include, respectively, forward paths 510a-b, feedback loops 520a-b, and RRL loops 530a-b, respectively. In some examples, the two amplifier circuits 509a-b can process signals having a relative phase difference between them, e.g., ?/2 radians, corresponding to in-phase (I) and quadrature phase (Q) signals.

[0038] IC 500 may include or be connected to transmitter coil 502, which may include a single coil 502 or multiple coils 502a-b, and receiver coils 504a-b. Transmitter coil(s) 502 can be configured to direct a magnetic field (e.g., having a sinusoidal modulation) to a target 1, to produce a reflected magnetic field 2, which is detected by receiver coils 504a-b. IC 500 is configured to receive signals (e.g., V) from receiver (pick up) coils 504a-b. IC 500 may include or be connected to square wave demodulation sections 505a-b having square wave demodulators 506a-b and amplifiers 507a-b, respectively. Square wave demodulators 506a-b are configured to receive the output signals (at carrier modulation frequency, f.sub.CARRIER) from receiver coils 504a-b, respectively, demodulate the signals using square-wave demodulation, and produce corresponding output signals 506a-b. Amplifiers (e.g., preamp) 507a-b can receive the outputs 506a-b from square wave demodulators 506a-b, respectively, providing inputs, e.g., inputs (input currents I.sub.i) 508a-b, to amplifier circuits 509a-b, which can include multiple circuit paths, e.g., forward path 510a-b, feedback loops 520a-b, and ripple-reduction feedback loops 530a-b, as shown.

[0039] Forward paths 510a-b can be configured to receive inputs 508a-b and provide amplification with first amplifiers 512a-b. Forward paths 510a-b can include second amplifiers 514a-b and capacitor 516a-b, e.g., configured in parallel with second amplifiers 514a-b, and provide output signals (Vo.sub.1-Vo.sub.2) at outputs 518a-b, respectively. In some examples, preamps 507a-b, first amplifiers 512a-b, and second amplifiers 514a-b may each include a transconductance amplifier; in other examples, one or more of those amplifiers may differ (e.g., may include a transimpedance amplifier, etc.). Feedback paths 520a-b can receive signals (Vo.sub.1-Vo.sub.2) from outputs 518 and provide them, respectively, to forward paths 510a-b at sum unit 550a-b to provide a desired amount of gain, indicated at 522a-b, e.g., to provide negative feedback for stability. Outputs 518a-b can provide output signals (Vo.sub.1-Vo.sub.2) to, e.g., one or more analog-to-digital converters (ADCs) and/or processors (e.g., DSPs) for further signal processing. For example, an ADC (not shown) can receive the output signals and provide corresponding digital signals to a DSP, e.g., programmed for coordinate rotation digital computer (CORDIC) processing, to determine angular and/or linear position of the target 1.

[0040] As noted, amplifier circuits 509a-b of IC 500 may further include ripple reduction feedback loops 530a-b, a.k.a., ripple reduction loops (RRLs) 530a-b. RRLs 530a-b can receive signals (intermediate signals) 513a-b on forward paths 510a-b, e.g., as shown by nodes or tap points 3a-b between sum units 550a-b and outputs 518a-b. RRLs 530a-b are configured to operate as local loops to extract one or more undesirable frequency components produced by square wave demodulation of the magnetic field signal received from the receiver (pick up) coils 504a-b, which typically would be sinusoidally modulated.

[0041] Ripple reduction loops (RRLs) 530a-b can be configured to receive intermediate signals 513a-b on forward paths 510a-b at points between sum units 550a-b and second amplifiers 514a-b, such as from nodes or tap points, e.g., shown at 3a-b. Each RRL 530a-b can include a square-wave demodulator (SWD), low-pass filter, amplifier, and square-wave modulator, e.g., as shown in FIG. 4 by SWD 432, low-pass filter 434, amplifier 436, and SWD 438 configured as a modulator. RRLs 530a-b can provide as inputs, e.g., I.sub.RRL, filtered versions of intermediate signal 513a-b to sum units 550a-b. The square wave demodulators can be configured to demodulate the signals (e.g., intermediate signals) received from the forward paths 510a-b at a desired demodulation frequency, e.g., twice the carrier frequency (2F.sub.CARRIER) of the reflected magnetic field 2.

[0042] As described above, after the SWD process in RRLs 530a-b, the undesired frequency component(s)/content is/are at baseband and the desired information/content is shifted to 2f.sub.CARRIER (and other even harmonics of f.sub.CARRIER). Because signals 513a-b have the desired position information (of target 1) at baseband and also the undesired components at 2f.sub.CARRIER and other even harmonics of f.sub.CARRIER, the first (initial) SWD of each RRL 530a-b operates to bring all the undesired components into baseband and, at the same time, shift the desired information to 2f.sub.CARRIER (and other even harmonics). Then, the low-pass filter (LPF) of each RRL 530 filters out all the high frequency content (i.e., the desired information contained in 513a-b) while keeping the undesired components (which are in baseband, at that point). The undesired signal components/content can be further processed by the amplifier of each RRL 530a-b and then shifted back to their original frequency position (2f.sub.CARRIER and other even harmonics) by the second square-waved demodulator (acting as a modulator) of each RRL 530a-b. After the second SWDs, the signals 508a-b are effectively reconstructed but without the desired information on baseband (e.g., encoded position information about target 1), and only including the high frequency, undesired content. The undesired content is then provided to sum units 550a-b, which subtract the undesired content from signals 513a-b. When subtracting the undesired content from 508a-b using sum units 550a-b, intermediate signals 513a-b are modified to produce smoothed signals 513a-b, i.e., desired baseband information with no (or reduced) high frequency content produced by the square-wave demodulation performed by SWDs 506a-b.

[0043] FIG. 6 is a block diagram of an example computer system 600 operative to perform processing, in accordance with the present disclosure. Computer system 600 can perform all or at least a portion of the processing, e.g., steps in the algorithms and methods, described herein. The computer system 600 includes a processor 602, a volatile memory 604, a non-volatile memory 606 (e.g., hard disk), an output device 608 and a user input or interface (UI) 610, e.g., graphical user interface (GUI), a mouse, a keyboard, a display, and/or any common user interface, etc. The non-volatile memory (non-transitory storage medium) 606 stores computer instructions 612 (a.k.a., machine-readable instructions or computer-readable instructions) such as software (computer program product), an operating system 614 and data 616. In some examples/embodiments, the computer instructions 612 can be executed by the processor 602 out of (from) volatile memory 604. In some examples/embodiments, an article 618 (e.g., a storage device or medium such as a hard disk, an optical disc, magnetic storage tape, optical storage tape, flash drive, etc.) includes or stores the non-transitory computer-readable instructions. Bus 620 is also shown.

[0044] Processing may be implemented in hardware, software, or a combination of the two. Processing may be implemented in computer programs (e.g., software applications) executed on programmable computers/machines that each includes a processor, a storage medium or other article of manufacture that is readable by the processor (including volatile and non-volatile memory and/or storage elements), and optionally at least one input device, and one or more output devices. Program code may be applied to data entered using an input device or input connection (e.g., a port or bus) to perform processing and to generate output information.

[0045] The system 600 can perform processing, at least in part, via a computer program product or software application, (e.g., in a machine-readable storage device), for execution by, or to control the operation of, data processing apparatus (e.g., a programmable processor, a computer, or multiple computers). Each such program may be implemented in a high-level procedural or object-oriented programming language to communicate with a computer system. The programs may be implemented in assembly or machine language. The language may be a compiled or an interpreted language and it may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program may be deployed to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a communication network. A computer program may be stored on a storage medium or device (e.g., CD-ROM, hard disk, or magnetic diskette) that is readable by a general or special purpose programmable computer for configuring and operating the computer when the storage medium or device is read by the computer. Processing may also be implemented as a machine-readable storage medium, configured with a computer program, where upon execution, instructions in the computer program cause the computer to operate. Further, the terms computer or computer system may include reference to plural like terms, unless expressly stated otherwise.

[0046] Processing may be performed by one or more programmable processors executing one or more computer programs to perform the functions of the system. All or part of the system may be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) and/or an ASIC (application-specific integrated circuit). In some examples, digital logic circuitry, e.g., one or more FPGAs, can be operative as a processor as described herein.

[0047] Accordingly, embodiments of the inventive subject matter can afford various benefits relative to prior art techniques. For example, embodiments and examples of the present disclosure can enable or facilitate e.g., systems and components achieving or obtaining an Application Safety Integration Level (ASIL) in accordance with a safety standard such as ISO 26262.

[0048] Various embodiments of the concepts, systems, devices, structures, and techniques sought to be protected are described above with reference to the related drawings. Alternative embodiments can be devised without departing from the scope of the concepts, systems, devices, structures, and techniques described.

[0049] It is noted that various connections and positional relationships (e.g., over, below, adjacent, etc.) may be used to describe elements and components in the description and drawings. These connections and/or positional relationships, unless specified otherwise, can be direct or indirect, and the described concepts, systems, devices, structures, and techniques are not intended to be limiting in this respect. Accordingly, a coupling of entities can refer to either a direct or an indirect coupling, and a positional relationship between entities can be a direct or indirect positional relationship.

[0050] As an example of an indirect positional relationship, positioning element A over element B can include situations in which one or more intermediate elements (e.g., element C) is between elements A and elements B as long as the relevant characteristics and functionalities of elements A and B are not substantially changed by the intermediate element(s).

[0051] Also, the following definitions and abbreviations are to be used for the interpretation of the claims and the specification. The terms comprise, comprises, comprising, include, includes, including, has, having, contains or containing, or any other variation are intended to cover a non-exclusive inclusion. For example, an apparatus, a method, a composition, a mixture, or an article, that includes a list of elements is not necessarily limited to only those elements but can include other elements not expressly listed or inherent to such apparatus, method, composition, mixture, or article.

[0052] Additionally, the term exemplary means serving as an example, instance, or illustration. Any embodiment or design described as exemplary is not necessarily to be construed as preferred or advantageous over other embodiments or designs. The terms one or more and at least one indicate any integer number greater than or equal to one, i.e., one, two, three, four, etc. The term plurality indicates any integer number greater than one. The term connection can include an indirect connection and a direct connection.

[0053] References in the specification to embodiments, one embodiment, an embodiment, an example embodiment, an example, an instance, an aspect, etc., indicate that the embodiment described can include a particular feature, structure, or characteristic, but every embodiment may or may not include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it may affect such feature, structure, or characteristic in other embodiments whether explicitly described or not.

[0054] Relative or positional terms including, but not limited to, the terms upper, lower, right, left, vertical, horizontal, top, bottom, and derivatives of those terms relate to the described structures and methods as oriented in the drawing figures. The terms overlying, atop, on top, positioned on or positioned atop mean that a first element, such as a first structure, is present on a second element, such as a second structure, where intervening elements such as an interface structure can be present between the first element and the second element. The term direct contact means that a first element, such as a first structure, and a second element, such as a second structure, are connected without any intermediary elements.

[0055] Use of ordinal terms such as first, second, third, etc., in the claims to modify a claim element does not by itself connote any priority, precedence, or order of one claim element over another, or a temporal order in which acts of a method are performed, but are used merely as labels to distinguish one claim element having a certain name from another element having a same name (but for use of the ordinal term) to distinguish the claim elements.

[0056] The terms approximately and about may be used to mean within ?20% of a target (or nominal) value in some embodiments, within plus or minus (?) 10% of a target value in some embodiments, within ?5% of a target value in some embodiments, and yet within ?2% of a target value in some embodiments. The terms approximately and about may include the target value. The term substantially equal may be used to refer to values that are within ?20% of one another in some embodiments, within ?10% of one another in some embodiments, within ?5% of one another in some embodiments, and yet within ?2% of one another in some embodiments.

[0057] The term substantially may be used to refer to values that are within ?20% of a comparative measure in some embodiments, within ?10% in some embodiments, within ?5% in some embodiments, and yet within ?2% in some embodiments. For example, a first direction that is substantially perpendicular to a second direction may refer to a first direction that is within ?20% of making a 90? angle with the second direction in some embodiments, within ?10% of making a 90? angle with the second direction in some embodiments, within ?5% of making a 90? angle with the second direction in some embodiments, and yet within ?2% of making a 90? angle with the second direction in some embodiments.

[0058] The disclosed subject matter is not limited in its application to the details of construction and to the arrangements of the components set forth in the following description or illustrated in the drawings. The disclosed subject matter is capable of other embodiments and of being practiced and carried out in various ways.

[0059] Also, the phraseology and terminology used in this patent are for the purpose of description and should not be regarded as limiting. As such, the conception upon which this disclosure is based may readily be utilized as a basis for the designing of other structures, methods, and systems for carrying out the several purposes of the disclosed subject matter. Therefore, the claims should be regarded as including such equivalent constructions as far as they do not depart from the spirit and scope of the disclosed subject matter.

[0060] Although the disclosed subject matter has been described and illustrated in the foregoing exemplary embodiments, the present disclosure has been made only by way of example. Thus, numerous changes in the details of implementation of the disclosed subject matter may be made without departing from the spirit and scope of the disclosed subject matter.

[0061] Accordingly, the scope of this patent should not be limited to the described implementations but rather should be limited only by the spirit and scope of the following claims.

[0062] All publications and references cited in this patent are expressly incorporated by reference in their entirety.