METHOD FOR TESTING SWITCH SIGNALS OF AN INVERTER OF AN ELECTRIC MACHINE CONTROLLED VIA A PULSE-WIDTH MODULATION

Abstract

A method is provided for testing switch signals of an inverter of an electric machine of a drive system of a motor vehicle. The electric machine is controlled via a pulse-width modulation generated by a control unit using a target duty cycle and a triangular-waveform voltage sequence. An actual duty cycle of a current pulse-width modulation is continuously ascertained from the switch signals and compared with the target duty cycle of the control unit.

Claims

1. A method for testing the switch signals of an inverter of an electric machine of a drive system of a motor vehicle, the electric machine being controlled via a pulse-width modulation generated by a control unit using a target duty cycle and a triangular-waveform voltage sequence, wherein an actual duty cycle of the pulse-width modulation is continuously ascertained from the switch signals and compared with the target duty cycle of the control unit.

2. The method according to claim 1, wherein the actual duty cycle is ascertained in a clock pulse predetermined by a frequency of the triangular-waveform voltage sequence.

3. The method according to claim 1, wherein square-wave pulses of the pulse-width modulation applied to the electric machine are integrated in a clocked manner, and the actual duty cycle is determined from ascertained pulse-width integrals.

4. The method according to claim 3, wherein the ascertainment of the pulse-width integral is provided via an analog integrator and the actual duty cycle is read into the control unit by means of an A/D converter.

5. The method according to claim 4, wherein the integrator is reset to zero after each clock pulse.

6. The method according to claim 1, wherein the actual duty cycle is determined from a frequency of the triangular-waveform voltage sequence, and in each case, a pulse-width integral is ascertained in a discrete clock pulse.

7. The method according to claim 1, wherein the actual duty cycle D is determined according to the following relationship: $D=\frac{{?}_{t_1}^{t_2}{u}_{pwm}\mathrm{dt}.Math.f_{sw}}{U_1}$ with a square-wave pulse u.sub.pwm, a frequency f.sub.SW of the triangular-waveform voltage sequence, a DC voltage U.sub.1 of the inverter as well as a start time t.sub.1 and an end time t.sub.2 of an integration interval.

8. The method according to claim 4, wherein the analog integrator is started, stopped and zeroed based on levels (P.sub.L, P.sub.H) of the pulse-width modulation.

9. The method according to claim 4, wherein the respective pulse-width integral is converted into a digital variable in the A/D converter.

10. The method according to claim 9, wherein the actual duty cycle is determined in the control unit from the digital variable as a function of a frequency few of the triangular-waveform voltage sequence and a DC voltage of the inverter.

11. A method for controlling an electric machine, comprising: generating a pulse-width modulation based on a target duty cycle and a triangular-waveform voltage sequence; determining an actual pulse-width modulation output from switch signals of an inverter of the electric machine; determining an actual duty cycle based on the actual pulse-width modulation; and then updating the pulse-width modulation based on a comparison of the actual duty cycle and the target duty cycle.

12. The method according to claim 11, wherein the actual pulse-width modulation is determined based on an electrical variable detected before windings of the electric machine.

13. The method according to claim 11, wherein the actual duty cycle is determined for each clock pulse of the triangular-waveform voltage sequence based on a frequency of the triangular-waveform voltage sequence.

14. The method according to claim 13, further comprising: determining a pulse-width integral for each clock pulse; and determining the actual duty cycle for each clock pulse additionally based on the pulse width integrals.

15. The method according to claim 11, further comprising: determining a pulse-width integral for each clock pulse of the triangular-waveform voltage sequence by integrating the actual pulse-width modulation over time, wherein the actual pulse-width modulation includes square-wave pulses; and determining the actual duty cycle based on the pulse-width integrals.

16. The method according to claim 15, further comprising: providing each pulse-width integral via an analog integrator; and converting each pulse-width integral into a respective digital variable via an A/D converter.

17. The method according to claim 16, further comprising resetting the analog integrator to zero after each clock pulse.

18. The method according to claim 16, further comprising determining the actual duty cycle for each clock pulse based on the corresponding digital variable.

19. The method according to claim 16, wherein the actual duty cycle is determined from the digital variables as a function of a frequency of the triangular-waveform voltage sequence and a DC voltage of the inverter.

20. The method according to claim 16, wherein the analog integrator is started, stopped and zeroed based on levels (P.sub.L, P.sub.H) of the actual pulse-width modulation.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The present disclosure is explained in more detail with reference to the exemplary embodiment shown in FIGS. 1 to 5. In the figures:

[0014] FIG. 1 shows a block diagram of a drive system with an electric machine,

[0015] FIG. 2 shows a diagram of the formation of the pulse-width modulation of the control system of FIG. 1,

[0016] FIG. 3 shows the testing of the actual duty cycle of the control system of FIG. 1; and

[0017] FIG. 4 shows a circuit diagram of a circuit for detecting the actual duty cycle.

DETAILED DESCRIPTION

[0018] FIG. 1 shows the block diagram of a drive system 1 with an electric machine 2 driven via an inverter 3, which converts DC voltage U1 of an accumulator 4 into an alternating current for electrical energy.

[0019] The DC voltage U1 is applied to a power electronics 5 and forms DC voltage U.sub.dc for supplying a control unit 6. The control unit 6 controls the electric machine 2 via a pulse-width modulation u.sub.pwm and detects an angle of rotation ? of a rotor of the electric machine 2 to determine its rotational characteristics, such as speed, angle of rotation and rotational acceleration.

[0020] For testing the plausibility of the pulse-width modulation u.sub.pwm, switch signals 7, 8, 9, for example currents, voltages or other electrical variables of the three phases x, y, z of the power electronics 5 are detected by the control unit 6 after the power electronics 5 and before the windings of the electric machine 2, respectively, and their pulse-widths are evaluated and compared with the pulse-widths of the pulse-width modulation u.sub.pwm output by the control unit 6 to the power electronics 5. If necessary, the pulse-width modulation u.sub.pwm is corrected if deviations exceed a threshold, an error message is stored in an error memory or output, and/or a deviation ascertained is reacted to in some other way. The pulse-width modulation output by the power electronics 5 is ascertained in the proposed manner according to the following figures as the actual duty cycle for generating the pulse-width modulation.

[0021] FIG. 2 shows a diagram 100 with partial diagrams 101, 102 over time t to explain the formation of the pulse-width modulation u.sub.pwm. The control unit 6as shown in the partial diagram 101generates the triangular-waveform voltage sequence shown in curve 103 with the frequency f.sub.SW and the resulting wavelength Ts and combines it with the target duty cycle D(target), which is variably provided as a control variable for the control of the electric machine 2 and is shown in the curve 104, with predetermined values between zero and one. This results in the pulse-width modulation u.sub.pwm shown in the partial diagram 102, which is combined with the DC voltage U1 of the power electronics 5 and has switch-on times t.sub.on of the DC voltage U1 of different lengths determined by the target duty cycle D(target).

[0022] Testing of this pulse-width modulation u.sub.pwm is performed via detecting the pulse-width integrals actually obtained from the individual switch signals 7, 8, 9. These are calculated from the switch-on time t.sub.on of a square-wave pulse and the DC voltage U1. According to the following equations (2) and (3):

[00002]$\begin{array}{cc}D=\frac{t_{on}}{\mathrm{Ts}}=t_{on}.Math.f_{sw}& \left(2\right)\end{array}$$\begin{array}{cc}{?}_{t_1}^{t_2}{u}_{\mathrm{pwm}}\mathrm{dt}=U_1.Math.t_{on}& \left(3\right)\end{array}$

the actual duty cycle D is ascertained with reference to the aforementioned equation (1) between the respective switch-on times t.sub.1 and switch-off times t.sub.2 of a wavelength T.sub.s of a respective integration interval of the pulse-width modulation u.sub.pwm and compared with the target duty cycle D(target).

[0023] FIG. 3 shows a diagram 200 with partial diagram 201 of the currently ascertained pulse-width modulation u.sub.pwm(actual), which alternates between the DC voltage U1 and zero depending on the duty cycle, partial diagram 202 with pulse-width integrals I ascertained in each case from a pulse-width, and partial diagram 203 with digital variables S over time t, which are sampled from the pulse-width integrals I, lie between zero and one and are assigned to the current duty cycle. A pulse-width integral I is ascertained from one square-wave pulse present in each clock pulse. Then the integrator is set to zero and the corresponding square-wave pulse is integrated in the next clock pulse. In this way, a pulse-width integral I is ascertained for each clock pulse of a wavelength of the triangular-waveform voltage sequence, to which a sampled variable S over time t is assigned in each case. An actual duty cycle D for each clock pulse is ascertained from the sampled variables S and compared with the target duty cycle D(target).

[0024] FIG. 4 shows a simplified circuit diagram of circuit 300 for testing the pulse-width modulation u.sub.pwm of the inverter 3 of FIG. 1. The circuit underlying the circuit diagram 300 can be stored as a hardware or software module in the control unit 6. The circuit shown is formed by the integrator 301, an inverter 302, an A/D converter 303, and an output 304.

[0025] Levels P.sub.H, P.sub.L of the pulse-width modulation u.sub.pwm(actual) detected by the control unit 6 are applied to the integrator 301. The level P.sub.L controls a switch 305. A capacitor C.sub.1 is discharged in the non-active state of the level P.sub.L. When the level P.sub.L is active, the switch 305 is closed and the level P.sub.L corresponding to the DC voltage U1 charges the capacitor C.sub.1 through a resistor R.sub.1 for the duration of the current pulse-width, so that the charge on the capacitor C.sub.1 is equal to the negative pulse-width charge integral transferred from an operational amplifier 310 to the inverter 302.

[0026] In the inverter 302, the negative pulse-width integral is inverted so that according to the equation (4):

[00003]$\begin{array}{cc}I=\frac{{?}_{t_1}^{t_2}{u}_{\mathrm{pwm}}\left(\mathrm{actual}\right)\mathrm{dt}}{2.Math.R_1.Math.C_1}& \left(4\right)\end{array}$

the pulse-width integral I can be determined. This analog pulse-width integral I is converted in the A/D converter 303 for each clock pulse via a clock generator 306, a switch 307 and operational amplifiers 308, 309 into digital variables S, which are converted into the actual duty cycle D in the output 304 for each clock pulse of the triangular-waveform voltage sequence. The actual duty cycle D can be compared with the target duty cycle in the control unit 6. Any necessary corrections to the target duty cycle can be initiated and/or carried out by the control unit 6.

LIST OF REFERENCE SYMBOLS

[0027] 1 Drive system [0028] 2 Electric machine [0029] 3 Inverter [0030] 4 Accumulator [0031] 5 Power electronics [0032] 6 Control unit [0033] 7 Switch signal [0034] 8 Switch signal [0035] 9 Switch signal [0036] 100 Diagram [0037] 101 Partial diagram [0038] 102 Partial diagram [0039] 103 Curve [0040] 104 Curve [0041] 200 Diagram [0042] 201 Partial diagram [0043] 202 Partial diagram [0044] 203 Partial diagram [0045] 300 Circuit [0046] 301 Integrator [0047] 302 Inverter [0048] 303 A/D converter [0049] 304 Output [0050] 305 Switch [0051] 306 Clock generator [0052] 307 Switch [0053] 308 Operational amplifier [0054] 309 Operational amplifier [0055] 310 Operational amplifier [0056] C.sub.1 Capacitor [0057] D(target) Target duty cycle [0058] D Actual duty cycle [0059] f.sub.SW Frequency [0060] I Pulse-width integral [0061] P.sub.H Level [0062] P.sub.L Level [0063] R.sub.1 Resistor [0064] s Digital variable [0065] t Time [0066] t.sub.1 Start time [0067] t.sub.2 End time [0068] T.sub.S Wavelength [0069] u.sub.pwm Pulse-width modulation [0070] u.sub.pwm(actual) Current pulse-width modulation [0071] U.sub.dc DC voltage [0072] U1 DC voltage [0073] x Phase [0074] y Phase [0075] z Phase [0076] ? Angle of rotation