TUNNEL OXIDE LAYER, N-TYPE BIFACIAL CRYSTALLINE SILICON SOLAR CELL AND METHOD FOR MANUFACTURING SAME
20240145610 ยท 2024-05-02
Inventors
- Ming ZHANG (Meishan, CN)
- Xiajie MENG (Meishan, CN)
- Wenzhou XU (Meishan, CN)
- Hao CHEN (Meishan, CN)
- Mingzhang DENG (Meishan, CN)
- Guoqiang XING (Meishan, CN)
- Qian YAO (Meishan, CN)
Cpc classification
H01L31/02168
ELECTRICITY
International classification
H01L31/068
ELECTRICITY
H01L31/18
ELECTRICITY
Abstract
A tunnel oxide layer, an N-type bifacial crystalline silicon solar cell and a method for manufacturing the same are provided. The method for manufacturing the tunnel oxide layer includes forming excess -OH on a back side of a silicon wafer, and depositing the tunnel oxide layer on the back side of the silicon wafer by a Plasma Enhanced Atomic Layer Deposition method. The method for manufacturing the N-type bifacial crystalline silicon solar cell can include following steps: performing cleaning, texturing, boron diffusing, and alkaline polishing on an N-type silicon wafer, sequentially forming a P-type doped layer, a passivation layer, and an anti-reflection layer on a front side of the alkaline-polished N-type silicon wafer, and forming a tunnel oxide layer on a back side of the alkaline-polished N-type silicon wafer, followed by forming an N-type doped polysilicon layer, and after annealing, forming an anti-reflection layer.
Claims
1. A method for manufacturing a tunnel oxide layer, comprising following steps: forming excess OH on a back side of a silicon wafer; and depositing a tunnel oxide layer on the back side of the silicon wafer by Plasma Enhanced Atomic Layer Deposition method.
2. The method of claim 1, wherein the forming excess OH comprises: cleaning the silicon wafer by using an alkaline solution during an alkaline polishing process after boron diffusing, wherein the alkaline solution is prepared by mixing NaOH or KOH with H.sub.2O.sub.2.
3. The method of claim 1, wherein the Plasma Enhanced Atomic Layer Deposition method further comprises following steps: S 1, introducing a silicon precursor to adsorb silicon atoms on the back side of the silicon wafer, followed by argon gas purging to remove excess silicon atoms, and leaving a layer of silicon atoms adsorbed on the back side of the silicon wafer; S2, introducing an oxygen source and, under an influence of an electric field generated by a radio frequency power supply, depositing a SiO film on the back side of the silicon wafer; and S3, repeating steps S1 and S2 to form the tunnel oxide layer.
4. The method of claim 3, wherein the radio frequency power supply is a square wave or a sine wave power supply with a frequency of 40 kHz to 400 kHz.
5. The method of claim 3, wherein a deposition temperature of depositing the SiO.sub.x film is in a range of 80? C. to 400? C.; and/or the silicon precursor is an organosilicon source or a silane, and the oxygen source is oxygen or nitrous oxide.
6. The method of claim 3, wherein the number of depositing the SiO.sub.x film is 1 to 400 times, and/or, a thickness of the tunnel oxide layer is in a range of 1 nm to 2 nm.
7. A method for manufacturing an N-type bifacial crystalline silicon solar cell, comprising following steps: performing cleaning, texturing, boron diffusing, and alkaline polishing on an N-type silicon wafer; sequentially forming a P-type doped layer, a passivation layer, and an anti-reflection layer on a front side of the alkaline-polished N-type silicon wafer; and forming a tunnel oxide layer on a back side of the alkaline-polished N-type silicon wafer by using the method of claim 1, followed by forming an N-type doped polysilicon layer, and after annealing and cleaning, forming an anti-reflection layer.
8. The method of claim 7, further comprising: forming a front electrode on the anti-reflection layer located on the front side of the N-type silicon wafer and a back electrode on the anti-reflection layer located on the back side of the N-type silicon wafer.
9. The method of claim 7, wherein an annealing temperature is in a range of 850? C. to 1100? C.
10. The method of claim 7, wherein a method of alkaline polishing comprises: sequentially performing pre-cleaning, rinsing, etching, rinsing, alkali washing, rinsing, acid washing, and rinsing, wherein an alkali solution is used in the alkali washing, the alkali solution is prepared by mixing NaOH or KOH with H.sub.2O.sub.2 with a volume ratio of 1:9 to 1:10, and a temperature of the alkali washing is in a range of 45? C. to 55? C.
11. The method of claim 7, wherein the passivation layer on a front side of the P-type doped layer is made of aluminum oxide deposited by using Plasma-Enhanced Atomic Layer Deposition (PEALD) method, wherein a radio frequency power supply of PEALD is a frequency of 40 kHz, and a deposition temperature of PEALD is 430? C.
12. The method of claim 11, wherein the anti-reflection layer comprises multi layers containing silicon nitride with different refractive indexes, which are deposited using Plasma-Enhanced Chemical Vapor Deposition (PECVD) method on a front side of the passivation layer made of aluminum oxide.
13. The method of claim 7, wherein the anti-reflection layer comprises silicon nitride and is prepared on a back side of the N-type doped polysilicon layer.
14. The method of claim 8, wherein the front electrode is formed on the anti-reflection layer located on the front side of the N-type silicon wafer by printing a silver-aluminum paste, and the back electrode is formed on the anti-reflection layer located on the back side of the N-type silicon wafer.
15. An N-type bifacial crystalline silicon solar cell, comprising: an N-type silicon wafer; a P-type doped layer, a passivation layer, and an anti-reflection layer sequentially stacked on a front side of the N-type silicon wafer; and a tunnel oxide layer, an N-type doped polysilicon layer, and an anti-reflection layer sequentially stacked on a back side of the N-type silicon wafer, wherein the tunnel oxide layer is manufactured by the method of claim 1.
16. The N-type bifacial crystalline silicon solar cell of claim 15, wherein the forming excess OH comprises: cleaning the silicon wafer by using an alkaline solution during an alkaline polishing process after boron diffusing, wherein the alkaline solution is prepared by mixing NaOH or KOH with H.sub.2O.sub.2.
17. The N-type bifacial crystalline silicon solar cell of claim 15, wherein the Plasma Enhanced Atomic Layer Deposition method further comprises following steps: S1, introducing a silicon precursor to adsorb silicon atoms on the back side of the silicon wafer, followed by argon gas purging to remove excess silicon atoms, and leaving a layer of silicon atoms adsorbed on the back side of the silicon wafer; S2, introducing an oxygen source and, under an influence of an electric field generated by a radio frequency power supply, depositing a SiO.sub.x film on the back side of the silicon wafer; and S3, repeating steps S1 and S2 to form the tunnel oxide layer.
18. The N-type bifacial crystalline silicon solar cell of claim 17, wherein the radio frequency power supply is a square wave or a sine wave power supply with a frequency of 40 kHz to 400 kHz.
19. The N-type bifacial crystalline silicon solar cell of claim 17, wherein a deposition temperature of depositing the SiO.sub.x film is in a range of 80? C. to 400? C.; and/or the silicon precursor is an organosilicon source or a silane, and the oxygen source is oxygen or nitrous oxide.
20. The N-type bifacial crystalline silicon solar cell of claim 17, wherein the number of depositing the SiO.sub.x film is 1 to 400 times, and/or, a thickness of the tunnel oxide layer is in a range of 1 nm to 2 nm.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly describe the accompanying drawings used in the description of the embodiments. It is obvious that the accompanying drawings in the following description are only some embodiments of the present application, but are not to be construed as limiting the scope of the application. For those of ordinary skill in the art, other drawings can be obtained according to these accompanying drawings without creative work.
[0040]
DETAILED DESCRIPTION
[0041] In a process of realizing the present application, it can be found that passivation quality of a passivation layer made of oxide in a cell depends to a large extent on preparation and an annealing temperature of an interface oxide. Moreover, density, a film thickness and a stoichiometric ratio of Si.sup.4+ of a SiO.sub.x film have obvious effects on blocking impurity migration, an impurity absorption effect and thermal stability. For the SiO.sub.x film, electrons can pass through the dense SiO.sub.x film via a quantum tunneling effect and local pinholes. Therefore, local pinholes with a high density and a large size is conducive to electron transmission and reduction of contact resistance, thereby improving an opening voltage and a short-circuit current of the crystalline silicon solar cell.
[0042] At present, the SiO.sub.x film can be mainly prepared by a wet chemical growth method, a thermal oxidation growth method, a Plasma. Enhanced Chemical Vapor Deposition (PECVD) method, and an Atomic Layer Deposition (ALD) method. The above methods have various problems.
[0043] A preparation process of the SiO.sub.x film by the thermal oxidation growth method is very slow, since HNO.sub.3 is required to decompose to provide active oxygen, the preparation process is not conducive to rapid industrial production. A preparation process of the SiO.sub.x film by PECVD method has been widely applied in a solar industry to inhibit potential induced degradation (PID). However, a deposition rate of the SiO.sub.x film prepared by a silane (SiH.sub.4) reacting with nitrous oxide gas (N.sub.2O) or oxygen is too fast, it is difficult to accurately control the deposition of the SiO.sub.x film, so it is difficult to control a thickness of the SiO.sub.x film within 2 nm. Furthermore, when the thickness of the SiO.sub.x film exceeds 2 nm, electrons are difficult to tunnel and the current is greatly reduced. The thickness of the tunnel oxide layer is dependent on diffusion energy of the oxygen atoms and becomes self-saturated. The SiO.sub.x films prepared by the wet chemical growth method with a hot nitric acid and the PECVD method have a low stoichiometric ratio of Si.sup.4+ than that of SiO.sub.x film prepared by thermal oxidation growth method, a weak blocking effect, a weak impurity absorption effect and poor thermal stability. The SiO.sub.x films prepared by the wet chemical growth method with the hot nitric acid cannot withstand the high annealing temperature. Moreover, the excess oxygen source will react with silicon atoms again during a high temperature annealing process, so as to increase the thickness of the SiO.sub.x film. The SiO.sub.x film prepared by the thermal oxidation growth method has excellent film quality and density, and has good effects in impurity absorption, blocking and thermal stability. However, the thermal oxidation growth method usually has a long preparation time and a high temperature, which is not conducive to large-scale production.
[0044] The Atomic Layer Deposition method can be performed by using oxygen or nitrous oxide gas with silane (SiH.sub.4) at a deposition temperature of 200? C. to 500? C. Taking the oxygen as an example, the specific process can be briefly described as follows: performing a primary adsorption on a substrate surface; the silane reacting with hydroxyl groups on the substrate surface; adsorbing silicon groups on the substrate surface until saturation; pumping away the remaining silane; introducing oxygen to react with the silicon groups to obtain SiO bridge bonds; and after the substrate surface is passivated by the hydroxyl groups, pumping away the excess oxygen; and repeating the above steps to form a first layer of SiO.sub.x film. In this way, a first disadvantage is that the SiO.sub.x film is poor in density, high in surface state density and low in passivation performance. A second disadvantage is that the SiO.sub.x film is required to be deposited at a high temperature of 200? C. to 500? C. A third disadvantage is that preparation time of the SiO.sub.x film is long, thus reducing a utilization rate and production capacity of facilities, which is unacceptable in industrial production. And a fourth disadvantage is that pinholes with the high density and the large size cannot be achieved, which is not conducive to reducing the contact resistance.
[0045] After analyzing various methods and disadvantages for manufacturing the SiO.sub.x film in the related art, it can be found that main problems of manufacturing the SiO.sub.x film are as follows. The growth rate of the SiO.sub.x film is too fast or too slow, the density thereof is poor, the stoichiometric ratio of Si.sup.4+ is low, and the SiO.sub.x film cannot be annealed at high temperature, so that pinholes with the high density and the large size cannot be obtained.
[0046] In order to make objects, technical solutions and advantages of the present application more clearly understood, the technical solutions in the embodiments of the present application are clearly and completely described in the following. The specific conditions without indicating in the embodiments shall be performed in accordance with the general conditions or the conditions recommended by a manufacturer. The reagents or instruments used without indicating the manufacturer are conventional products that can be purchased commercially.
[0047] The tunnel oxide layer, an N-type bifacial crystalline silicon solar cell and a method for manufacturing the same in the present application are specifically described below.
[0048] Some embodiments of the present application provide a method for manufacturing the tunnel oxide layer. The method includes forming excess OH on a back side of a silicon wafer, and depositing a tunnel oxide layer on the back side of the silicon wafer by a Plasma Enhanced Atomic Layer Deposition method. The forming excess OH includes cleaning the silicon wafer by using an alkaline solution during an alkaline polishing process after boron diffusing. The alkaline solution is prepared by mixing NaOH or KOH with H.sub.2O.sub.2.
[0049] The Plasma Enhanced Atomic Layer Deposition method can further include following steps: [0050] S1, introducing a silicon precursor to adsorb silicon atoms on the back side of the silicon wafer, followed by argon gas purging to remove excess silicon atoms, leaving a layer of silicon atoms adsorbed on the back side of the silicon wafer, wherein the silicon precursor is an organosilicon source or a silane; [0051] S2, introducing an oxygen source and, under an influence of an electric field generated. by a radio frequency power supply, depositing a SiO.sub.x film on the back side of the silicon wafer, wherein the oxygen source being oxygen or nitrous oxide, the radio frequency power supply is a square wave or a sine wave power supply with a frequency of 40 kHz to 400 kHz, a deposition temperature of depositing the SiO.sub.x film is in a range of 80? C. to 400? C.; and
[0052] S3, repeating steps S1 and S2 to form the tunnel oxide layer.
[0053] Generally, the number of depositing the SiO.sub.x film can be 1 to 400 times, and a. corresponding thickness of the tunnel oxide layer can be in a range of 1 nm to 2 nm.
[0054] Some embodiments of the present embodiment further provides an N-type bifacial crystalline silicon solar cell, including: a silicon wafer, a passivation layer, an anti-reflection layer, and a front electrode sequentially stacked on a front side of the silicon wafer; and a tunnel oxide layer, a doped polysilicon layer, an anti-reflection layer, and a back electrode sequentially stacked on a back side of the silicon wafer. And the tunnel oxide layer is manufactured by the above-mentioned method for manufacturing the tunnel oxide layer.
[0055] It should be noted that the silicon wafer in the present embodiment can be an N-type silicon wafer. A geometric dimension and a specification shape of the silicon wafer are not limited. The tunnel oxide layer is located between the back of the N-type silicon wafer and the doped polysilicon layer, which cannot be adjusted.
[0056] Furthermore, some embodiments of the present embodiment provide a method for manufacturing an N-type bifacial crystalline silicon solar cell. A Plasma-Enhanced Atomic Layer Deposition (PEALD) device can be applied in the method, and the method includes following steps: [0057] (1) performing cleaning, texturing, boron diffusing, and alkaline polishing on an N-type silicon wafer, [0058] wherein, a method of alkaline polishing can include: sequentially performing pre-cleaning, rinsing, etching, rinsing, alkali washing, rinsing, acid washing, and rinsing, wherein an alkali solution is used in the alkali washing, the alkali solution is prepared by mixing NaOH or KOH with H.sub.2O.sub.2 with a volume ratio of 1:9 to 1:10, and a temperature of the alkali washing is in a range of 45? C. to 55? C., so as to firm excess OH on a back side of the N-type silicon wafer; [0059] (2) sequentially forming a P-type doped layer, a passivation layer, and an anti-reflection layer on a front side of the alkaline-polished N-type silicon wafer; [0060] (3) forming a tunnel oxide layer on a back side of the alkaline-polished N-type silicon wafer by using the above method for manufacturing the tunnel oxide layer, followed by forming an N-type doped polysilicon layer, and after annealing, forming an anti-reflection layer, wherein, the tunnel oxide layer is deposited on the back side of the silicon wafer by a Plasma Enhanced Atomic Layer Deposition method, and an annealing temperature is in a range of 850? C. to 1100? C.; and. [0061] (4) forming a front electrode on the anti-reflection layer located on the front side of the N-type silicon wafer and a back electrode on the anti-reflection layer located on the back side of the N-type silicon wafer.
[0062] It should be noted that in the present embodiment, a form and shape of the PEALD device, and a device manufacturer and use conditions are not limited. For example, the PEALD device may be a tube-type or a plate-type apparatus. Furthermore, a material and shape of a silicon wafer bearing device in the present application are not limited, such as the shape and size of a graphite boat are not limited herein.
[0063] The features and performance of the present application are described in further detail below with reference to embodiments.
Example 1
[0064] This example provides an N-type bifacial crystalline silicon solar cell. The N-type bifacial crystalline silicon solar cell is manufactured by the following steps.
[0065] In first step, after cleaning an N-type silicon wafer, a front side of the N-type silicon wafer is textured on to reduce light reflection, and boron diffused on the front side of the N-type silicon wafer to obtain boron-containing compounds, forming a P-type doped layer.
[0066] In second step, borosilicate glass is removed after boron diffusing including following processes: [0067] Pre-cleaning: pre-cleaning with an alkali solution for 135 seconds under a temperature of 70? C., and the alkali solution being prepared by mixing NaOH with H.sub.2O.sub.2 with a volume ratio of 1:10; [0068] Rinsing: rinsing with deionized water for 135 seconds; [0069] Etching: etching with NaOH and additives for 460 seconds, and alkaline polishing on a back side of the alkaline-polished N-type silicon wafer; [0070] Rinsing: rinsing with deionized water for 135 seconds; [0071] Alkali washing: cleaning with an alkali solution for 120 seconds under a temperature of 50? C., and the alkali solution being prepared by mixing NaOH or KOH with H.sub.2O.sub.2 with the volume ratio of 3:28; [0072] Rinsing: rinsing with deionized water for 135 seconds; [0073] Acid washing: acid washing with HCl aqueous solution for 120 seconds; and [0074] Rinsing: rinsing with deionized water for 135 seconds.
[0075] The excess OH can be formed by cleaning the silicon wafer with an alkaline solution prepared by mixing NaOH or KOH with H.sub.2O.sub.2, which is conducive to depositing a SiO.sub.x film by the Plasma Enhanced Atomic Layer Deposition method.
[0076] In third step, the aluminum oxide passivation layer is deposited on a front side of the P-type doped layer by the PEALD method, wherein a radio frequency power supply of PEALD is a frequency of 40 kHz, and a deposition temperature of PEALD is 430? C.
[0077] In fourth step, multi anti-reflection layers containing silicon nitride with different refractive indexes are deposited on a front side of the aluminum oxide passivation layer by PECVD method. Specifically, the multi anti-reflection layers include three layers of silicon nitride (refractive index of the three layers of silicon nitride decreases along a direction from inside to outside), a silicon oxynitride layer and a silicon oxide layer.
[0078] In fifth step, a SiO.sub.x tunnel silicon oxide layer is formed on a back side of the N-type silicon wafer by the PECVD method. A thickness of the SiO.sub.x tunnel silicon oxide layer is 1.5 nm, the radio frequency power supply is a square wave with the frequency of 40 kHz, and the deposition temperature of depositing the SiO.sub.x tunnel silicon oxide layer is 400? C. The fifth step can further include forming an intrinsic N-type doped polysilicon layer and an N-type doped polysilicon layer doped by phosphorus-containing compounds, and followed by high temperature at an annealing temperature of 902? C. and RCA cleaning,
[0079]
[0080] In sixth step, an anti-reflection layer containing silicon nitride is prepared on a. back side of the N-type doped polysilicon layer. Specifically, the anti-reflection layer containing silicon nitride includes four layers of silicon nitride (refractive index of the four layers of silicon nitride decreases along a direction from inside to outside), a silicon oxynitride layer and a silicon oxide layer.
[0081] In seventh step, the front electrode is formed on the anti-reflection layer located on the front side of the N-type silicon wafer by printing a silver-aluminum paste, and the back electrode is formed on the anti-reflection layer located on the back side of the N-type silicon wafer.
[0082] An iVoc (Implicit Volatile Organic Compound) of the obtained N-type bifacial crystalline silicon solar cell in Example 1 is more than 720 mV, and the conversion efficiency thereof is more than 24.5%.
Comparative Example 1
[0083] An N-type bifacial crystalline silicon solar cell is provided in Comparative Example 1. A difference between Example 1 and Comparative Example 1 is in that Comparative Example 1 includes performing polishing without the alkali solution prepared by mixing NaOH or KOH with H.sub.2O.sub.2 with a high volume ratio.
[0084] An open circuit voltage of the N-type bifacial crystalline silicon solar cell in Comparative Example 1 is about 705 mV, and the conversion efficiency thereof is about 24%.
Comparative Example 2
[0085] An N-type bifacial crystalline silicon solar cell is provided in Comparative Example 2. A difference between Example 1 and Comparative Example 2 is in that Comparative Example 2 includes reducing a flow rate of a boron source during boron diffusing, reducing the concentration of the boron source, controlling a square resistance at about 100, and without annealing.
[0086] An open circuit voltage of the N-type bifacial crystalline silicon solar cell in Comparative Example 2 was about 700 mV, and the conversion efficiency thereof is about 23.7%.
Comparative Example 3
[0087] An N-type bifacial crystalline silicon solar cell is provided in Comparative Example 3. A difference between Example 1 and Comparative Example 3 is in that Comparative Example 3 includes oxidizing the N-type silicon wafer in a hot nitric acid solution with a certain concentration, and without annealing.
[0088] An open circuit voltage of the N-type bifacial crystalline silicon solar cell in Comparative Example 3 is about 708 mV, and the conversion efficiency thereof is about 23.9%.
Comparative Example 4
[0089] An N-type bifacial crystalline silicon solar cell is provided in Comparative Example 4. A difference between Embodiment 1 and Comparative Example 4 is that: in the Comparative Example 4, depositing the SiO.sub.x film at a deposition temperature of 360? C., introducing the nitrous oxide in a flow rate of 10000 sccm, a power supply of the PECVD method being 10 kW, and the deposition time being 120s.
[0090] An open circuit voltage of the N-type bifacial crystalline silicon solar cell in
[0091] Comparative Example 4 is about 710 mV, and the conversion efficiency thereof is about 24%.
[0092] Firstly, comparison data of the cell conversion efficiency are as follows.
[0093] At present, most cells are Passivated Emitter and Rear Cells (PERC), and the PERC are different from a structure of the N-type bifacial crystalline silicon solar cell in the present application. Therefore, the conversion efficiency of a cell obtained by a conventional process is mostly less than 24% (i.e., conversion efficiency of the cell is 23%, the opening circuit voltage is less than 710 mV, and a current is less than 18 A). The conversion efficiency of solar cell prepared by the method in the present application can be up to 24.7%.
[0094] Secondly, a comparison of the cell surface is as below.
[0095] It can be seen from the Example and Comparative Examples that: the number of repeating times in the PEALD method of the present application can be adjusted to prepare a tunnel oxide layer with a controllable thickness; and pinholes with a high density and a large size can be achieved after a high temperature annealing.
[0096] In summary, a tunnel oxide layer, an N-type bifacial crystalline silicon solar cell and a method for manufacturing the same are provided in the present application. A SiO, layer can be continuous and dense, and have a fast growth rate, an excellent impurity absorption effect and an excellent blocking effect. Moreover, a thickness of the SiO.sub.x layer can be accurate and controllable, and the SiO.sub.x layer has pinholes with a high density and a large size after high temperature annealing.
[0097] The above description is merely several embodiments of the present application, and not to be construed as limiting the scope of the application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principles of the present application shall be included within the scope of the present application,
[0098] Industrial applicability can be illustrated as follows.
[0099] The present application provides a tunnel oxide layer, an N-type bifacial crystalline silicon solar cell and a method for manufacturing the same, and the present application relates to the field of crystalline silicon solar cells. The method for manufacturing the tunnel oxide layer can include forming excess OH on a back side of a silicon wafer, and depositing the tunnel oxide layer on the back side of the silicon wafer by a Plasma Enhanced Atomic Layer Deposition method. The method for manufacturing the N-type bifacial crystalline silicon solar cell can include following steps: performing cleaning, texturing, boron diffusing, and alkaline polishing on an N-type silicon wafer, sequentially forming a P-type doped layer, a passivation layer, and an anti-reflection layer on a front side of the alkaline-polished N-type silicon wafer, and forming a tunnel oxide layer on a back side of the alkaline-polished N-type silicon wafer, followed by forming an N-type doped polysilicon layer, and after annealing, forming an anti-reflection layer. A SiO.sub.x layer obtained by the above method can be continuous and dense, and have a fast growth rate, an excellent impurity absorption effect and an excellent blocking effect. Moreover, a film thickness of the SiO.sub.x layer can be accurate and controllable, and the SiO.sub.x layer has pinholes with a high density and a large size after high temperature annealing.
[0100] In addition, it can be understood that the tunnel oxide layer, the N-type bifacial crystalline silicon solar cell and the method for manufacturing the same can be reproduced and applied in a variety of industries. For example, the tunnel oxide layer, the N-type bifacial crystalline silicon solar cell and the method for manufacturing the same can be applied in the field of crystalline silicon solar cells.