Amplifier circuit with reduced feedforward current

Abstract

An amplifier circuit that includes a first amplifier that has a first input that receives an input signal, a second input and an output. The amplifier circuit also includes a second amplifier that has a first input that is coupled to the output of said the amplifier and a second input. The circuit further includes a first impedance network Z1, a second impedance network Z2, a third impedance network Z3 and a fourth impedance network Z4. The first impedance network Z1 is coupled to a load and the second input of the second amplifier, the second impedance Z2 is connected the output of the first amplifier and the second input of the first amplifier, the third impedance Z3 is connected to the output of the first amplifier and the load, the fourth impedance Z4 is connected the output of the second amplifier and the second input of said first amplifier.

Claims

1. An amplifier circuit, comprising: a first amplifier that has a first input that receives an input signal, a second input and an output; a second amplifier that has a first input that is coupled to said output of said first amplifier, a second input and an output; a first impedance network Z1 coupled to a load and has an output connected to said second input of said second amplifier; a second impedance Z2 connected to said output of said first amplifier and said second input of said first amplifier; a third impedance Z3 connected to said output of said first amplifier and said load; and a fourth impedance Z4 connected to said output of said second amplifier and said second input of said first amplifier.

2. The amplifier circuit of claim 1, further comprising a resistor in parallel with a capacitor, said resistor and said capacitor being connected to said output of said second amplifier and said second input of said second amplifier.

3. The amplifier circuit of claim 1, wherein said first Z1, second Z2, third Z3 and fourth Z4 impedance networks have values such that Z1Z2=Z3Z4.

4. The amplifier circuit of claim 1, wherein said first Z1, second Z2, third Z3 and fourth Z4 impedance networks consist of resistors, capacitors or network combinations of resistors and capacitors.

5. The amplifier circuit of claim 1, further comprising a fifth impedance network Z5 that is connected to the said load and said second input of said first amplifier.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic of an amplifier circuit of the prior art;

(2) FIG. 2 is a schematic of an embodiment of an amplifier circuit of the present invention;

(3) FIG. 3 is a graph showing loading impedance for the prior art amplifier circuit;

(4) FIG. 4 is a graph showing loading impedance for the amplifier circuit of the present invention; and,

(5) FIG. 5 is a schematic of another alternative embodiment of the amplifier circuit.

DETAILED DESCRIPTION

(6) Disclosed is an amplifier circuit that includes a first amplifier that has a first input that receives an input signal, a second input and an output. The amplifier circuit also includes a second amplifier that has a first input that is coupled to the output of the first amplifier and a second input. The circuit further includes a first impedance network Z1, a second impedance network Z2, a third impedance network Z3 and a fourth impedance network Z4. The first impedance network Z1 is coupled to a load and the second input of the second amplifier, the second impedance Z2 is connected the output of the first amplifier and the second input of the first amplifier, the third impedance Z3 is connected to the output of the first amplifier and the load, the fourth impedance Z4 is connected the output of the second amplifier and the second input of said first amplifier. With this configuration of the amplifier circuit, the linear current can be made arbitrarily small and the loading on the driver stage can be significantly reduced. Thus the dissipation in the driver stage is reduced, as is distortion and stability is improved.

(7) Referring to the drawings more particularly by reference numbers, FIG. 2 shows an embodiment of an amplifier circuit 100 of the present invention. The amplifier 100 includes a gain/driver amplifier 102 and an output amplifier 104. The amplifier 102 includes an input that receives an input signal V.sub.i and a second input that receives feedback V.sub.f. The amplifer 102 provides an output V.sub.g to an input of the amplifier 104. Amplifier 104 provides an output V.sub.b. The amplifier circuit 100 also includes passive impedance networks 106 (Z.sub.g), 108 Z.sub.5), 110 (Z.sub.4), 112 (Z.sub.2), 114 (Z.sub.1) and 116 (Z.sub.3). The impedance network 114 (Z.sub.1) is connected to a load V.sub.L, The unity gain output stage shown in FIG. 1 is reconfigured to encompass the bridge element Z.sub.1. The rest of the bridge connections remain unaltered from the prior art circuit shown in FIG. 1 of the '355 patent, which is incorporated by reference. This reconnection ensures that for values of B significantly greater than unity the feedback loop around the output stage now ensures that there is little voltage difference impressed across Z.sub.3 and therefore little current through it.

(8) It would appear by inspection that the bridge balance should be unaltered and that the distortion reduction brought about by its employment is also unaffected, as the take-off point for the feedback through Z.sub.4 is the same as before.

(9) The action of the bridge connection scheme is to make the output voltage V.sub.L independent of output stage B and any distortion introduced by it at point V.sub.b. Thus the change in voltage V.sub.b caused by the reconnection of the inverting input should have no effect upon bridge balance and output distortion cancellation.

(10) An analysis of the amplifier operation produces the following equation:

(11) $\frac{V_L}{Z_L}=\frac{B\left(Z_2+Z_4\right)}{Z_1\left({\mathrm{BZ}}_2+Z_4\right)}{V}_{\mathrm{in}}-\left(\frac{\left({\mathrm{BZ}}_2+\left[1+B\right]Z_4\right)}{Z_1\left(Z_4+{\mathrm{BZ}}_2\right)}+\frac{\left(Z_1+Z_L\right)}{Z_L\left(Z_1+{\mathrm{BZ}}_3\right)}\right)V_L+\left(\frac{Z_4}{Z_1\left(Z_4+{\mathrm{BZ}}_2\right)}-\frac{1}{Z_1+{\mathrm{BZ}}_3}\right)V_d$
Where V.sub.d is a distortion term appearing at the output of amplifier 104. This equation can be rearranged to give V.sub.L in terms of V.sub.in and V.sub.d but first, it can be seen that the V.sub.d term has two arguments of opposite sign. If we therefore make these equal, the distortion term is eliminated from the amplifier output voltage V.sub.L. So for distortion elimination:

(12) $\frac{Z_4}{Z_1\left(Z_4+{\mathrm{BZ}}_2\right)}=\frac{1}{Z_1+{\mathrm{BZ}}_3}$
which simplifies down to:

(13) $\frac{Z_2}{Z_4}=\frac{Z_3}{Z_1}$
This is the same balance equation as described in the '355 patent. The reconnection of output stage B has had no effect upon the balance, nor has the value of gain B.

(14) The output impedance is given by:

(15) $Z_o=\frac{Z_1\left({\mathrm{BZ}}_2+Z_4\right)}{{\mathrm{BZ}}_2+\left(1+B\right)Z_4+Z_4}$
Since Z.sub.2>>Z.sub.4 within the audio band:
Z.sub.oZ.sub.1
This result is close to that of the standard bridge connection output impedance of Z.sub.1//Z.sub.3. Thus the output impedance is not reduced by this reconnection of the output stage.

(16) The incorporation of bridge element Z.sub.1 into the feedback loop of output stage 104 means that the current through Z.sub.3 should be reduced. The feedforward current I.sub.3 is given by:

(17) $I_3=\frac{\left(Z_1+Z_L\right)}{Z_L}.Math.\frac{1}{Z_1+{\mathrm{BZ}}_3}{V}_L-\frac{1}{Z_1+{\mathrm{BZ}}_3}{V}_d$
Setting V.sub.d to zero to obtain the linear portion of current we obtain:

(18) $I_3=\frac{\left(Z_1+Z_L\right)}{Z_L}.Math.\frac{1}{Z_1+{\mathrm{BZ}}_3}{V}_L$
The feedforward current for the configuration in the '355 patentI.sub.3is:

(19) $I_3^{}=\frac{Z_1}{\left(Z_1+Z_3\right)Z_L}{V}_L$
Dividing the two gives:

(20) $\frac{I_3}{I_3^{}}=\frac{\left(Z_1+Z_L\right)}{Z_L}.Math.\frac{1}{Z_1+{\mathrm{BZ}}_3}.Math.\frac{\left(Z_1+Z_3\right)Z_L}{Z_1}$
Now, Z.sub.3>>Z.sub.1 and Z.sub.L>>Z.sub.1 so the equation reduces to:

(21) 0$\frac{I_3}{I_3^{}}=\frac{Z_L}{{\mathrm{BZ}}_1}$
So the linear error current I.sub.3 is reduced by the factor Z.sub.L/BZ.sub.1 or in other words, B>Z.sub.L/Z.sub.1 to bring about a reduction in linear error current I.sub.3.

(22) The effect of the linear error current can be assessed by looking at the impedance that the feedforward network presents to the amplifier 102. The higher the impedance, the lower the linear error current will be. FIGS. 3 and 4 illustrate this. FIG. 3 shows the loading impedance for a particular instance of the configuration shown in FIG. 1, whereas FIG. 4 shows the impedance for the configuration of FIG. 2. It can be seen that the impedance in the audio band is greatly increased.

(23) The introduction of the modified feedback loop around amplifier 104 shown in FIG. 2 may complicate the design of the various feedback loops depending on the characteristics of the amplifier 104. A further degree of control over the design may be accomplished by splitting the take-off points for the feedback around amplifier 104 as shown in the alternate embodiment of the amplifier circuit 102 depicted in FIG. 5. The amplifier circuit 102 includes a resistor 118 (R.sub.f) and a capacitor 120 (C.sub.f). Also depicted is a load 122 (R.sub.L). At low frequencies, the feedback is dominated by the resistive path from the load 122 via resistor R.sub.f, thereby reducing the linear error current as originally intended. At high frequencies the feedback is dominated by the capacitive feedback path via C.sub.f, thus reducing the effect of any reactive load impedance at the output of the amplifier while simultaneously adding an extra degree of control over the effective impedance presented to the amplifier 102.

(24) The '355 patent describes the connection of impedance elements Z.sub.1 to Z.sub.4 such that they consist of linear circuit elements including resistors, capacitors, or network combinations thereof. One combination detailed in the specification of the '355 patent is that Z.sub.1 is a resistor, Z.sub.2 is a capacitor, Z.sub.3 is a parallel resistor and capacitor and Z.sub.4 is a series resistor and capacitor. An additional feedback path can be added via Z.sub.5 without upsetting the bridge balance. In this case, this feedback path may comprise a low pass filter. This is not a limiting combination however. For instance, Z.sub.3 may comprise a capacitor without a parallel resistor, in which case Z.sub.4 reduces to a resistor and Z.sub.5 is not then required to act as a filter. In such a case, the balance of feedback around the internal feedback loop (where the feedback is taken from the output of amplifier B) and the external feedback loop (where the feedback is taken from overall output V.sub.L) can be altered, such that the internal loop feedback is reduced in magnitude compared to the external feedback loop. The bridge has to be rebalanced when this modification is made to ensure distortion cancellation still occurs correctly. However, once accomplished, such an arrangement can provide for a wideband constant reduction in amplifier output impedance with the operational bandwidth of the amplifier as opposed to the frequency dependent output impedance reduction of the previously described arrangement.

(25) While certain exemplary embodiments have been described and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative of and not restrictive on the broad invention, and that this invention not be limited to the specific constructions and arrangements shown and described, since various other modifications may occur to those ordinarily skilled in the art.