ANTI-BARRIER-CONDUCTION (ABC) SPACERS FOR HIGH ELECTRON-MOBILITY TRANSISTORS (HEMTS)
20190267480 ยท 2019-08-29
Assignee
Inventors
Cpc classification
H01L29/66462
ELECTRICITY
H01L29/365
ELECTRICITY
International classification
H01L29/778
ELECTRICITY
Abstract
A field effect transistor (FET) includes a substrate, a back barrier disposed on the substrate, a channel disposed on the back barrier, a front barrier disposed on the channel, a source, and a drain, such that at least one of the front barrier and the back barrier includes an anti-barrier-conduction (ABC) spacer which reduces parasitic conduction on a path from the source to the drain through at least one of the front barrier and the back barrier, reduces ON-state leakage from the channel to gate or substrate of the FET via resonant tunneling, and reduces OFF-state leakage by presenting tall barriers to electrons as well as electron-holes. This results in a highly linear, low gate leakage, low parasitic conduction, and low noise operation of FET.
Claims
1. A field effect transistor (FET) comprising: a substrate; a back barrier disposed on the substrate; a channel disposed on the back barrier; and a front barrier disposed on the channel; wherein at least one of the front barrier and the back barrier includes an anti-barrier-conduction (ABC) spacer.
2. The FET of claim 1, wherein the ABC spacer is grown by a fabrication method selected from a lattice matched growth, a pseudo-morphic growth and a metamorphic growth.
3. The FET of claim 1, wherein the ABC spacer is grown by a fabrication method selected from molecular beam epitaxy (MBE), metal-organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), thermal evaporation, and sputtering.
4. The FET of claim 1, wherein the ABC spacer is disposed adjacent to the channel.
5. The FET of claim 1, wherein the ABC spacer causes a conduction-band offset in the range of +0.1 eV to +10 eV relative to and above an energy level of at least one of the front barrier and the back barrier.
6. The FET of claim 1, wherein the ABC spacer is composed of a wide-bandgap (WBG) material.
7. The FET of claim 6, wherein a pair of one of the barrier materials/WBG material is selected from AlGaAs/AlAs, AlGaAs/GaP, AlGaAs/InGaP, InP/In(Ga)AlAs, In(Ga)AlAs/Al(Ga)AsSb, InP/Al(Ga)AsSb, InGaAlAs/InAlAs, AlGaAsSb/AlAsSb and AlGaSb/AlSb.
8. The FET of claim 1 wherein the channel is alloy-compositionally graded in a piecewise linear manner.
9. The FET of claim 1 wherein the channel is alloy-compositionally graded in a piecewise quadratic manner.
10. The FET of claim 1, further comprising: a source; a drain; and a gate.
11. The FET of claim 10, wherein the ABC spacer is disposed between the gate and the front barrier.
12. The FET of claim 10, wherein the ABC spacer reduces parasitic conduction on a path from the source to the drain through at least one of the front barrier and the back barrier.
13. The FET of claim 10, wherein the ABC spacer reduces ON-state leakage into the gate caused by resonant tunneling from the channel.
14. The FET of claim 10, wherein the ABC spacer reduces thermionic emission of at least one of electrons and electron-holes over one at least of the front and back barriers.
15. The FET of claim 10, wherein the ABC spacer reduces tunneling of at least one of electrons and electron-holes through at least one of the front and back barriers.
16. The FET of claim 10, wherein the ABC spacer improves the OIP3 figure of merit for linearity.
17. The FET of claim 10, wherein the ABC spacer reduces at least one of gate leakage, substrate leakage, and gate noise.
18. A high-electron mobility transistor (HEMT) comprising: a substrate; a back barrier disposed on the substrate; a channel disposed on the back barrier; a front barrier disposed on the channel; a pulse-doping layer disposed in at least one of the front barrier and the back barrier; and wherein at least one of the front barrier and the back barrier includes an anti-barrier-conduction (ABC) spacer.
19. The HEMT of claim 18, wherein the ABC spacer is composed of a wide-bandgap (WBG) material.
20. The HEMT of claim 19, wherein a pair of one of the barrier materials/WBG material is selected from AlGaAs/AlAs, AlGaAs/GaP, AlGaAs/InGaP, InP/In(Ga)AlAs, In(Ga)AlAs/Al(Ga)AsSb, InP/Al(Ga)AsSb, InGaAlAs/InAlAs, AlGaAsSb/AlAsSb and AlGaSb/AlSb.
21. The HEMT of claim 18, further comprising: a source; and a drain; wherein the ABC spacer reduces parasitic conduction on a path from the source to the drain through at least one of the front barrier and the back barrier.
22. A method comprising: disposing a back barrier on a substrate; disposing a channel on the back barrier; disposing a front barrier on the channel; and disposing an anti-barrier-conduction (ABC) spacer in relation to at least one of the front barrier and the back barrier.
23. The method of claim 22, wherein the ABC spacer is disposed adjacent to the channel.
24. The method of claim 22, wherein the ABC spacer is disposed within at least one of the front barrier and the back barrier.
25. The method of claim 22, further comprising: disposing a source and a drain above the front barrier; wherein the ABC spacer reduces parasitic conduction on a path from the source to the drain through at least one of the front barrier and the back barrier.
26. The method of claim 22, wherein the ABC spacer is composed of a wide-bandgap (WBG) material.
27. The method of claim 26, wherein a pair of one of the barrier materials/WBG material is selected from AlGaAs/AlAs, AlGaAs/GaP, AlGaAs/InGaP, InP/In(Ga)AlAs, In(Ga)AlAs/Al(Ga)AsSb, InP/Al(Ga)AsSb, InGaAlAs/InAlAs, AlGaAsSb/AlAsSb and AlGaSb/AlSb.
Description
BRIEF DESCRIPTION OF DRAWINGS
[0029] The foregoing summary, as well as the following detailed description of presently preferred embodiments of the invention, will be better understood when read in conjunction with the appended drawings. For the purpose of illustrating the invention, there are shown in the drawings embodiments which are presently preferred. It should be understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown.
[0030] In the drawings:
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[0045] To facilitate an understanding of the invention, identical reference numerals have been used, when appropriate, to designate the same or similar elements that are common to the figures. Further, unless stated otherwise, the features shown in the figures are not drawn to scale, but are shown for illustrative purposes only.
DETAILED DESCRIPTION
[0046] Certain terminology is used in the following description for convenience only and is not limiting. The article a is intended to include one or more items, and where only one item is intended the term one or similar language is used. Additionally, to assist in the description of the present invention, words such as top, bottom, side, upper, lower, front, rear, inner, outer, right and left may be used to describe the accompanying figures. The terminology includes the words above specifically mentioned, derivatives thereof, and words of similar import.
[0047]
[0048] The ABC spacers 140, 142, 144, 146 are formed from at least binary compounds or alloys which. may be grown by molecular beam epitaxy (MBE), by metal-organic chemical vapor deposition (MOCVD), by atomic layer deposition (ALD), by thermal evaporation, by sputtering, and/or by any known fabrication method. The ABC spacers 140, 142, 144, 146 may be grown in a lattice matched manner, or pseudo-morphically or metamorphically. The ABC spacers 140, 142, 144, 146 are formed in combination with another barrier material, or may be disposed either as a first barrier layer adjacent to the gate 114, or alternatively may be enclosed by other barrier material, or may be disposed adjacent to the channel 124. The ABC spacers 140, 142, 144, 146 are formed with a conduction-band offset in the range of, for example, +0.1 eV to +10 eV in electron energy relative to and above at least one other barrier material.
[0049] In an example embodiment, the HEMT 110 in
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[0052] As shown in
[0053] However, several advantages accrue to the speed, noise and other electrical characteristics of a HEMT due the modification of the third and fourth lowest bound states when ABC spacers are included, when compared to HEMTs in the prior art.
[0054] With ABC spacers 140, 142, 144, 146 shown in
[0055] In addition, the ABC spacers 140, 142, 144, 146 in
[0056] Moreover, the ABC spacers 140, 142, 144, 146 confer a reduction of tunneling current simply by virtue of offering taller barriers to the electrons, even without the additional advantage of preventing resonant tunneling described above. Thus, the ABC spacers 140, 142, 144, 146 reduce gate electron currents in all regimes of HEMT operation, whether in the ON-state with the gate voltage higher than a certain threshold voltage, or in the OFF-state where the gate voltage is sub-threshold.
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[0058] In implementing the present invention, it might appear at first glance that composing the entire barrier 120, 126 out of the WBG material would bring the same advantages as narrow WBG ABC spacers, such as the ABC spacers 140, 142, 144, 146 in
[0059] As described above, the WBG ABC spacers within and/or adjacent to the respective barriers enable high donor doping levels in the barriers, and hence high electron charge density in the channel without concomitantly high electron density in the barriers. The WBG ABC spacers within and/or adjacent to the respective barriers push bound states of the electrons in the barriers upwards in energy, reducing their charge density and hence reducing parasitic conduction. The WBG ABC spacers within the respective barriers allow the engineering of quantum bound states in the barriers to be off-resonance with the channel bound states, thus reducing leakage of channel electrons through resonant tunneling from the channel through barrier into the remainder of the device in the ON-state, thus confining electron wavefunctions to the channel, and reducing their overlap with scattering donor centers in the barriers, thus increasing HEMT channel electron velocity.
[0060] The implementation of WBG ABC spacers within the respective barriers creates an energetically taller barrier for electrons which reduces thermionic emission as well as tunneling, and hence reduces sub-threshold OFF-state gate leakage. Furthermore, WBG ABC spacers within and/or adjacent to the respective barriers reduce tunneling and thermionic emission of electron-holes across the front and/or back barriers.
[0061] Therefore, HEMTs with highly doped HEMT barriers may be fabricated with a reduced electron charge density in the barriers to reduce parasitic conduction through the nominally insulating barriers of the HEMT, even in highly doped barriers. Such reductions in electron charge density are caused by having the bound-state energy E.sub.i be as far above the Fermi energy level E.sub.F as possible. The present invention keeps electrons confined to the high-speed channel when the device is in the ON-state by reducing the resonant-tunneling mechanism which causes the ON-state leakage of channel electrons through the barriers and into the rest of the HEMT.
[0062] By keeping the electrons confined to the channel, the present invention has an increased speed of operation by reducing scattering by donor impurities in the barrier, thus increasing the electron mobility. This is achieved by having the bound states in the channel and barrier be off resonance.
[0063] The present invention also reduces the kink-effect caused by electron-holes accumulating near the source end of the channel due to tunneling or thermionic emissions across the barriers, and increasing the drain current, sometimes abruptly through an avalanche breakdown process.
[0064] The present invention improves linearity of the HEMT by enabling the utilization of heavily doped barriers, by improving channel electron mobility and reducing parasitic resistances and associated non-linearities, by reducing parasitic conduction across barrier(s), by reducing leakage through barrier(s).
[0065] The present invention also increases the effective Schottky barrier height, which enables enhancement-mode operation of the HEMT, as described in U.S. application Ser. No. 15/918,003, filed on Mar. 12, 2018, which is incorporated by reference in its entirety.
[0066] In an alternative embodiment, the present invention may apply ABC spacers in other types of FETs, not limited to HEMTs. For example, an ABC spacer may be disposed in a barrier of hole-channel (p-channel) FETs, in which the carriers of electrical current are holes rather than electrons. The ABC spacer would have similar band offset properties relative to the other materials in the barrier stack, except that the offsets would be in the valence band. The valence band-edge diagrams would be exact mirror images to the conduction band-edge diagrams presented above for n-channel FETs.
[0067] In another alternative embodiment, an ABC spacer may be disposed in a barrier of a FET that depletes a doped channel, i.e. a pre-existing bridge between the source and drain by applying a voltage opposite in polarity to the ionized impurities (dopants). Such FETs include Hetero-Junction FETs (HFETs), Junction Gate FETs (JFETs), and Metal-Semiconductor FETs (MESFETs).
[0068] In further alternative embodiments, ABC spacers may be disposed in a barrier of a FET in which the channel is a compositionally graded alloy such that the composition of one of the alloy constituents is varied in a piecewise linear or piecewise quadratic manner versus distance in the growth direction. The ABC spacer is composed of a wide-bandgap (WBG) material.
[0069] In further alternative embodiments, ABC spacers may be disposed in a barrier of an Enhancement-Mode FET or of a Depletion-Mode FET.
[0070] As described above, the present invention has been described in connection with a GaAs platform. That is, the HEMT 110 in
[0071] The inventive device may be distinguished from prior art using a variety of experimental and analytical techniques. Gate and substrate leakage can be measured using current-voltage measurements, or through terminal noise measurements, or other techniques known in the art. The electron concentration and mobility in the channel and barrier may be deduced from Hall Effect measurements, or other methods as known in the art. Gate noise measurement techniques for HEMTs are well known in the art. Bound state energies and wave-functions in various regions of the device may be determined by simulation using Schrodinger-Poisson solvers and other techniques well known in the art. Linearity may be quantified by the OIP3 figure-of-merit (third order output intercept point) among other metrics, and may be measured using two-tone techniques and others well known in the art.
[0072] The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention, therefore, will be indicated by claims rather than by the foregoing description. All changes, which come within the meaning and range of equivalency of the claims, are to be embraced within their scope.