Digital radio-frequency transmitter

Abstract

Disclosed is a digital radio-frequency transmitter, which includes a digital logic mixer, a digital power amplifier and an antenna, wherein an output terminal of the digital logic mixer is connected with an input terminal of the digital power amplifier; an output terminal of the digital power amplifier is connected to the antenna; the digital logic mixer is configured to perform logic mixing on baseband data and a radio-frequency local oscillator clock signal which are input into the digital radio-frequency transmitter to generate radio-frequency data; the digital power amplifier is configured to convert the radio-frequency data into an analog power signal; and the antenna is configured to transmit the analog power signal out. According to the digital radio-frequency transmitter of the present application, the circuit layout area and the circuit operation consumption can be effectively reduced.

Claims

1. A digital radio-frequency transmitter, comprising a digital logic mixer, a digital power amplifier and an antenna, wherein an output terminal of the digital logic mixer is connected with an input terminal of the digital power amplifier; an output terminal of the digital power amplifier is connected to the antenna; the digital logic mixer is configured to perform logic mixing on baseband data and a radio-frequency local oscillator clock signal which are input into the digital radio-frequency transmitter to generate radio-frequency data; the digital power amplifier is configured to convert the radio-frequency data into an analog power signal; and the antenna is configured to transmit the analog power signal out; wherein the digital logic mixer comprises a first logic AND gate and a first multiplexer, wherein a first input terminal of the first logic AND gate is the baseband data, a second input terminal of the first logic AND gate is connected to an output terminal of the first multiplexer, and an output terminal of the first logic AND gate is configured to output the radio-frequency data; a first input terminal of the first multiplexer is connected to the radio-frequency local oscillator clock signal, and a second input terminal of the first multiplexer is connected to an inversion signal of the radio-frequency local oscillator clock signal; and the first multiplexer is configured to select the radio-frequency local oscillator clock signal or the inversion signal of the radio-frequency local oscillator clock signal according to a sign bit of the baseband data.

2. The digital radio-frequency transmitter according to claim 1, wherein the baseband data input to the digital radio-frequency transmitter is data that is digitally filtered through a digital filtering algorithm.

3. The digital radio-frequency transmitter according to claim 1, wherein the digital logic mixer further comprises a second logic AND gate and a second multiplexer, wherein a first input terminal of the second logic AND gate is the baseband data, a second input terminal of the second logic AND gate is connected to an output terminal of the second multiplexer, and an output terminal of the second logic AND gate is configured to output the radio-frequency data; a first input terminal of the second multiplexer is connected to an inversion signal of the radio-frequency local oscillator clock signal, and a second input terminal of the second multiplexer is connected to the radio-frequency local oscillator clock signal; and the second multiplexer is configured to select the inversion signal of the radio-frequency local oscillator clock signal or the radio-frequency local oscillator clock signal according to the sign bit of the baseband data.

4. The digital radio-frequency transmitter according to claim 1, wherein the digital power amplifier comprises a transformer and 2.sup.n−1 identical amplifier units, n being a number of bits of the radio-frequency data; and an i.sup.th radio-frequency data controls 2.sup.i amplifier units, 0≤i≤n−1.

5. The digital radio-frequency transmitter according to claim 4, wherein each amplifier unit comprises a switching tube, a current regulation module and an isolation module; an input terminal of the switching tube is connected to the radio-frequency data; the current regulation module is connected to the switching tube and configured to adjust a current of each of the amplifier units; and the isolation module is connected between an input terminal of the transformer and an output terminal of the switching tube and configured to isolate the switching tube from the transformer.

6. The digital radio-frequency transmitter according to claim 4, wherein each amplifier unit comprises a first MOSFET, a second MOSFET, a third MOSFET and a fourth MOSFET; a gate of the first MOSFET and a gate of the second MOSFET are connected to the radio-frequency data respectively; a gate of the third MOSFET and a gate of the fourth MOSFET are connected to a voltage V.sub.B respectively; a source and a drain of the first MOSFET are connected to a ground and the third MOSFET respectively; a source and a drain of the second MOSFET are connected to the ground and the fourth MOSFET respectively; a source and a drain of the third MOSFET are connected to the first MOSFET and a positive output V.sub.OP respectively; a source and a drain of the fourth MOSFET are connected to the second MOSFET and a negative output V.sub.ON respectively; the positive output V.sub.OP and the negative output V.sub.ON are connected to a positive terminal and a negative terminal of a primary side of the transformer respectively; and the gates of the respective MOSFETs in the 2.sup.i amplifier units controlled by the i.sup.th radio-frequency data are respectively connected each other respectively.

7. The digital radio-frequency transmitter according to claim 6, wherein the voltage V.sub.B is a fixed power voltage terminal or a size-adjustable power voltage terminal; and in the case that the voltage VB is the fixed power voltage terminal, a power voltage of the transformer is the size-adjustable power voltage terminal.

8. The digital radio-frequency transmitter according to claim 7, wherein thin-oxide low-voltage transistors are used as the first MOSFET and the second MOSFET respectively; and thick-oxide medium-voltage transistors are used as the third MOSFET and the fourth MOSFET.

9. The digital radio-frequency transmitter according to claim 6, wherein the digital power amplifier further comprises a current mirror; each amplifier unit further comprises a fifth MOSFET; the current mirror is composed of a sixth MOSFET and the fifth MOSFETs included in the respective amplifier units; a source and a drain of the fifth MOSFET are connected among the first MOSFET, the second MOSFET and the ground, and a gate of the fifth MOSFET is connected to a gate of the sixth MOSFET; a source and a drain of the sixth MOSFET are connected to the ground, the gates of the fifth MOSFETs and the sixth MOSFET and a bias current; and the gates of the respective fifth MOSFETs in the 2.sup.i amplifier units controlled by the i.sup.th radio-frequency data are respectively connected each other respectively.

10. The digital radio-frequency transmitter according to claim 9, wherein thin-oxide low-voltage transistors are used as the first MOSFET and the second MOSFET respectively; and thick-oxide medium-voltage transistors are used as the third MOSFET and the fourth MOSFET.

11. The digital radio-frequency transmitter according to claim 6, wherein thin-oxide low-voltage transistors are used as the first MOSFET and the second MOSFET respectively; and thick-oxide medium-voltage transistors are used as the third MOSFET and the fourth MOSFET.

12. A digital radio-frequency transmitter, comprising a digital logic mixer, a digital power amplifier and an antenna, wherein an output terminal of the digital logic mixer is connected with an input terminal of the digital power amplifier; an output terminal of the digital power amplifier is connected to the antenna; the digital logic mixer is configured to perform logic mixing on baseband data and a radio-frequency local oscillator clock signal which are input into the digital radio-frequency transmitter to generate radio-frequency data; the digital power amplifier is configured to convert the radio-frequency data into an analog power signal; and the antenna is configured to transmit the analog power signal out; wherein the digital power amplifier comprises a transformer and 2.sup.n−1 identical amplifier units, n being a number of bits of the radio-frequency data; and an i.sup.th radio-frequency data controls 2.sup.i amplifier units, 0≤i≤n−1.

13. The digital radio-frequency transmitter according to claim 12, wherein the baseband data input to the digital radio-frequency transmitter is data that is digitally filtered through a digital filtering algorithm.

14. The digital radio-frequency transmitter according to claim 12, wherein the digital logic mixer comprises a first logic AND gate and a first multiplexer, wherein a first input terminal of the first logic AND gate is the baseband data, a second input terminal of the first logic AND gate is connected to an output terminal of the first multiplexer, and an output terminal of the first logic AND gate is configured to output the radio-frequency data; a first input terminal of the first multiplexer is connected to the radio-frequency local oscillator clock signal, and a second input terminal of the first multiplexer is connected to an inversion signal of the radio-frequency local oscillator clock signal; and the first multiplexer is configured to select the radio-frequency local oscillator clock signal or the inversion signal of the radio-frequency local oscillator clock signal according to a sign bit of the baseband data; wherein the digital logic mixer further comprises a second logic AND gate and a second multiplexer, wherein a first input terminal of the second logic AND gate is the baseband data, a second input terminal of the second logic AND gate is connected to an output terminal of the second multiplexer, and an output terminal of the second logic AND gate is configured to output the radio-frequency data; a first input terminal of the second multiplexer is connected to an inversion signal of the radio-frequency local oscillator clock signal, and a second input terminal of the second multiplexer is connected to the radio-frequency local oscillator clock signal; and the second multiplexer is configured to select the inversion signal of the radio-frequency local oscillator clock signal or the radio-frequency local oscillator clock signal according to the sign bit of the baseband data.

15. The digital radio-frequency transmitter according to claim 12, wherein each amplifier unit comprises a switching tube, a current regulation module and an isolation module; an input terminal of the switching tube is connected to the radio-frequency data; the current regulation module is connected to the switching tube and configured to adjust a current of each of the amplifier units; and the isolation module is connected between an input terminal of the transformer and an output terminal of the switching tube and configured to isolate the switching tube from the transformer.

16. The digital radio-frequency transmitter according to claim 12, wherein each amplifier unit comprises a first MOSFET, a second MOSFET, a third MOSFET and a fourth MOSFET; a gate of the first MOSFET and a gate of the second MOSFET are connected to the radio-frequency data respectively; a gate of the third MOSFET and a gate of the fourth MOSFET are connected to a voltage V.sub.B respectively; a source and a drain of the first MOSFET are connected to a ground and the third MOSFET respectively; a source and a drain of the second MOSFET are connected to the ground and the fourth MOSFET respectively; a source and a drain of the third MOSFET are connected to the first MOSFET and a positive output V.sub.OP respectively; a source and a drain of the fourth MOSFET are connected to the second MOSFET and a negative output V.sub.ON respectively; the positive output V.sub.OP and the negative output V.sub.ON are connected to a positive terminal and a negative terminal of a primary side of the transformer respectively; and the gates of the respective MOSFETs in the 2.sup.i amplifier units controlled by the i.sup.th radio-frequency data are respectively connected each other respectively.

17. The digital radio-frequency transmitter according to claim 16, wherein the voltage V.sub.B is a fixed power voltage terminal or a size-adjustable power voltage terminal; and in the case that the voltage VB is the fixed power voltage terminal, a power voltage of the transformer is the size-adjustable power voltage terminal.

18. The digital radio-frequency transmitter according to claim 17, wherein thin-oxide low-voltage transistors are used as the first MOSFET and the second MOSFET respectively; and thick-oxide medium-voltage transistors are used as the third MOSFET and the fourth MOSFET.

19. The digital radio-frequency transmitter according to claim 16, wherein the digital power amplifier further comprises a current mirror; each amplifier unit further comprises a fifth MOSFET; the current mirror is composed of a sixth MOSFET and the fifth MOSFETs included in the respective amplifier units; a source and a drain of the fifth MOSFET are connected among the first MOSFET, the second MOSFET and the ground, and a gate of the fifth MOSFET is connected to a gate of the sixth MOSFET; a source and a drain of the sixth MOSFET are connected to the ground, the gates of the fifth MOSFETs and the sixth MOSFET and a bias current; and the gates of the respective fifth MOSFETs in the 2.sup.i amplifier units controlled by the i.sup.th radio-frequency data are respectively connected each other respectively.

20. The digital radio-frequency transmitter according to claim 16, wherein thin-oxide low-voltage transistors are used as the first MOSFET and the second MOSFET respectively; and thick-oxide medium-voltage transistors are used as the third MOSFET and the fourth MOSFET.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic structural diagram of a traditional radio-frequency transmitter;

(2) FIG. 2 is a schematic structural diagram of a digital radio-frequency transmitter according to a preferred embodiment of the present application;

(3) FIG. 3 is a schematic structural diagram of a circuit of a digital logic mixer according to a preferred embodiment of the present application;

(4) FIG. 4 is a schematic diagram of an input/output signal of the digital logic mixer in FIG. 3;

(5) FIG. 5 is a schematic structural diagram of a digital power amplifier in an embodiment of the present application; and

(6) FIG. 6 is a schematic structural diagram of the digital power amplifier according to another embodiment of the present application.

DETAILED DESCRIPTION OF THE INVENTION

(7) Embodiments of the present application will be described in detail below. It should be emphasized that the following description is exemplary only, but is not intended to limit the scope of the present application and its application.

(8) It should be noted that when an element is referred to as being “fixed to” or “arranged on” another element, it may be directly located on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly to the other element. In addition, such connection may be used for either a fixing function or a circuit/signal communication function.

(9) It should be understood that the orientation or position relations indicated via terms of “length”, “width”, “upper”, “lower”, “front”, “rear”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inner”, “outer”, and the like are based on orientation or the position relations shown in the drawings only to describe the embodiments of the present application conveniently and simplify the description, but not indicate or imply that referred devices or elements must have particular orientations or be constructed and operated with the particular orientation, so that they cannot be construed as limiting of the present application.

(10) Moreover, the terms “first” and “second” are only for the purpose of description and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined by the terms “first” and “second” may include one or more of the features either explicitly or implicitly. In the description of the embodiments of the present disclosure, unless otherwise stated, the term “a plurality of” means two or more.

(11) As shown in FIG. 2, a preferred embodiment of the present application discloses a digital radio-frequency transmitter, which includes a digital logic mixer 10, a digital power amplifier 20 and an antenna 30, wherein an output terminal of the digital logic mixer 10 is connected to an input terminal of the digital power amplifier 20; an output terminal of the digital power amplifier 20 is connected to the antenna 30; the digital logic mixer 10 is configured to perform logic mixing on baseband data and a radio-frequency local oscillator clock signal which are input into the digital radio-frequency transmitter to generate radio-frequency data; the digital power amplifier 20 is configured to convert the radio-frequency data into an analog power signal; and the antenna 30 is configured to transmit the analog power signal out.

(12) As shown in FIG. 3, the digital logic mixer 10 includes n first logic AND gates 21 and n first multiplexers 22, wherein the n first logic AND gates 21 may mix baseband data a.sub.n-1 . . . a.sub.0 to radio frequency data b.sub.n-1 . . . b.sub.0 respectively; a first input terminal of the first logic AND gate 21 is a certain bit of baseband data a.sub.i, a second input terminal of the first logic AND gate 21 is connected to an output terminal of the corresponding first multiplexer 22, and an output terminal of the first logic AND gate 21 outputs a corresponding bit of radio-frequency data b.sub.i; a first input terminal (0 terminal) of the first multiplexer 22 is connected to a radio-frequency local oscillator clock signal clk, a second input terminal (1 terminal) of the first multiplexer 22 is connected to an inversion signal of the radio-frequency local oscillator clock signal; and the first multiplexer 22 is configured to select the radio-frequency local oscillator clock signal clk or the inversion signal of the radio frequency local oscillator clock signal according to a sign bit s of the baseband data a.sub.i. The frequency of b.sub.i is a radio-frequency local oscillator clock frequency; and a phase of b.sub.i reflects a sign of the input baseband data a.sub.i.

(13) For a radio-frequency transmitter having a differential output, it is necessary to output radio-frequency data b.sub.i and . Further, the digital logic mixer 10 further includes n second logic AND gates 23 and n second multiplexers 24, wherein the n second logic AND gates 23 may mix baseband data a.sub.n-1 . . . a.sub.0 to radio-frequency data respectively; a first input terminal of the second logic AND gate 23 is a certain bit of baseband data a.sub.i, a second input terminal of the second logic AND gate 23 is connected to an output terminal of the corresponding second multiplexer 24, and an output terminal of the second logic AND gate 23 outputs a corresponding bit of radio-frequency data a first input terminal (0 terminal) of the second multiplexer 24 is connected to an inversion signal of the radio-frequency local oscillator clock signal, a second input terminal (1 terminal) of the second multiplexer 24 is connected to the radio-frequency local oscillator clock signal clk; and the second multiplexer 24 is configured to select the inversion signal of the radio-frequency local oscillator clock signal or the radio frequency local oscillator clock signal clk according to a sign bit s of the baseband data a.sub.i. The frequency of is a radio-frequency local oscillator clock frequency; and a phase of reflects a sign of the input baseband data a.sub.i. As shown in FIG. 4, is an inverted radio-frequency output signal, and a phase of is opposite to a positive radio-frequency output signal b.sub.i.

(14) The digital power amplifier 20 integrates the functions of a digital-to-analog converter and a power amplifier, and is configured to convert the input radio-frequency data b.sub.n-1 . . . b.sub.0 into an analog power signal, which is then transmitted output through the antenna 30. For n bits of input radio-frequency data, the digital power amplifier 20 contains 2.sup.n−1 identical amplifier units, and the i.sup.th radio-frequency data b.sub.i controls 2.sup.i amplifier units, corresponding to a weight of the i.sup.th radio-frequency data b.sub.i, thereby implementing the function of analog-to-digital conversion, where 0≤i≤n−1.

(15) As shown in FIG. 5, a circuit structure of a current-mode differential digital power amplifier according to an embodiment of the present application is shown. The digital power amplifier includes a transformer, a current mirror, and 2.sup.n−1 identical amplifier units, wherein each amplifier unit includes a first MOSFET M.sub.i1, a second MOSFET M.sub.i2, a third MOSFET M.sub.i3, a fourth MOSFET M.sub.i4 and a fifth MOSFET M.sub.i0; and the current mirror is composed of a sixth MOSFET M.sub.src and the fifth MOSFETs M.sub.i0 (0≤i≤n−1) of the respective amplifier units to mirror-copy a bias current i.sub.bias to the respective amplifier units. The gates of the respective MOSFETs in the 2.sup.i amplifier units controlled by the i.sup.th radio-frequency data are respectively connected each other respectively (i.e., the gates of the first MOSFETs M.sub.i1 in the 2.sup.i amplifier units controlled by the i.sup.th radio frequency data are connected each other; the gates of the second MOSFETs M.sub.i2 are connected each other; the gates of the third MOSFETs M.sub.i3 are connected each other; the gates of the fourth MOSFETs M.sub.i4 are connected each other; and the gates of the fifth MOSFETs M.sub.i0 are connected each other); a gate of the fifth MOSFET is connected to a gate of the sixth MOSFET, a source and a drain of the sixth MOSFET are connected to the ground, the gates of the fifth MOSFET and the sixth MOSFET and a bias current respectively, one terminal of each of a source and a drain of the fifth MOSFET M.sub.i0 is connected to the ground, and the other terminal of each of the source and the drain of the fifth MOSFET M.sub.i0 is connected to the first MOSFET M.sub.i1 and the second MOSFET M.sub.i2; the gate of the first MOSFET M.sub.i1 is connected to the radio-frequency data b.sub.i, and the source and the drain of the first MOSFET M.sub.i1 are connected to the fifth MOSFET M.sub.i0 and the third MOSFET M.sub.i3 respectively; the gate of the second MOSFET M.sub.i2 is connected to the radio-frequency data and the source and the drain of the second MOSFET M.sub.i2 are connected to fifth MOSFET M.sub.i0 and the fourth MOSFET M.sub.i4 respectively; the gates of the third MOSFET M.sub.i3 and the fourth MOSFET M.sub.i4 are connected to a voltage V.sub.B (in this embodiment, the voltage V.sub.B is a fixed value by default, and the current is adjusted by the current mirror), the source and the drain of the third MOSFET M.sub.i3 are respectively connected to the first MOSFET M.sub.i1 and a positive output V.sub.OP, and the source and drain of the fourth MOSFET M.sub.i4 are respectively connected to the second MOSFET M.sub.i2 and a negative output V.sub.ON; and the positive output V.sub.OP and the negative output V.sub.ON are respectively connected to the positive and negative terminals of the primary side of the transformer, and a power voltage of the primary side of the transformer is V.sub.CC.

(16) The circuit of the digital power amplifier can control the current of each amplifier unit by adjusting the bias current i.sub.bias, thereby changing the power of an output signal. The first MOSFET M.sub.i1 and the second MOSFET M.sub.i2 in the middle are used as switching tubes; and the radio-frequency data b.sub.i and are connected to the gates of the two MOSFETs respectively, so as to control the bias current of the fifth MOSFET M.sub.i0 in this unit to flow to the positive output V.sub.OP or the negative output V.sub.ON of the differential power amplifier. The output terminals of all the amplifier units are connected together to generate analog current signals represented by the radio-frequency data b.sub.n-1 . . . b.sub.0, thereby driving the primary side of the transformer. The induced voltage current generated at a secondary side of the transformer drives the antenna to emit radio-frequency signals represented by b.sub.n-1 . . . b.sub.0.

(17) Since the frequency of the radio-frequency data b.sub.i and is the radio-frequency local oscillator clock frequency and is relatively high (for example, the frequency for a UWB application may be up to 9.48 GHz), thereby limiting the size of the capacitive load that can be driven by the radio-frequency input data. In this embodiment, the first MOSFET M.sub.i1 and the second MOSFET M.sub.i2 are implemented by thin-oxide low-voltage transistors. The low-voltage MOSFET uses a minimum channel length in this process, and meanwhile a channel width for realizing a certain driving capability is correspondingly reduced, thereby effectively reducing the dimension of the MOSFET and the magnitude of the parasitic capacitance. Therefore, the low-voltage transistors may be used to reduce the capacitive load driven by the radio-frequency data b.sub.i and Specifically, the minimum dimension that can be used by the low-voltage MOSFET is related to a process. For example, a minimum channel length of a 40 nm process is about 40 nm, and a minimum channel length of a 22 nm process is about 25 nm. The channel length and the area of the MOSFET are reduced, and the corresponding parasitic capacitance is correspondingly reduced. For another example, in the 22 nm process, a minimum channel length of a 0.8V low-voltage transistor is about 25 nm, a minimum channel length of a 3.3V medium-voltage transistor is 550 nm, and the area and the parasitic capacitance are increased by more than dozens of times.

(18) A voltage amplitude of an output signal of the power amplifier determines the output power. The application of high output power requires that the power voltage V.sub.CC of the primary side of the transformer may exceed a withstand voltage of the low-voltage transistor. Therefore, in this embodiment, thick-oxide 3.3V medium-voltage transistors are used as the third MOSFET M.sub.i3 and the fourth MOSFET M.sub.i4 to isolate a lower-layer low-voltage transistor from an upper-layer transformer. The thick-oxide 3.3V medium-voltage transistor limits a voltage between a source and a drain of the lower-layer low-voltage transistor not to exceed its withstand voltage value, thereby protecting the working safety of the lower-layer low-voltage transistor.

(19) In this embodiment, the thin-oxide low-voltage transistors are used as the first MOSFET M.sub.i1 and the second MOSFET M.sub.i2, and the thick-oxide medium-voltage transistors are used as the third MOSFET M.sub.i3 and the fourth MOSFET M.sub.i4, wherein the voltage ranges of the low-voltage transistor and the medium-voltage transistor vary according to different processes. Those skilled in the art can understand that the low-voltage transistor is a commonly used core device (a device used inside a chip), and the medium-voltage transistor is a commonly used I/O device (a device used when the chip interacts with an external interface). For example, in the commonly used tsmc (Taiwan Semiconductor Manufacturing Company) 40 nm process, MOSFETs of 0.9V, 3.3V and 5V are used, that is, typical voltage values of the MOSFETs in operation are 0.9V, 3.3V, 5V, respectively. In general cases, the MOSFET of 0.9V is referred to as a low-voltage transistor, and the MOSFET of 3.3V is referred to as a medium-voltage transistor. Silica between a gate and a channel of the MOSFET of 0.9V is relatively thin, and silica between a gate and a channel of the MOSFET of 3.3V is relatively thick, which are distinguished as the thin-oxide low-voltage transistor and the thick-oxide medium-voltage transistor. The specific thickness depends on process parameters.

(20) As shown in FIG. 6, a circuit structure of a current-mode differential digital power amplifier according to another embodiment of the present application is shown. In this embodiment, the fifth MOSFET M.sub.i0, the third MOSFET M.sub.i3 and the fourth MOSFET M.sub.i4 in the current mirror are merged. The current flowing through this amplifier unit is controlled by the gate voltage V.sub.B of the third MOSFET M.sub.i3 and the fourth MOSFET M.sub.i4 to directly adjust the bias current through the gate voltage V.sub.B, and the output power of the digital radio-frequency transmitter can be changed by adjusting the magnitude of the gate voltage V.sub.B. That is, the digital power amplifier in this embodiment does not include the current mirror, and one terminal of each of the sources and the drains of the first MOSFET M.sub.i1 and the second MOSFET M.sub.i2 is grounded directly. On this basis, in some other embodiments, the gate voltage V.sub.B may also be connected to a certain fixed power voltage, and a branch bias current is generated by an on-resistance of the MOSFET connected to each branch. The magnitude of the branch bias current can be changed by adjusting the power voltage V.sub.CC of the transformer, thereby controlling the output power of the transmitter.

(21) In this embodiment of the present application, the digital radio-frequency transmitter integrates the digital-to-analog converter and the power amplifier into a digital power amplifier, thereby simplifying the structure of the radio-frequency transmitter. The low-pass filter may be implemented in a digital domain by a digital filtering algorithm. The digital baseband input data of the radio-frequency transmitter may be digitally filtered data, which can save the cost of an analog filter. The radio-frequency mixing circuit may also implemented digitally, and the transmission baseband digital input data and the radio-frequency clock are mixed through a digital logic gate. The digital logic gate can effectively prevent clock leakage to the power amplifier output. In addition, the digital implementation of the modules can further reduce the circuit layout area and circuit power consumption.

(22) The Background section of the present application may contain background information about the problem or environment of the present application, rather than the prior art described by others. Therefore, the content included in the Background section is not an admission of the applicant to the prior art.

(23) The above content is a further detailed description of the present application in conjunction with specific/preferred embodiments, and it cannot be considered that the specific embodiments of the present disclosure are limited to these descriptions. For those of ordinary skill in the technical field to which the present application belongs, several substitutions or deformations can also be made to these described embodiments, which should be regarded as falling within the protection scope of the present application. In the description of the present specification, the description of referring terms such as “an embodiment”, “some embodiments”, “a preferred embodiment”, “an example”, “a specific example” and “some examples” integrate particular features, structures, materials or characteristics described in combination of the embodiments or examples and included in at least one embodiment or example of the present application. In the description, schematic description of the above terms does not necessarily refer to the same embodiment or example. Furthermore, the described particular features, structures, materials or characteristics can be integrated with any one or more embodiments or examples in a proper manner. In addition, in the absence of contradiction, a person skilled in the art can integrate and combine different embodiments or examples described in this specification and the features of different embodiments or examples. Although the embodiments of the present application and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the scope as defined by the appended claims.