ESD SUPPRESSOR AND MANUFACTURING METHOD THEREOF

Abstract

ESD suppressor and manufacturing method thereof. The ESD suppressor include at least two printed circuit boards, one insulating frame, two terminal electrodes and two or more interior electrodes. The insulating frame is positioned between the two printed circuit boards, so as to form a main structure with a cavity. For each printed circuit board, at least one interior electrode is positioned on the surface facing the cavity and separated from other interior electrode(s). Two terminal electrodes are positioned on two different surfaces of the main structure and electrically connected to different interior electrodes respectively. Optionally, the insulating frame is a hallowed out printed circuit board or a frame formed by printing insulating material. In the manufacturing method, the thickness of the insulating frame is adjusted to adjust the relative distance between different printed circuit boards, so as to further adjust the breakdown voltage of the ESD suppressor

Claims

1. An ESD suppressor, comprising: a first printed circuit board; a second printed circuit board; an insulating frame, positioned between first surface of the first printed circuit board and a second surface of the second printed circuit board so as to together form a main structure with a cavity inside; two or more interior electrodes, positioned on the first printed circuit board and the second printed circuit board respectively, such that both the first surface and the second surface have one or more interior electrodes exposed to the cavity; and two terminal electrodes, positioned at different portions of the outer surface of the main structure respectively, and electrically connected to different one or more interior electrodes respectively.

2. The ESD suppressor according to claim 1, further comprising at least one of the following: the dielectric coefficient of the first printed circuit board is not large than 6.0; the dielectric coefficient of the second printed circuit board is not large than 6.0; the dielectric coefficient of the first printed circuit board is not large than 4.4; the dielectric coefficient of the second printed circuit board is not large than 4.4; the dielectric coefficient of the first printed circuit board is between 1.5 and 3.5; and the dielectric coefficient of the second printed circuit board is between 1.5 and 3.5.

3. The ESD suppressor according to claim 1, further comprising at least one of the following: the substrate of the first printed circuit board is chosen from the group consisting of the following: glass fiber board, bakelite, plastic board, ceramic substrate, and any combination thereof; and the substrate of the second printed circuit board is chosen from the group consisting of the following: glass fiber board, bakelite, plastic board, ceramic substrate, and any combination thereof.

4. The ESD suppressor according to claim 1, further comprising at least one of the following: the substrate of the first printed circuit board is chosen from the group consisting of the following: bakelite, phenolic tissue paper, the combination of epoxy resin and tissue, the combination of epoxy resin and glass cloth, the combination of polyester and matter glass, the combination of glass cloth and epoxy resin, the combination of tissue paper and flame-retardant epoxy resin, the combination of tissue paper and non-flame-retardant epoxy resin, Teflon, metal, Alumina, aluminum nitride, silicon carbide, and any combination thereof; and the substrate of the second printed circuit board is chosen from the group consisting of the following: bakelite, phenolic tissue paper, the combination of epoxy resin and tissue, the combination of epoxy resin and glass cloth, the combination of polyester and matter glass, the combination of glass cloth and epoxy resin, the combination of tissue paper and flame-retardant epoxy resin, the combination of tissue paper and non-flame-retardant epoxy resin, Teflon, metal, Alumina, aluminum nitride, silicon carbide, and any combination thereof

5. The ESD suppressor according to claim 1, further comprising at least one of the following: the one or more interior electrodes positioned on the first surface are at least partially overlapped with the one or more interior electrodes positioned on the second surface along a direction vertical to the first surface; the one or more interior electrodes positioned on the first surface are at least partially overlapped with the one or more interior electrodes positioned on the second surface along a direction vertical to the second surface; one and only one interior electrode is positioned on the first surface and one and only one interior electrode is positioned on the second surface; one and only one interior electrode is positioned on the first surface and two separated interior electrodes are positioned on the second surface, wherein the interior electrode on the first surface is positioned between the two separated interior electrodes on the second surface along a direction vertical to the first surface; and one and only one interior electrode is positioned on the first surface and two separated interior electrodes are positioned on the second surface, wherein the interior electrode on the first surface is positioned between the two separated interior electrodes on the second surface along a direction vertical to the second surface.

6. The ESD suppressor according to claim 1, wherein the insulating frame is a printed circuit board with a hollowed central portion.

7. The ESD suppressor according to claim 6, wherein the thickness of the insulating frame is depended on the thickness of the hollowed printed circuit board.

8. The ESD suppressor according to claim 1, wherein the insulating frame is a frame formed by using a printing process to treat the insulating material.

9. The ESD suppressor according to claim 8, further comprising at least one of the following: the insulating material is chosen from the group consisting of the following: phenolic resin, epoxy resin, silicone resin, polyurethane, polyurethane, polyethylene, polypropylene, acrylic resin, polystyrene, and any combination thereof; and the thickness of the insulating frame is dependent on the thickness of the insulating material filled into the one or more holes of the impression used during the printing process.

10. The ESD suppressor as claimed in claim 1, wherein the material of any interior electrode is chosen from the group consisting of the following: copper, silver, gold and any combination thereof.

11. A method of manufacturing the ESD suppressor, comprising: providing a first printed circuit board, wherein one or more interior electrodes are positioned on its first surface; providing a second printed circuit board, wherein one or more interior electrodes are positioned on its second surface; forming an insulating frame on the first surface of the first printed circuit board and placing the second surface of the second printed circuit board on the opposite side of the insulating frame, such that the first printed circuit board, the insulating frame and the second printed circuit board together form a main structure with a cavity inside, wherein one or more interior electrodes on the first surface and one or more interior electrodes on the second surface are exposed to the cavity; and forming two terminal electrodes at different positions of the outer surface of the main structure, wherein different interior electrodes are connected to different one or more interior electrodes respectively.

12. The method according to claim 11, further comprising at least one of the following: using the first printed circuit board with the dielectric coefficient not large than 6.0; using the second printed circuit board with the dielectric coefficient not large than6.0; using the first printed circuit board with the dielectric coefficient not large than 4.4; using the second printed circuit board with the dielectric coefficient not large than 4.4; using the first printed circuit board with the dielectric coefficient between 1.5 and 3.5; and using the second printed circuit board with the dielectric coefficient between 1.5 and 3.5.

13. The method according to claim 11, further comprising at least one of the following: using the first printed circuit board whose substrate is chosen from the group consisting of the following: glass fiber board, bakelite, plastic board, ceramic substrate, and any combination thereof; and using the second printed circuit board whose substrate is chosen from the group consisting of the following: glass fiber board, bakelite, plastic board, ceramic substrate, and any combination thereof.

14. The method according to claim 11, further comprising at least one of the following: using the first printed circuit board whose substrate is chosen from the group consisting of the following: bakelite, phenolic tissue paper, the combination of epoxy resin and tissue, the combination of epoxy resin and glass cloth, the combination of polyester and matter glass, the combination of glass cloth and epoxy resin, the combination of tissue paper and flame-retardant epoxy resin, the combination of tissue paper and non-flame-retardant epoxy resin, Teflon, metal, Alumina, aluminum nitride, silicon carbide, and any combination thereof; and using the second printed circuit board whose substrate is chosen from the group consisting of the following: bakelite, phenolic tissue paper, the combination of epoxy resin and tissue, the combination of epoxy resin and glass cloth, the combination of polyester and matter glass, the combination of glass cloth and epoxy resin, the combination of tissue paper and flame-retardant epoxy resin, the combination of tissue paper and non-flame-retardant epoxy resin, Teflon, metal, Alumina, aluminum nitride, silicon carbide, and any combination thereof

15. The method according to claim 11, further comprising at least one of the following: positioning one or more interior electrodes such that the one or more interior electrodes positioned on the first surface are at least partially overlapped with the one or more interior electrodes along a direction vertical to the first surface; positioning one or more interior electrodes such that the one or more interior electrodes positioned on the first surface are at least partially overlapped with the one or more interior electrodes along a direction vertical to the second surface; positioning one and only one interior electrode on the first surface and positioning one and only one interior electrode on the second surface; positioning one and only one interior electrode on the first surface and positioning two separated interior electrodes on the second surface, such that the interior electrode on the first surface is positioned between the two separated interior electrodes on the second surface along a direction vertical to the first surface; and positioning one and only one interior electrode on the first surface and positioning two separated interior electrodes on the second surface, such that the interior electrode on the first surface is positioned between the two separated interior electrodes on the second surface along a direction vertical to the second surface.

16. The method according to claim 11, further comprising hollowing the central portion of a printed circuit board to form the insulating frame.

17. The method according to claim 16, further comprising adjusting the thickness of the hollowed printed circuit board to adjust the thickness of the insulating frame.

18. The method according to claim 11, further comprising using a printing process to treat the insulating material for forming the insulating frame.

19. The method according to claim 18, further comprising at least one of the following: using the insulating material chosen from the group consisting of the following: phenolic resin, epoxy resin, silicone resin, polyurethane, polyurethane, polyethylene, polypropylene, acrylic resin, polystyrene, and any combination thereof; and adjusting the thickness of the insulating material filled into the one or more holes of the impression used during the printing process so as to adjust the thickness of the insulating frame.

20. The method according to claim 11, further comprising one of the following: transforming the required circuit into a metal film formed on the first surface of the first printed circuit board, and then removing the un-desired portions of the metal film so as to form one or more interior electrodes on the first surface; and transforming the required circuit into a metal film formed on the second surface of the second printed circuit board, and then removing the un-desired portions of the metal film so as to form one or more interior electrodes on the second surface.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Other advantages, objectives and features of the present invention will become apparent from the following description referring to the attached drawings.

[0018] FIG. 1A schematically illustrates the application of the ESD suppressor, and FIG. 1B schematically illustrates the basic configuration of the ESD suppressor.

[0019] FIG. 2A to FIG. 2D schematically illustrates the cross-section of some proposed ESD suppressors respectively.

[0020] FIG. 3 schematically presents some test results of the proposed ESD suppressor.

[0021] FIG. 4 is the flowchart of the proposed ESD suppressor manufacturing method.

[0022] FIG. 5 to FIG. 8 schematically illustrates some variations of the proposed ESD suppressors respectively.

[0023] FIG. 9 to FIG. 10 schematically illustrates some variation of the proposed ESD suppressors.

DETAILED DESCRIPTION OF THE INVENTION

[0024] The invention proposes an ESD suppressor. As some embodiments shown in FIG. 2A to FIG. 2D, the ESD suppressor essentially includes two printed circuit boards 201, one insulating frame 202, some interior electrodes 203 and two terminal electrodes 204. Insulating frame 202 is a frame with the electrical insulation function, and two sides of the insulating frame 202 are connected to different printed circuit boards 201 respectively (or viewed as that the insulating frame 202 is sandwiched between the two printed circuit boards), such that a main structure with a cavity inside is formed by the three elements together. For each printed circuit board 201, one or more interior electrodes 203 positioned on a surface facing the insulating frame 203 are exposed to the cavity. Two terminal electrodes 204 are positioned on the outer of two opposite sides of the main structure and are electrically connected to different interior electrodes 203 respectively.

[0025] The main features of the proposed ESD suppressor include the usage of the printed circuit boards, the usage of the insulating frame and the configuration of the interior electrodes. That is to say, in different embodiments, both the material and the function of each printed circuit board 201 are variable, the number of interior electrodes 203 positioned on any printed circuit board 201 and exposed to the cavity is variable, the shape and/or the area of any interior electrode 203 positioned on any printed circuit board 201 and exposed to the cavity is variable, and the overlapped ratio between different interior electrodes 203 positioned on different printed circuit board 201 along a direction vertical to any printed circuit board 201 is varied from zero to 100%. Even both how different interior electrodes 203 are connected to the terminal electrode 204 and how different terminal electrodes are positioned on the outer of the main structure are variable. For example, two terminal electrodes 204 may be electrically connected different interior electrodes 203 positioned on the same printed circuit board 201, and also may be electrically connected to different interior electrodes 203 positioned on different printed circuit boards 201. For example, the opposite sides of the main structure may have an equal number of terminal electrodes 204, wherein one terminal electrode 204 positioned on one side is electrically connected to another terminal electrode 204 positioned on another side through at least two interior electrodes 203 inside the main structure, wherein different terminal electrodes 204 positioned on the two sides have a one-to-one correspondence with each other. For example, one interior electrode 203 may extend along the surface of one printed circuit board 201 where it is positioned to the edge of the printed circuit board 201, and then directly contacts with one terminal electrode 204 positioned on the side of the printed circuit board 201. For example, one interior electrode 203 may penetrate through the printed circuit board 201 where it is positioned, and then directly contacts with one terminal electrode 204 positioned on the bottom surface of the printed circuit board 201. Additionally, the material, the structure and the manufacturing method of both the interior electrodes 203 and the terminal electrodes 204 may be equal to both the interior electrode 203 and the terminal electrode 204 used by the conventional ESD suppressor. For example, for both the interior electrodes 203 and the terminal electrodes 204, the material may be copper, gold, silver or other metals. Here, FIG. 2A to FIG. 2D merely summarize the cross-sections of some possible variation.

[0026] For the proposed ESD suppressor 200, by properly choosing the material and the structure of each printed circuit board 201, the parasitic capacitance may be reduced, especially the capacitance vale between any printed circuit board 201 and one or more interior electrodes 203 positioned on the printed circuit board 201. Hence, the breakdown voltage of the ESD suppressor 200 may be almost only dependent on the breakdown voltage between different interior electrodes 203 positioned on two sides of the cavity respectively. Then, an ESD suppressor 201 with special breakdown voltage may be precisely provided by selecting an insulating frame with specific thickness and some interior electrodes 203 with specific shape and specific distribution.

[0027] For example, each the printed circuit boards 201 may be a printed circuit board with low dielectric coefficient, such as the printed circuit board with the dielectric coefficient not large than 6.0. According to some conducted tests, the usage of the printed circuit board with the dielectric coefficient not large than 6.0 may significantly reduce the parasitic capacitance between each printed circuit board 201 and one or more interior electrodes 203 positioned thereon. For example, to balance the requirement of reducing the parasitic capacitance and maintain both the structural strength and electrical insulation of the printed circuit boards 201, due to the material with very low or low dielectric coefficient may not satisfy all requirements of the printed circuit board 201, the printed circuit board with dielectric coefficient not large than 4.4 or even between 1.5 to 3.5 may be used, according to the evaluation of the commercial printed circuit board. Additionally, with the increasingly application of high-frequency signals, each printed circuit board may be a high-frequency printed circuit board 201. Further, the invention only requires that each printed circuit boards 201 has low dielectric coefficient, but the invention need not to limit other specific details of the two printed circuit boards 201, even need not to limit whether the two printed circuit board 201 have the same material, the same structure, the same size and/or the same shape. Because the main structure of the printed circuit board is forming the metal circuits on the substrate, the substrate of each printed circuit board 201 may be glass fiber board, bakelite, plastic board, or ceramic substrate, also may be any combination of these items. Even, the substrate of each printed circuit board 201 may be bakelite, phenolic tissue paper, the combination of epoxy resin and tissue, the combination of epoxy resin and glass cloth, the combination of polyester and matter glass, the combination of glass cloth and epoxy resin, the combination of tissue paper and flame-retardant epoxy resin, the combination of tissue paper and non-flame-retardant epoxy resin, Teflon, metal, Alumina, aluminum nitride, or silicon carbide, also may be any combination of these items.

[0028] For the proposed ESD suppressor 200, when an electrical signal appears on one terminal electrode 204 and then appears on one or more interior electrodes exposed to the cavity and electrically connected to the terminal electrode 204, any other interior electrode 203 may discharge with it is essentially the other one or more interior electrodes 203 positioned on another printed circuit board 201 and also exposed to the cavity. Therefore, to compare with some conventional ESD suppressors that different interior electrodes connected to different terminal electrodes are separated mutually and positioned on the same plane, the proposed ESD suppressor may let different interior electrodes 203 positioned on different printed circuit boards 201 are partially overlap with each other along a direction vertical to one of the printed circuit boards 201. Hence, the invention may adjust the breakdown voltage between different interior electrodes 203 positioned on opposite sides of the cavity by adjusting the position and/or the rear of each interior electrode 203, also may increase the breakdown voltage between different interior electrodes by increasing the overlapped area between the interior electrodes 203 positioned on the opposite sides of the cavity. In this way, the proposed ESD suppressor may achieve the higher breakdown voltage value and the breakdown voltage adjustment flexibility that these conventional ESD suppressor can mot achieve. Particularly, ESD suppressor 200 may let each of the two printed circuit board 201 has two interior electrodes 203 separated mutually and exposed to the cavity, such that any electrical signal appears on one terminal electrode 204 has to jump back and forth multiple times between two opposite sides of the cavity before it arriving another terminal electrode 204. In other words, the ESD suppressor 200 may let different interior electrode 203 be positioned at different positions of the two printed circuit board 201 and face each other, such that the electrical signal has to overcome several capacitances before it is conducted from one terminal electrode 204 to another terminal electrode 204. In this way, the available breakdown voltage value and breakdown voltage adjustment flexibility of the ESD suppressor 200 may be increased. Moreover, the ESD suppressor 200 may have at least three terminal electrodes 204, such that the ESD suppressor 200 may be electrically connected to some different external circuits (excluding the one or more terminal electrodes electrical connected to the potential grounds). In this way, the ESD suppressor 200 may be in parallel to some different integrated circuits and then provides protection to these different integrated circuits. Of course, the ESD suppressor 200 may have one or more separated mutually terminal electrodes 204 on the two opposite terminals and let both two printed circuit boards 201 and the insulating frame 202 together surrounds one or more cavities, such that the electrical signal from the external environment may be conducted through the same cavity (or viewed as through different interior electrodes 203 exposed to the same cavity) or through different cavities in sequence (or viewed as through different interior electrodes exposed to different cavities) during the period that the electrical signal is conducted between different interior electrodes 203. Also, the ESD suppressor 200 may have some number separated mutually terminal electrodes positioned on its two opposite terminals and let different terminal electrodes positioned on different terminal are corresponded one-to one, such that the ESD suppressor 200 may be flexibly electrically connected to different circuits and/or different potential ground, also may be divided into some ESD suppressors 200 with less terminal electrodes 204.

[0029] In some embodiments, the insulating frame 202 is a printed circuit board with a hollowed central portion. It may be a square frame or a rectangular frame formed by removing the central portions of a cuboid printed circuit board. In other words, by choosing the usage of different printed circuit board with different thickness, or even by thinning the printed circuit board during removing the central portions of the printed circuit board, the thickness of the insulating frame 202 may be adjusted so as to adjust the breakdown voltage of the ESD suppressor.

[0030] In some embodiments, the insulating frame 202 is a frame formed by using a printing process to treat the insulating material. For example, initially, an impression (such as a mold) is placed on a printed circuit board and the one or more hole of the impression is aligned to the positons of the cavity, and then the insulating frame 202 is acquired by removing the impression after the insulating material filled into the holes being solidified/hardened. In other words, by choosing the usage of different impressions with different thickness, by choosing the usage of different holes with different depths, or even by adjusting how the holes are filled by the insulating materials, the thickness of the insulating frame maybe adjusted so as to adjust the breakdown voltage of the ESD suppressor 200. In general, the insulating material may be phenolic resin, epoxy resin, silicone resin, polyurethane, polyurethane, polyethylene, polypropylene, acrylic resin, and polystyrene, also may be any combination of those items.

[0031] FIG. 3 briefly presents the test results of some embodiments. Among those embodiments, the thickness of each interior electrode 203 are fixed but the thickness of the insulating frame is adjusted respectively. The test results indicate that when the distance between interior electrodes 203 positioned on two sides of the cavity (or briefly viewed as the distance between two printed circuit boards) is gradually increased from 10 milometers to 40 milometers, the capacitance value between the two printed circuit boards is gradually decreased from 0.05 pf to about 0.02 pf and also the corresponding breakdown voltage is gradually increased from less than 105 voltage through 200 voltage to 700 voltage. Clearly, the test results indicate that both the capacitance value and the breakdown voltage of the ESD suppressor may be adjusted by adjusting the thickness of the insulating frame. In other words, the proposed ESD suppressor may adjust its structure details, such that how large signal the proposed ESD suppressor may block and how large signal the ESD suppressor may conduct to the potential ground may be simply adjusted without affecting the integrated circuits being in parallel to the proposed ESD suppressor.

[0032] The invention proposed a method of manufacturing ESD suppressor. As shown in the flowchart presented as FIG. 4, the manufacturing method includes the following basic steps. Initially, as shown in step 401, provide a first printed circuit board with one or more interior electrodes on its first surface and a second printed circuit board with one or more interior electrodes on its second surface. Next, as shown in step 402, form an insulating frame on the first surface of the first printed circuit board and position the second surface of the second printed circuit board on another side of the insulating frame, such that the first printed circuit board, the insulating frame and the second printed circuit board together form a main structure with a cavity inside, wherein one or more interior electrodes on the first surface and one or more interior electrodes on the second surface are exposed to the cavity. Finally, as shown in step 403, form two terminal electrodes at different positions of the outer surface of the main structure respectively, also connect different terminal electrodes to different one or more interior electrodes.

[0033] In some embodiments, the formation of the insulating frame in step 402 is achieved by removing the central portion of a printed circuit board. Here, the thickness of the insulating frame may be adjusted by adjusting the thickness of the hollowed printed circuit board, such as by using different printed circuit boards with different thickness, or even such as by removing a thin layer of the printed circuit board during the period of removing the central portion of the printed circuit board. In some other embodiments, the formation of the insulating frame in step 402 may be achieved by using the printing process to treat the insulating material to form a frame. Here, the thickness of the insulating frame maybe adjusted by adjusting the thickness of the insulating material filled into the holes of the impression used by the printing process. As usual, the insulating material may be phenolic resin, epoxy resin, silicone resin, polyurethane, polyurethane, polyethylene, polypropylene, acrylic resin, and polystyrene, also may be any combination of those items.

[0034] In some embodiments, the formation of the main structure by using the first printed circuit board, the second printed circuit board and the insulating frame together in step 401 may further adjusting the relative geometrical relation between these interior electrodes on the first surface and these interior electrodes on the second surface. For example, the position of at least one interior electrode may be adjusted, such that at least one interior electrode on the first surface is partially overlapped with at least one interior electrode on the second surface along a direction being vertical to the first surface and/or the second surface. By adjusting the overlapping ratio, the capacitance value in the cavity inside the main structure may be adjusted. For example, by adjusting the position of at least one interior electrode, it is possible that both the first surface and the second surface has one and only one interior electrode, and it is also possible that one surface has only one interior electrode and another surface has two separated mutually interior electrodes such that one interior electrode on one surface is positioned between the two separated mutually interior electrodes along a direction parallel to one surface.

[0035] The proposed ESD suppressor manufacturing method still may have other optional steps. For example, optionally, to use the high-frequency printed circuit board to be the first printed circuit board and/or the second printed circuit board. For example, optionally, to form a metal film on a surface of a printed circuit board facing another printed circuit board, such as a copper film, a gold film or a sliver film, and then optionally to transform the required circuits into the metal film before the un-desired portions of the metal film being removed and then one or more interior electrodes being formed on this surface.

[0036] FIG. 5 to FIG. 8 briefly illustrated some examples of the proposed ESD suppressor and corresponding manufacturing method, which essentially are some application variations of these contents discussed previously. In FIG. 5, each printed circuit board 201 has one and only one interior electrode 203, and the two interior electrodes 203 is partially overlapped along a direction vertical to any printed circuit board when the two printed circuit boards 201 are positioned on the opposite sides of the insulating frame 202. Wherein, both interior electrodes 203 extends to the closed edge of corresponded printed circuit board 201, such that the terminal electrodes 204 may be the metal film positioned on the two terminals of the outer of the main structure formed by the two printed circuit boards 201 and the insulating frame 202. The main difference between FIG. 6 and FIG. 5 is FIG. 6 illustrating the situation that one printed circuit board 201 has two separated mutually interior electrodes 203 extending to the closed edges respectively and that another printed circuit 201 board has one and only one interior electrode 203 not extending to any edge of the printed circuit board 201. The main difference between FIG. 7 and FIG. 6 is FIG. 7 illustrating the situation that none of these interior electrodes 203 extending to any edge of the corresponded printed circuit board and that each of two interior electrodes 203 positioned on one printed circuit board 201 has one protrusion 2031. Here, both protrusions 2021 do not contact with the insulating frame 202 and may be connected to the two terminal electrodes 204 (not shown in FIG. 7) positioned on two terminals of the outer of the main structure through conductive structure (not shown in FIG. 7). The main difference between FIG. 8 and FIG. 5 is FIG. 5 illustrating the situation that each printed circuit board 201 has one and only one interior electrode 203.

[0037] Here, for one of the two printed circuit boards 201, one terminal does not exist any protrusion 2031 capable of contacting with the insulating frame 202, also another terminal 201 has an interior electrode 203 not extending to any edge of this printed circuit board and exists the protrusion 2031 not contact with the insulating frame 202.

[0038] FIG. 9 to FIG. 10 briefly illustrates some examples of the proposed ESD suppressor and the proposed manufacturing method, which essentially are some application variations of these contents discussed previously. FIG. 9 illustrates the situation that each of the two opposite sides of the ESD suppressor has two separated mutually terminal electrodes 204. Any electrical signal appeared on one terminal electrode 204 on one side of the ESD suppressor may be conducted to two or more interior electrodes 203 (not shown in FIG. 9) positioned inside the ESD suppressor to another terminal electrode 204 positioned on another side of the ESD suppressor if the signal strength of the electrical signal is large enough. The main difference between FIG. 10 and FIG. 9 is both the positon and the number of these terminal electrodes 204. Here, these terminal electrodes 204 are not positioned on the opposite sides of the ESD suppressor but are positioned on two opposite sides of one surface of the ESD suppressor. Here, the number of these terminal electrodes 204 is increased to 8, and these terminal electrodes 204 are divided into two groups that each has four terminal electrodes 204. FIG. 9 and FIG. 10 are merely two examples of this invention, both are used to emphasize that this invention need not to limit to the number and the positions of these terminal electrodes 204. By adjusting the geometrical configuration of these terminal electrodes 204, how the ESD suppressor is connected to the external circuit(s) and the potential ground(s) are adjustable, how the interior of the ESD suppressor is configured to connect mutually these terminal electrodes 204 and these interior electrodes 203 is adjustable, even a large ESD suppressor may be simply divided into some small ESD suppressors.

[0039] While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.