SIMBO BUCK-BOOST INVERTING CONVERTER AND CONTROL METHOD THEREOF

Abstract

Provided is a SIMBO buck-boost inverting converter including: a power stage for receiving an input voltage to generate first and positive output voltages and a negative output voltage, the power stage including a plurality of switches and an inductor; a control circuit for generating a plurality of control voltages based on the first and the second positive output voltages, the negative output voltage and a current of the inductor; an energy generation and distribution circuit for generating a plurality of duty cycles based on the control voltages; and a logic control and gate driving circuit for generating a plurality of switch control signals for controlling the switches of the power stage based on the duty cycles; wherein the control circuit and the energy generation and distribution circuit feedback-control and adjust the duty cycles to adjust a balance between an input energy and an output energy.

Claims

1. A SIMBO (Single Inductor Multiple Bipolar Output) buck-boost inverting converter including: a power stage for receiving an input voltage to generate a first positive output voltage, a second positive output voltage and a negative output voltage, the power stage including a plurality of switches and an inductor; a control circuit coupled to the power stage, for generating a plurality of control voltages based on the first positive output voltage, the second positive output voltage, the negative output voltage and a current of the inductor; an energy generation and distribution circuit coupled to the control circuit, for generating a plurality of duty cycles based on the control voltages; and a logic control and gate driving circuit coupled to the energy generation and distribution circuit, for generating a plurality of switch control signals for controlling the switches of the power stage based on the duty cycles; wherein the control circuit and the energy generation and distribution circuit feedback-control and adjust the duty cycles to adjust a balance between an input energy from the input voltage and an output energy sent to the first positive output voltage, the second positive output voltage and the negative output voltage.

2. The SIMBO buck-boost inverting converter according to claim 1, further including a clock generation circuit coupled to the control circuit, for generating a clock signal to the control circuit.

3. The SIMBO buck-boost inverting converter according to claim 1, wherein the control circuit includes: a plurality of error amplifiers, coupled to the power stage, for generating a first control voltage, a second control voltage and a third control voltage of the control voltages based on the first positive output voltage, the second positive output voltage, the negative output voltage and a reference voltage; an adjust circuit for generating a plurality of adjust voltages based on one of the duty cycles, one of the switch control signals and a clock signal; and a control unit coupled to the error amplifiers and the adjust circuit, for generating a fourth control voltage and a fifth control voltage of the control voltages and a plurality of control currents based on the first control voltage, the second control voltage, the third control voltage, the inductor current and the adjust voltages, wherein the control currents are proportional to the inductor current.

4. The SIMBO buck-boost inverting converter according to claim 3, wherein the energy generation and distribution circuit includes: a plurality of energy generation circuits coupled to the control unit, for generating a first duty cycle and a second duty cycle of the duty cycles based on the fourth control voltage, the fifth control voltage and a first control current of the control currents; and a plurality of energy distribution circuits coupled to the control unit, for generating a third duty cycle, a fourth duty cycle and a fifth duty cycle of the duty cycles based on the first control voltage, the second control voltage, the third control voltage and a second control current of the control currents.

5. The SIMBO buck-boost inverting converter according to claim 4, wherein in generating the first positive output voltage and the second positive output voltage under buck mode or boost mode, in response to a first adjust voltage of the adjust voltages from the adjust circuit, the control unit adjusts the fourth control voltage and the fifth control voltage, and the energy generation circuits adjust the first duty cycle and the second duty cycle to adjust the balance between the input energy and the output energy.

6. The SIMBO buck-boost inverting converter according to claim 5, wherein in generating the first positive output voltage and the second positive output voltage under buck mode, in response to a second adjust voltage of the adjust voltages from the adjust circuit, the control unit adjusts the fifth control voltage, and the energy generation circuits adjust the second duty cycle to minimize a peak value of the inductor current.

7. A control method for SIMBO (Single Inductor Multiple Bipolar Output) buck-boost inverting converter, the control method including: receiving an input voltage to generate a first positive output voltage, a second positive output voltage and a negative output voltage by a power stage, the power stage including a plurality of switches and an inductor; generating a plurality of control voltages based on the first positive output voltage, the second positive output voltage, the negative output voltage and a current of the inductor; generating a plurality of duty cycles based on the control voltages; and generating a plurality of switch control signals for controlling the switches of the power stage based on the duty cycles; wherein feedback-controlling and adjusting the duty cycles to adjust a balance between an input energy from the input voltage and an output energy sent to the first positive output voltage, the second positive output voltage and the negative output voltage.

8. The control method for the SIMBO buck-boost inverting converter according to claim 7, further including generating a clock signal.

9. The control method for the SIMBO buck-boost inverting converter according to claim 7, further including: generating a first control voltage, a second control voltage and a third control voltage of the control voltages based on the first positive output voltage, the second positive output voltage, the negative output voltage and a reference voltage; generating a plurality of adjust voltages based on one of the duty cycles, one of the switch control signals and a clock signal; and generating a fourth control voltage and a fifth control voltage of the control voltages and a plurality of control currents based on the first control voltage, the second control voltage, the third control voltage, the inductor current and the adjust voltages, wherein the control currents are proportional to the inductor current.

10. The control method for the SIMBO buck-boost inverting converter according to claim 9, further including: generating a first duty cycle and a second duty cycle of the duty cycles based on the fourth control voltage, the fifth control voltage and a first control current of the control currents; and generating a third duty cycle, a fourth duty cycle and a fifth duty cycle of the duty cycles based on the first control voltage, the second control voltage, the third control voltage and a second control current of the control currents.

11. The control method for the SIMBO buck-boost inverting converter according to claim 10, further including: in generating the first positive output voltage and the second positive output voltage under buck mode or boost mode, in response to a first adjust voltage of the adjust voltages, adjusting the fourth control voltage and the fifth control voltage, and adjusting the first duty cycle and the second duty cycle to adjust the balance between the input energy and the output energy.

12. The control method for the SIMBO buck-boost inverting converter according to claim 11, further including: in generating the first positive output voltage and the second positive output voltage under buck mode, in response to a second adjust voltage of the adjust voltages, adjusting the fifth control voltage, and adjusting the second duty cycle to minimize a peak value of the inductor current.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG. 1A shows a simplified pixel circuit diagram.

[0012] FIG. 1B shows signal waveform in FIG. 1A.

[0013] FIG. 2 shows a circuit diagram of a SIMBO (Single Inductor Multiple Bipolar Output) boost-buck inverting converter according to one embodiment of the application.

[0014] FIG. 3A to FIG. 3C show signal waveforms of the SIMBO boost-buck inverting converter according to one embodiment of the application.

[0015] FIG. 4A to FIG. 4B show signal waveforms of the SIMBO boost-buck inverting converter according to one embodiment of the application.

[0016] In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawing.

DESCRIPTION OF THE EMBODIMENT

[0017] Technical terms of the disclosure are based on general definition in the technical field of the disclosure. If the disclosure describes or explains one or some terms, definitions of the terms are based on the description or explanation of the disclosure. Each of the disclosed embodiments has one or more technical features. In possible implementation, one skilled person in the field could selectively implement part or all technical features of any embodiment of the disclosure or selectively combine part or all technical features of the embodiments of the disclosure.

[0018] FIG. 2 shows a circuit diagram of a SIMBO (Single Inductor Multiple Bipolar Output) boost-buck inverting converter according to one embodiment of the application. The SIMBO boost-buck inverting converter 200 includes a power stage 210, a control circuit 220, an energy generation and distribution circuit 230, a logic control and gate driving circuit 240 and a clock generation circuit 250. The SIMBO boost-buck inverting converter 200 generates two positive output voltages V.sub.OP and V.sub.OA, and one negative output voltage V.sub.ON from an input voltage V.sub.IN. The positive output voltages V.sub.OP and V.sub.OA, and the negative output voltage V.sub.ON may be used to implement power AVDD, OVDD and OVSS in FIG. 1A.

[0019] The power stage 210 includes switches S.sub.1, S.sub.2, S.sub.3, S.sub.P, S.sub.A, S.sub.N, S.sub.R, an inductor L1, capacitors C11-C14 and resistors R1-R6.

[0020] The switch S.sub.1 is coupled between the input voltage V.sub.IN and a first node LX1. In the application, the symbol “S.sub.1” may also be used to indicate the switch control signal for controlling the switch S.sub.1 and so on. The switch S.sub.2 is coupled between the first node LX1 and GND. The switch S.sub.3 is coupled between a second node LX2 and GND. The switch S.sub.P is coupled between the second node LX2 and the positive output voltage V.sub.OP. The switch S.sub.A is coupled between the second node LX2 and the positive output voltage V.sub.OA. The switch S.sub.N is coupled between the first node LX1 and the negative output voltage V.sub.ON. The switch S.sub.R is coupled between the input voltage V.sub.IN and the second node LX2.

[0021] The inductor L1 is coupled between the first node LX1 and the second node LX2.

[0022] The capacitor C11 is coupled between the input voltage V.sub.IN and GND. The capacitor C12 is coupled between the negative output voltage V.sub.ON and GND. The capacitor C13 is coupled between the positive output voltage V.sub.OA and GND. The capacitor C14 is coupled between the positive output voltage V.sub.OP and GND.

[0023] The resistors R1 and R2 are serially coupled between the positive output voltage V.sub.OA and GND for voltage dividing the positive output voltage V.sub.OA. The resistors R3 and R4 are serially coupled between the positive output voltage V.sub.OP and GND for voltage dividing the positive output voltages V.sub.OP. The resistors R5 and R6 are serially coupled between the negative output voltage V.sub.ON and a reference voltage Vref for voltage dividing the negative output voltage V.sub.ON.

[0024] The control circuit 220 is coupled to the power stage 210. The control circuit 220 includes error amplifiers EA1-EA3, an adjust circuit 221 and a control unit 223.

[0025] The error amplifier EA1 receives a voltage division from the resistors R5 and R6 to output an internal voltage (or a control voltage) V.sub.CN. The error amplifier EA2 receives the reference voltage Vref and a voltage division from the resistors R3 and R4 to output an internal voltage (or a control voltage) V.sub.CP. The error amplifier EA3 receives the reference voltage Vref and a voltage division from the resistors R1 and R2 to output an internal voltage (or a control voltage) V.sub.CA.

[0026] The adjust circuit 221 generates adjust voltages V.sub.C1_adj and V.sub.C3_adj based on a clock signal CK, the duty cycle D.sub.N and the switch control signal S.sub.2. For example, but not limited by, the adjust circuit 221 generates the adjust voltage V.sub.C1_adj based on the clock signal CK and the duty cycle D.sub.N, and generates the adjust voltage V.sub.C3_adj based on the switch control signal S.sub.2.

[0027] The control unit 223 is coupled to the inductor L1, the error amplifiers EA1-EA3 and the adjust circuit 221. The control unit 223 generates control voltages V.sub.C1, V.sub.C3, and control currents I.sub.S1 and I.sub.S2 based on the control voltages V.sub.CN, V.sub.CA, V.sub.CP, the adjust voltages V.sub.C1_adj, V.sub.C3_adj, and the input voltage V.sub.IN, wherein the control currents I.sub.S1 and I.sub.S2 are proportional to the inductor current IL. For example, but not limited by, the control voltages V.sub.C1, V.sub.C3, and the currents I.sub.S1 and I.sub.S2 are as follows:

V.sub.C1=k.sub.1*V.sub.CA+k.sub.2*V.sub.CP+k.sub.3*V.sub.CN−V.sub.C1_adj

V.sub.C3=V.sub.C1−k.sub.7*(V.sub.IN/V.sub.OA)*V.sub.CA−k.sub.4*(V.sub.IN/V.sub.OP)*V.sub.CP−k.sub.5*(V.sub.IN/V.sub.ON)*V.sub.CN−V.sub.C3_adj

I.sub.S1=V.sub.IN*IL/k

I.sub.S2=V.sub.OP*IL/k@D.sub.P

I.sub.S2=V.sub.OA*IL/k@D.sub.A

I.sub.S2=V.sub.ON*IL/k@D.sub.N

[0028] The energy generation and distribution circuit 230 is coupled to the control circuit 220, for generating duty cycles D.sub.1, D.sub.3, D.sub.P, D.sub.A and D.sub.N based on the control voltages V.sub.C1, V.sub.C3, V.sub.CN, V.sub.CA, V.sub.CP and control currents I.sub.S1 and I.sub.S2. The duty cycles D.sub.1, D.sub.3 are also referred as energy generation cycles; and the duty cycles D.sub.P, D.sub.A and D.sub.N are also referred as energy distribution cycles.

[0029] The energy generation and distribution circuit 230 includes a first energy generation circuit 231, a second energy generation circuit 233, a first energy distribution circuit 235, a second energy distribution circuit 237 and a third energy distribution circuit 239, which have the same or similar circuit structures and operations.

[0030] The first energy generation circuit 231 includes a comparator 231A, a multiplexer 231B, a control current source 231C and a capacitor C.sub.1. Similarly, the second energy generation circuit 233 includes a comparator 233A, a multiplexer 233B, a control current source 233C and a capacitor C.sub.3. The first energy distribution circuit 235 includes a comparator 235A, a multiplexer 235B, a control current source 235C and a capacitor CP. The second energy distribution circuit 237 includes a comparator 237A, a multiplexer 237B, a control current source 237C and a capacitor CA. The third energy distribution circuit 239 includes a comparator 239A, a multiplexer 239B, a control current source 239C and a capacitor CN.

[0031] In the first energy generation circuit 231, the multiplexer 231B selects among GND or the control current Isi from the control current source 231C based on the switch control signal S.sub.1. The comparator 231A compares the control voltage V.sub.C1 and the output from the multiplexer 231B to output the duty cycle D.sub.1.

[0032] The second energy generation circuit 233, the first energy distribution circuit 235, the second energy distribution circuit 237 and the third energy distribution circuit 239 outputs the duty cycles D.sub.3, D.sub.P, D.sub.A and D.sub.N, respectively. The circuit operations of the second energy generation circuit 233, the first energy distribution circuit 235, the second energy distribution circuit 237 and the third energy distribution circuit 239 are the same or similar to that of the first energy generation circuit 231 and thus are omitted here.

[0033] The logic control and gate driving circuit 240 is couple to the energy generation and distribution circuit 230, for generating switch control signals S.sub.1, S.sub.2, S.sub.3, S.sub.P, S.sub.A, S.sub.N and S.sub.R based on the duty cycles D.sub.1, D.sub.3, D.sub.P, D.sub.A and D.sub.N.

[0034] The clock generation circuit 250 is coupled to the control circuit 220. The clock generation circuit 250 is for example but not limited by, an oscillator, for generating the clock signal CK to the adjust circuit 221 of the control circuit 220.

[0035] In one embodiment of the application, the SIMBO boost-buck inverting converter 200 senses the output voltages V.sub.OP, V.sub.OA, V.sub.ON and the inductor current IL to control the power stage 210.

[0036] In one embodiment of the application, the positive output voltages V.sub.OP, V.sub.OA are generated in buck-boost converting operations; and the negative output voltage V.sub.ON is generated in inverting converting operations.

[0037] In one embodiment of the application, the duty cycles D.sub.1, D.sub.3 may be referred as energy generation duty cycles during which the input voltage V.sub.IN transfers energy to the inductor L1, and the duty cycles D.sub.P, D.sub.A and D.sub.N may be referred as energy distribution duty cycles during which the energy stored in the inductor L1 is transferred to the positive output voltages V.sub.OP, V.sub.OA and the negative output voltage V.sub.ON. The energy distribution duty cycles D.sub.P, D.sub.A and D.sub.N rely on the control voltages V.sub.CP, V.sub.CA and V.sub.CN. In one embodiment of the application, there is theoretically no cross regulation effect, and reasons are as below.

[0038] In the energy distribution duty cycle D.sub.P, the energy E.sub.OP sent to the positive output voltage V.sub.OP may be expressed in the equation (1), wherein “IL” refers to the inductor current and “T” refers to the cycle of the clock signal CK:

ε.sub.OP=∫.sub.0.sup.D.sup.P.sup.TI.sub.LV.sub.OP.Math.dt  (1)

[0039] In the energy distribution circuit 235, the capacitor CP is charged by the current I.sub.S2 (I.sub.S2=V.sub.OP*IL/k). Thus, the charge sent to the capacitor CP may be expressed as equation (2):

Q.sub.OP=∫.sub.0.sup.D.sup.P.sup.TI.sub.S2.Math.dt=∫.sub.0.sup.D.sup.P.sup.TV.sub.OPI.sub.L/k.Math.dt=C.sub.PV.sub.CP  (2)

[0040] Equation (3) is obtained by combining the equations (1) and (2):

E.sub.OP=kC.sub.PV.sub.CP  (3)

[0041] As described in the equation (3), the energy E.sub.OP is decided by the error amplifier output voltage (i.e. the control voltage) V.sub.CP.

[0042] Similarly, during the energy distribution duty cycle D.sub.A, the energy E.sub.OA sent to the positive output voltage V.sub.OA is as follow:

E.sub.OA=∫.sub.0.sup.D.sup.A.sup.TI.sub.LV.sub.OA.Math.dt=kC.sub.AV.sub.CA  (4-1)

[0043] Similarly, during the energy distribution duty cycle D.sub.N, the energy E.sub.ON sent to the negative output voltage V.sub.ON is as follow:

E.sub.ON=∫.sub.0.sup.D.sup.N.sup.TI.sub.LV.sub.ON.Math.dt=kC.sub.NV.sub.CN  (4-2)

[0044] Thus, from the above description, in one embodiment of the application, via feedback control, there is theoretically no cross regulation effect.

[0045] FIG. 3A to FIG. 3C show signal waveforms of the SIMBO boost-buck inverting converter according to one embodiment of the application. FIG. 3A shows perfect balance while FIG. 3B and FIG. 3C show imperfect balance. As shown in FIG. 3A, during one clock cycle T.sub.CK, there are four phases: a first phase P1 (i.e. a charge phase), a second phase P2 (i.e. a first positive output voltage outputting phase for outputting the positive output voltage V.sub.OP), a third phase P3 (i.e. a second positive output voltage outputting phase for outputting the positive output voltage V.sub.OA) and a fourth phase P4 (i.e. a negative output voltage outputting phase for outputting the negative output voltage V.sub.ON).

[0046] During the first phase P1 (i.e. the charge phase), the switches S.sub.1 and S.sub.3 are turned on to charge the inductor L1 by the input voltage V.sub.IN.

[0047] During the second phase P2 (i.e. the first positive output voltage outputting phase), the switches S.sub.1 and S.sub.P are turned on for transferring energy stored in the inductor L1 to the positive output voltage V.sub.OP.

[0048] During the third phase P3 (i.e. the second positive output voltage outputting phase), the switches S.sub.1 and S.sub.A are turned on for transferring energy stored in the inductor L1 to the positive output voltage V.sub.OA.

[0049] During the fourth phase P4 (i.e. the negative output voltage outputting phase), the switches S.sub.3 and S.sub.N are turned on for transferring energy stored in the inductor L1 to the negative output voltage V.sub.ON.

[0050] In the application, the term “preface balance” refers that, the energy transferred from the input voltage V.sub.IN is totally transferred to all loads (i.e. used in generating the output voltages V.sub.OP, V.sub.OA, V.sub.ON) without any energy waste. In other words, at the end of the duty cycle D.sub.N, the inductor current IL reaches a predetermined value (a steady-state value).

[0051] Conversely, as the imperfect balance as shown in FIG. 3B and FIG. 3C, at the end of the duty cycle D.sub.N, the inductor current IL does not reach the predetermined value (the steady-state value) (for example, being higher than the predetermined value (the steady-state value)), which results energy waste.

[0052] As shown in FIG. 3B, at the end of the duty cycle D.sub.N, the switches S.sub.3 and S.sub.N are turned on for transferring extra energy stored in the inductor L1 to the negative output voltage V.sub.ON. By so, the energy waste is minimized but the negative output voltage V.sub.ON has higher voltage ripples.

[0053] As shown in FIG. 3C, at the end of the duty cycle D.sub.N, the switches S.sub.2 and S.sub.R are turned on for transferring extra energy stored in the inductor L1 back to the input voltage V.sub.IN. By so, the negative output voltage V.sub.ON has lower voltage ripples but energy is wasted.

[0054] Thus, in one embodiment of the application, via adjusting (reducing) the duty cycles D.sub.3 and D.sub.1 to reduce energy stored in the inductor L1 until perfect balance.

[0055] How to adjust (reduce) the duty cycles D.sub.3 and D.sub.1 in one embodiment of the application is described.

[0056] The total energy E.sub.OT transferred to the output loads (i.e. the output voltages V.sub.OP, V.sub.OA, V.sub.ON) are as expressed in the equation (5):

E.sub.OT=∫.sub.0.sup.D.sup.P.sup.TI.sub.LV.sub.OP.Math.dt+∫.sub.0.sup.D.sup.A.sup.TI.sub.LV.sub.OA.Math.dt+∫.sub.0.sup.D.sup.N.sup.TI.sub.LV.sub.ON.Math.dt

E.sub.OT=kCV.sub.PV.sub.CP+kC.sub.AV.sub.CA+kC.sub.NV.sub.CN  (5)

[0057] The total input energy E.sub.IT from the input voltage V.sub.IN is expressed in the equation (6):

E.sub.IT=∫.sub.0.sup.D.sup.1.sup.TI.sub.LV.sub.IN.Math.dt=kC.sub.1V.sub.C1  (6)

[0058] In the steady state (as shown in FIG. 3A), E.sub.OT=E.sub.IT. Thus, the following equation (7) is obtained:

[00001]$\begin{array}{cc}{V}_{C1}=k\frac{C_P}{C_1}{V}_{\mathrm{CP}}+k\frac{C_A}{C_1}{V}_{\mathrm{CA}}+k\frac{C_N}{C_1}{V}_{\mathrm{CN}}=k_1{V}_{\mathrm{CA}}+k_2{V}_{\mathrm{CP}}+k_3{V}_{\mathrm{CN}}& \left(7\right)\end{array}$

[0059] In the equation (7), the coefficients k.sub.1, k.sub.2, k.sub.3 are all positive values.

[0060] As shown in FIG. 3A, the duty cycle D.sub.1 of the switch S.sub.1 will decide the energy generation duration of the SIMBO boost-buck inverting converter 200. Thus, the duty cycles are expressed as the equation (8), wherein D.sub.3′ refers to the overlap phase of S1 and S3 before the duty cycle D3:

D.sub.1=D.sub.A+D.sub.P+D.sub.3+D.sub.3′  (8)

[0061] During the duty cycles D.sub.3 and D.sub.3′ (within the duty cycle D.sub.1), the inductor L1 is charged; and energy stored in the inductor L1 is transferred to the output voltages V.sub.OP, V.sub.OA, V.sub.ON during the duty cycles D.sub.P, D.sub.A, D.sub.N.

[0062] During the clock cycle T.sub.CK, if the energy generated in the duty cycle D.sub.1 is totally equal to the energy transferred to the output voltages V.sub.OP, V.sub.OA, V.sub.ON, then the equation (9) is as follows:

T.sub.CK=D.sub.1+D.sub.N  (9)

[0063] However, in the transient state (as shown in FIG. 3B and FIG. 3C), the energy generated in the duty cycle D.sub.1 is larger than the energy transferred to the output voltages V.sub.OP, V.sub.OA, V.sub.ON, then the equation (10) is as follows:

T.sub.CK>D.sub.1+D.sub.N  (10)

[0064] Equation (10) refers that, during the clock cycle, after generating the output voltages, there is extra energy stored in the inductor L1. Thus, the residual energy stored in the inductor L1 is released to the negative output voltage V.sub.ON during the duty cycle D.sub.R (as shown in FIG. 3B, which results large voltage ripple in the negative output voltage V.sub.ON), or the residual energy stored in the inductor L1 is recycled to the input voltage V.sub.IN (as shown in FIG. 3C, which results lower energy conversion efficiency), wherein T.sub.CK=D.sub.1+D.sub.N+D.sub.R.

[0065] Thus, in order to achieve perfect balance between the total input energy and the total output energy during the clock cycle, in one embodiment of the application, the input energy is adjusted (reduced) by adjusting (reducing) the duty cycles D.sub.1 and D.sub.3 to achieve the equation (9) (T.sub.CK=D.sub.1+D.sub.N) and by establishing a feedback mechanism. Therefore, the control voltage V.sub.C1 is as follows:

V.sub.C1=k.sub.1V.sub.CA+k.sub.2V.sub.CP+k.sub.3V.sub.CN−V.sub.C1_adj  (11)

[0066] In one embodiment of the application, via adjusting the adjust voltage V.sub.C1_adj generated from the adjust circuit 221, the duty cycle D.sub.1 is adjusted until the perfect balance in the equation (9). In other words, if the duty cycle D.sub.1 is too large, then the adjust voltage V.sub.C1_adj is not zero and thus the control voltage V.sub.C1 is smaller which results a smaller duty cycle D.sub.1. The operations are repeated until perfect balance.

[0067] Further, in FIG. 3A and FIG. 3C, the positive output voltages V.sub.OP and V.sub.OA are generated under the boost mode; and during the duty cycles D.sub.P and D.sub.A, the inductor current IL is decreased, wherein the coefficients k.sub.4 and k.sub.5 are positive values.

[0068] FIG. 4A to FIG. 4B show signal waveforms of the SIMBO boost-buck inverting converter according to one embodiment of the application. FIG. 4A shows imperfect balance while FIG. 4B shows perfect balance.

[0069] In FIG. 4A, the duty cycle D.sub.2 is residual, which causes energy waste. Thus, in one embodiment of the application, energy stored in the inductor L1 is decreased by adjusting (reducing) the duty cycle D.sub.3 until the duty cycle D.sub.2 is minimized or totally eliminated. How to achieve perfect balance in FIG. 4B is described.

[0070] The equation (8) is rearranged as:

D.sub.3=D.sub.1−D.sub.A−D.sub.P−D.sub.3′  (12)

V.sub.C3=V.sub.C1−k.sub.4V.sub.CA−k.sub.5V.sub.CP−V.sub.C3_adj  (13)

[0071] In FIG. 4A and FIG. 4B, the positive output voltages V.sub.OP and V.sub.OA are generated in the buck mode, wherein during the duty cycle D.sub.1 (which is overlapped with the duty cycles D.sub.P, D.sub.A), the inductor current IL is increasing. When energy stored in the inductor L1 is enough, the duty cycle D.sub.1 may be ended within the duty cycles D.sub.P or D.sub.A. The switch S.sub.2 is turned on to transfer the required energy to the positive output voltages V.sub.OP and V.sub.OA until the duty cycle D.sub.A is ended. Then, the switches S.sub.3 and S.sub.N are turned on to transfer residual energy in the inductor L1 to the negative output voltage V.sub.ON.

[0072] Compared with the boost mode, the buck mode requires a smaller duty cycle D.sub.3 because the energy is still transferred into the inductor L1 during the duty cycles D.sub.P and D.sub.A. However, heavier the buck mode, smaller the duty cycle D.sub.3. The equation (13) is rearranged as:

[00002]$\begin{array}{cc}V\text{?}=V_{C1}-k\text{?}\frac{V_{\mathrm{IN}}}{V_{\mathrm{CA}}}{V}_{\mathrm{CA}}-k\text{?}\frac{V_{\mathrm{IN}}}{V_{\mathrm{OP}}}{V}_{\mathrm{CP}}-V\text{?}& \left(14\right)\end{array}$$\text{?}\text{indicates text missing or illegible when filed}$

[0073] In the equation (14), “(V.sub.IN/V.sub.OP)>1” and “(V.sub.IN/V.sub.OP)<1” refer to the buck mode operations and the boost mode operations. Thus, higher (V.sub.IN/V.sub.OP) results the smaller adjust voltage V.sub.C3 and the smaller duty cycle D.sub.3.

[0074] In one embodiment of the application, in order to achieve a better conversion efficiency, in the buck mode, the inductor L1 is charged during the duty cycles D.sub.P and D.sub.A and to minimize the duty cycle D.sub.2 for minimizing a peak value of the inductor current IL. This means small conduction loss and small switching loss, because the inductor current IL has small peak value and the duty cycle D.sub.2 of the switch S.sub.2 is removed. Thus, in one embodiment of the application, the adjust voltage V.sub.C3_adj from the adjust circuit 221 is used to reduce the duty cycle D.sub.3 until the duty cycle D.sub.2 is minimized.

[0075] In one embodiment of the application, the positive output voltages V.sub.OP and V.sub.OA are generated in the buck-boost mode (i.e. the positive output voltages V.sub.OP and V.sub.OA are higher than, equal to or lower than the input voltage V.sub.IN); and the negative output voltage V.sub.ON is generated in the inverting mode, wherein the buck-boost mode and the inverting mode are completed during one clock cycle.

[0076] In one embodiment, by generating the adjust voltage, the duty cycles are adjusted to reduce extra energy stored in the inductor until perfect balance (as shown in FIG. 3A to FIG. 3C and FIG. 4A to FIG. 4B). Thus, in one embodiment of the application, large switching frequency variation and high voltage ripples are prevented, and there is no cross regulation effect.

[0077] It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed embodiments. It is intended that the specification and examples be considered as exemplary only, with a true scope of the disclosure being indicated by the following claims and their equivalents.