COMMUNICATION DEVICE AND CFR PROCESSING METHOD THEREOF
20220417071 · 2022-12-29
Assignee
Inventors
Cpc classification
H04B1/0475
ELECTRICITY
International classification
Abstract
The present disclosure relates to a method of reducing a Peak to Average Power Ratio (PAPR) in a communication device, and more particularly, to a method of Crest Factor Reduction (CFR) processing of a signal in order to reduce a PAPR in a communication device such as a repeater. The communication device includes: a first CFR module configured generate a first processed signal by CFR processing an original signal; and a second CFR module configured generate a second processed signal by CFR processing the first processed signal, wherein the first processed signal is generated using a first sampling rate, and the second processed signal is generated using a second sampling rate. According to the disclosure, even a communication device with a low sampling rate may effectively remove a peak component of an input signal.
Claims
1. A communication device comprising: a first CFR module configured to generate a first processed signal by CFR processing an original signal; and a second CFR module configured to generate a second processed signal by CFR processing the first processed signal, wherein the first processed signal is generated using a first sampling rate, and the second processed signal is generated using a second sampling rate.
2. The communication device of claim 1, wherein the second CFR module generates the second processed signal by CFR processing the first processed signal based on a time different from that of the first CFR module, and the first sampling rate is set equal to the second sampling rate.
3. The communication device of claim 2, further comprising: a sample shifter configured to shift and output the first processed signal by a preset time, wherein the second CFR module generates the second processed signal by CFR processing a signal input from the sample shifter.
4. The communication device of claim 3, wherein the preset time corresponds to less than the first sampling rate.
5. The communication device of claim 4, wherein the preset time corresponds to half of the first sampling rate.
6. A method of CFR processing an original signal in a communication device including a plurality of CFR modules, the method comprising: generating a first processed signal by CFR processing the original signal; and generating a second processed signal by CFR processing the first processed signal, wherein the first processed signal is generated using a first sampling rate, and the second processed signal is generated using a second sampling rate.
7. The method of claim 6, wherein the generating of the second processed signal comprises: generating the second processed signal by CFR processing the first processed signal based on a time different from that of the first CFR module, and the first sampling rate is set equal to the second sampling rate.
8. The method of claim 7, further comprising: outputting the first processed signal by shifting by a preset time, wherein the generating of the second processed signal comprises: generating the second processed signal by CFR processing the shifted first processed signal.
9. The method of claim 8, wherein the preset time corresponds to less than the first sampling rate.
10. The method of claim 9, wherein the preset time corresponds to half of the first sampling rate.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0017] These and/or other aspects will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings in which:
[0018]
[0019]
[0020]
[0021]
[0022]
[0023]
[0024]
DETAILED DESCRIPTION
[0025] Since the disclosure may have diverse modified embodiments, preferred embodiments are illustrated in the drawings and are described in the detailed description. However, this is not intended to limit the disclosure to particular modes of practice, and it is to be appreciated that all changes, equivalents, and substitutes that do not depart from the spirit and technical scope of the disclosure are encompassed in the disclosure.
[0026] In the description of the disclosure, certain detailed explanations of the related art are omitted when it is deemed that they may unnecessarily obscure the essence of the disclosure. In addition, numeral figures (e.g., first, second, and the like) used during describing the specification are just identification symbols for distinguishing one element from another element.
[0027] Further, in the specification, if it is described that one component “is connected to” or “accesses” the other component, it is understood that the one component may be directly connected to or may directly access the other component but unless explicitly described to the contrary, another component may be “connected” or “access” between the components.
[0028] In addition, terms including “unit,” “er,” “or,” “module,” and the like disclosed in the specification mean a unit that processes at least one function or operation and this may be implemented by hardware or software such as a processor, a micro processor, a micro controller, a central processing unit (CPU), a graphics processing unit (GPU), an accelerated Processing unit (APU), a digital signal processor (DSP), an application specific integrated circuit (ASIC), and a field programmable gate array (FPGA) or a combination of hardware and software.
[0029] In addition, it is intended to clarify that the division of the components in the specification is only made for each main function that each component is responsible for. That is, two or more components to be described later below may be combined into one component, or one components may be divided into two or more components according to more subdivided functions. In addition, it goes without saying that each of the components to be described later below may additionally perform some or all of the functions of other components in addition to its own main function, and some of the main functions that each of the components is responsible for may be dedicated and performed by other components.
[0030] Hereinafter, various embodiments will be described in detail in order.
[0031]
[0032] Referring to
[0033] The peak detector 110 may detect a peak by receiving the magnitude of the original signal. For example, the peak detector may calculate a change value of a signal magnitude between samples and determine a point where a sign of the value changes from positive to negative as a peak. The peak detector, when the size of the detected peak is greater than a certain threshold, may obtain a difference value between the peak and the threshold.
[0034] The cancellation pulse generator 120 may generate a cancellation pulse corresponding to the peak detected by the peak detector 110 and the original signal and may output the cancellation pulse to a subtracter 140.
[0035] The delay 130 may synchronize the original signal with the cancellation pulse by delaying the original signal (except for some input to the peak detector 110) in response to a delay time required while the peak detector 110 and the cancellation pulse generator 120 perform the above operations.
[0036] The subtracter 140 may combine the original signal input from the delay 130 and the cancellation pulse input from the cancellation pulse generator 120 to output a ‘signal from which a portion having a signal magnitude greater than or equal to the threshold is removed’ (hereinafter referred to as a ‘processed signal’).
[0037] Because the operation of the CFR module 100 described above is a previously disclosed technology, a more detailed description thereof will be omitted. In addition, it is obvious that the operation of the CFR module 100 described above is only an example, and the scope of the disclosure is not limited to the operation. In addition, hereinafter, an operation of outputting a processed signal by removing a peak of an original signal from the CFR module 100 is abbreviated as ‘CFR processing’.
[0038] The disclosure includes a configuration for performing CFR processing multiple times, and in particular, a unique ‘sample shift operation’ (a specific operation for this will be described later) is performed between each CFR processing. Hereinafter, CFR processing of an original signal according to an embodiment will be described with reference to
[0039]
[0040] Referring to
[0041] When an original signal is input, the first CFR module 210 may detect a peak of the original signal using a preset first sampling rate, and may generate a pulse corresponding to the detected peak to primarily remove the peak of the original signal.
[0042] The sample shifter 220 may shift or phase-delay an input signal by a preset time. A signal output from the first CFR module 210 may be input to the second CFR module 230 after being shifted or phase-delayed through the sample shifter 220.
[0043] When the shifted or phase-delayed signal is input from the sample shifter 220, the second CFR module 230 may detect a peak using a preset second sampling rate, and may generate a pulse corresponding to the detected peak to secondarily remove the peak of the original signal.
[0044] The operation of the second CFR module 230 is similar to that of the first CFR module 210, but sampling timing is different. This is because the signal input to the second CFR module 230 is the signal input from the sample shifter 220. Accordingly, even if the first sampling rate and the second sampling rate are the same, positions of original signals sampled by the first CFR module 210 and the second CFR module 230 may be different from each other.
[0045] In
[0046] That is, the first CFR module 210 may include a first peak detector (1.sup.st PEAK DETECTION) 310, a first cancellation pulse generator (1.sup.st CANCELLATION PULSE GENERATION) 320, and a first delay (1.sup.st DELAY) 330.
[0047] The first CFR module 210 may sample an input original signal at a first sampling rate, detect a peak, generate a cancellation pulse to control the peak, and then output a first processed signal.
[0048] A first processed signal may be input to the sample shifter 220. The sample shifter 220 may shift or phase-delay the first processed signal for a preset time and output the first processed signal. The preset time is shorter than the period of the first sampling rate, and may correspond to, for example, half the period of the first sampling rate. The sample shifter 220 may be implemented using an FIR filter composed of a plurality of taps, and the number of FIR filter taps may vary according to the ratio of a bandwidth of the original signal to a sampling rate. In addition, FIR filter coefficients may be set so that frequency characteristics of a filter are uniform over the entire signal band so that the original signal is not distorted in a spectrum and has a mutually symmetrical value. Accordingly, as the bandwidth of the original signal is greater, the frequency characteristics needs to be maintained in a wider frequency band, so an FIR filter having a larger number of taps will be required.
[0049] Examples of configurations for implementing the function of the sample shifter 220 are shown in
[0050] The second CFR module 230 may include a second peak detector 340 (2.sup.nd PEAK DETECTION), a second cancellation pulse generator 350 (2.sup.nd CANCELLATION PULSE GENERATION), and a second delay 360 (2.sup.nd DELAY).
[0051] A signal processed by the sample shifter 220 may be input to the second CFR module 230. The second CFR module 230 may sample the input signal at a second sampling rate, detect a peak, generate a cancellation pulse to control the peak, and then output a second processed signal.
[0052] The signal input to the second CFR module 230 is a signal shifted or phase-delayed by the sample shifter 220. Thus, even if the first sampling rate and the second sampling rate are the same, the position of an original signal sampled by the second peak detector 340 may be different from the position of an original signal sampled by the first peak detector 310.
[0053] With this configuration, the communication device 200 according to the disclosure may effectively remove a peak component of the original signal even at a low sampling rate. Hereinafter, a result of removing the peak component according to the disclosure will be described with reference to
[0054]
[0055] Referring to
[0056] However, referring to
[0057]
[0058] Referring to
[0059] In addition, when second CFR processing is performed immediately after first CFR processing without the sample shifter 220 of the disclosure, it can be seen that a component exceeding the threshold still exists in a second processed signal (2.sup.nd processed without sample shift).
[0060] On the other hand, when the second CFR processing is performed after shifting or phase-delaying the first processed signal in the sample shifter 220 of the disclosure, It can be seen that the component exceeding the threshold is almost removed from a second processed signal (2.sup.nd processed with sample shift).
[0061]
[0062] Hereinafter, a CFR processing method according to an embodiment will be described with reference to
[0063] In operation S710, the communication device 200 may sample an original signal according to a preset first sampling rate and then detect a peak portion after comparing the magnitude of the sampled signal with a threshold, and may perform CFR processing to remove the detected peak portion. A first CFR-processed signal in this operation is referred to as a first processed signal.
[0064] In operation S720, the communication device 200 may shift or phase-delay the first processed signal by a preset time t.sub.shift. The preset time t.sub.shift may be a value corresponding to half of a first sampling rate. In addition, specific configurations for shifting or phase-delaying the first processed signal may vary, and detailed description thereof will be omitted.
[0065] In operation S730, the communication device 200 may sample the shifted or phase-delayed first processed signal according to a preset second sampling rate and then detect a peak portion after comparing the magnitude of the sampled signal with a threshold, and may perform second CFR processing to remove the detected peak portion. A second CFR-processed signal in this operation is referred to as a second processed signal.
[0066] The second sampling rate may be the same as the first sampling rate. Because the shifted or phase-delayed first processed signal is input, even if the second sampling rate is sampled with the same value as the first sampling rate, the sampled positions will be different from each other. Therefore, according to the disclosure, even if the first sampling rate and/or the second sampling rate is low, a peak component of the signal may be effectively removed, and FPGA LOGIC may be implemented with a low clock.
[0067] A communication device and a CFR processing method thereof according to the disclosure may effectively remove a peak component exceeding a threshold in a signal even at a low sampling rate.
[0068] In addition, the communication device and the CFR processing method thereof according to the disclosure may effectively reduce a Peak to Average Power Ratio (PAPR) even with FPGA LOGIC operating at a low clock.
[0069] Effects obtainable by the embodiments of the inventive concept are not limited to the effects described above, and other effects not described herein may be clearly understood by one of ordinary skill in the art to which the inventive concept belongs from the following description.
[0070] While the embodiments have been particularly shown and described, it will be understood by one of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims.