Epitaxial Growth Method for FDSOI Hybrid Region

Abstract

The present application discloses an epitaxial growth method for an FDSOI hybrid region, comprising: step 1, providing an FDSOI substrate structure, and forming a hard mask layer; step 2, forming a trench in the entire hybrid region, wherein the bottom surface of the trench is below or level with the top surface of the semiconductor body layer; step 3, performing oxidation to form a first oxide layer on the exposed surfaces of the semiconductor body layer and the semiconductor top layer; step 4, fully etching the first oxide layer, and forming an inner sidewall composed of the remaining first oxide layer on the side surface of the trench in a self-aligned manner; and step 5, performing epitaxial growth to form, in the trench, a semiconductor epitaxial layer in contact with the semiconductor body layer.

Claims

1. An epitaxial growth method for an FDSOI hybrid region, comprising the following steps: step 1, providing an FDSOI substrate structure, the FDSOI substrate structure comprising a semiconductor body layer, a dielectric buried layer, and a semiconductor top layer, the dielectric buried layer being formed on a surface of the semiconductor body layer, the semiconductor top layer being formed on the surface of the dielectric buried layer; and forming a hard mask layer on the surface of the semiconductor top layer; step 2, forming a trench in an entirety of the FDSOI hybrid region, wherein the hard mask layer, the semiconductor top layer, and the dielectric buried layer in the trench are completely removed, a bottom surface of the trench is below or level with a top surface of the semiconductor body layer and exposes the surface of the semiconductor body layer, and a side surface of the trench exposes the hard mask layer, the semiconductor top layer, the dielectric buried layer, and the semiconductor body layer within a depth range of the trench; step 3, performing oxidation to form a first oxide layer on exposed surfaces of the semiconductor body layer and the semiconductor top layer; step 4, fully etching the first oxide layer to completely remove the first oxide layer on the bottom surface of the trench, and forming an inner sidewall composed of a remaining first oxide layer on the side surface of the trench in a self-aligned manner; and step 5, performing epitaxial growth to form, in the trench, a semiconductor epitaxial layer in contact with the semiconductor body layer.

2. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein a material of the semiconductor body layer comprises silicon or germanium.

3. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein a material of the dielectric buried layer comprises silicon oxide or a high dielectric constant material.

4. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein a material of the semiconductor top layer comprises silicon or germanium.

5. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein a material of the semiconductor epitaxial layer comprises silicon or germanium.

6. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein the hard mask layer is formed by superimposing a first silicon oxide layer and a second silicon nitride layer.

7. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein in step 2, the FDSOI hybrid region is defined by means of a photolithography process, the trench is formed by means of an etching process, the etching process of the trench completely removes the hard mask layer, the semiconductor top layer, and the dielectric buried layer in the FDSOI hybrid region, and the etching process of the trench does not etch or partially etches the semiconductor body layer.

8. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein in step 3, a thickness of the first oxide layer is 10 Å-20 Å.

9. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein a thickness of the semiconductor top layer is less than 12 nm.

10. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein in step 4, the first oxide layer is fully etched by means of a dry etching process.

11. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein after the epitaxial growth in step 5 is completed, the top surface of the semiconductor epitaxial layer is level with the top surface of the semiconductor top layer.

12. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein in step 5, the epitaxial growth of the semiconductor epitaxial layer is performed by means of an RPCVD process.

13. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein the surface of the semiconductor epitaxial layer in the FDSOI hybrid region is used to form a passive device or a pickup structure that needs to be connected to the semiconductor body layer.

14. The epitaxial growth method for the FDSOI hybrid region according to claim 1, wherein the semiconductor top layer outside the FDSOI hybrid region is used to form a CMOS device.

15. The epitaxial growth method for the FDSOI hybrid region according to claim 14, wherein the CMOS device comprises a PMOS device and an NMOS device.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The present application is described in detail below with reference to the drawings and specific implementations.

[0030] FIG. 1 is a schematic diagram of a device structure obtained after an existing epitaxial growth method for an FDSOI hybrid region is completed.

[0031] FIG. 2 is a flowchart of an epitaxial growth method for an FDSOI hybrid region according to an embodiment of the present application.

[0032] FIGS. 3A-3E are schematic diagrams of device structures in steps of the epitaxial growth method for an FDSOI hybrid region according to an embodiment of the present application.

DETAILED DESCRIPTION OF THE DISCLOSURE

[0033] FIG. 2 is a flowchart of an epitaxial growth method for an FDSOI hybrid region according to an embodiment of the present application. FIGS. 3A-3E are schematic diagrams of device structures in steps of the epitaxial growth method for an FDSOI hybrid region according to an embodiment of the present application. The epitaxial growth method for an FDSOI hybrid region according to this embodiment of the present application includes the following steps:

[0034] Step 1. Referring to FIG. 3A, an FDSOI substrate structure is provided, the FDSOI substrate including a semiconductor body layer 201, a dielectric buried layer 202, and a semiconductor top layer 203, the dielectric buried layer 202 being formed on the surface of the semiconductor body layer 201, the semiconductor top layer 203 being formed on the surface of the dielectric buried layer 202; and a hard mask layer 204 is formed on the surface of the semiconductor top layer 203.

[0035] In this embodiment of the present application, the material of the semiconductor body layer 201 is silicon. In other embodiments, the material of the semiconductor body layer 201 may be germanium or a combination of germanium and silicon.

[0036] The material of the dielectric buried layer 202 includes silicon oxide or a high dielectric constant material.

[0037] The material of the semiconductor top layer 203 includes silicon. In other embodiments, the material of the semiconductor top layer 203 may be germanium or a combination of germanium and silicon.

[0038] The thickness of the semiconductor top layer 203 is less than 12 nm.

[0039] The hard mask layer 204 is formed by superimposing a first silicon oxide layer and a second silicon nitride layer.

[0040] Step 2. Referring to FIG. 3B, a trench is formed in the entire hybrid region, wherein the hard mask layer 204, the semiconductor top layer 203, and the dielectric buried layer 202 in the trench are completely removed, the bottom surface 2051 of the trench is below or level with the top surface of the semiconductor body layer 201 and exposes the surface of the semiconductor body layer 201, and the side surface 2052 of the trench exposes the hard mask layer 204, the semiconductor top layer 203, the dielectric buried layer 202, and the semiconductor body layer 201 within the depth range of the trench.

[0041] In this embodiment of the present application, the hybrid region is defined by means of a photolithography process, the trench is formed by means of an etching process, the etching process of the trench completely removes the hard mask layer 204, the semiconductor top layer 203, and the dielectric buried layer 202 in the hybrid region, and the etching process of the trench does not etch or partially etches the semiconductor body layer 201. For example, when the bottom surface 2051 of the trench is level to the top surface of the semiconductor body layer 201, the etching process of the trench does not need to etch the semiconductor body layer 201; and when the bottom surface 2051 of the trench is lower than the top surface of the semiconductor body layer 201, the etching process of the trench needs to etch the semiconductor body layer 201.

[0042] Step 3. Referring to FIG. 3C, oxidation is performed to form a first oxide layer on the exposed surfaces of the semiconductor body layer 201 and the semiconductor top layer 203, wherein the first oxide layer located on the bottom surface 2051 of the trench is separately marked with a mark 2061, and the first oxide layer located on the side surface 2052 of the trench is separately marked with a mark 2062.

[0043] Referring to FIG. 3C, since a region exposed at the bottom surface 2051 of the trench consists of the surface of the semiconductor body layer 201, the bottom surface 2051 of the trench may be completely oxidized. Only the side surface 2052 of the trench on the exposed surfaces of the semiconductor body layer 201 and the semiconductor top layer 203 is oxidized.

[0044] In this embodiment of the present application, the thickness of the formed first oxide layer is 10A-20A.

[0045] Step 4. Referring to FIG. 3D, the first oxide layer is fully etched to completely remove the first oxide layer 2061 on the bottom surface 2051 of the trench, and an inner sidewall composed of the remaining first oxide layer 2062 on the side surface 2052 of the trench in a self-aligned manner.

[0046] In this embodiment of the present application, the first oxide layer is fully etched by means of a dry etching process.

[0047] Step 5. Referring to FIG. 3E, epitaxial growth is performed to form, in the trench, a semiconductor epitaxial layer 207 in contact with the semiconductor body layer 201.

[0048] In this embodiment of the present application, the material of the semiconductor epitaxial layer 207 includes silicon. In other embodiments, the material of the semiconductor epitaxial layer 207 may be germanium or a combination of germanium and silicon.

[0049] After the epitaxial growth in step 5 is completed, the top surface of the semiconductor epitaxial layer 207 is level with the top surface of the semiconductor top layer 201. In an example, the epitaxial growth of the semiconductor epitaxial layer 207 is performed by means of an RPCVD process.

[0050] The surface of the semiconductor epitaxial layer 207 in the hybrid region is used to form a passive device or a pickup structure that needs to be connected to the semiconductor body layer 201.

[0051] The semiconductor top layer 203 outside the hybrid region is used to form a CMOS device. The CMOS device includes a PMOS device and an NMOS device. Since the semiconductor top layer 203 is an ultra-thin layer, the short channel effect of the PMOS device and the NMOS device can be improved, thus improving the performance of the PMOS device and the NMOS device.

[0052] In the present application, before the formation of the trench in the hybrid region and the epitaxial growth, an added oxidation process and a full etching process for the first oxide layer formed by the oxidation form the inner sidewall on the side surface 2052 of the trench. The inner sidewall can eliminate the growth of an epitaxial layer from the side surface of the semiconductor top layer 203 exposed in the trench, so as to ensure that the epitaxial growth occurs strictly from bottom to top, thereby eliminating a protrusion defect in the semiconductor epitaxial layer 207 at the boundary of the hybrid region and eventually improving the flatness of the surface of the semiconductor epitaxial layer 207.

[0053] In addition, the oxidation process oxidizes only the exposed semiconductor layers, so that the first oxide layer can be formed on the surfaces of the semiconductor top layer 203 and the semiconductor body layer 201 in a self-aligned manner and the thickness of the first oxide layer can be controlled to be very thin. In this case, the formed inner sidewall does not occupy an additional space and thus does not change the morphology of the semiconductor epitaxial layer 207, so that a bottom-to-top growth mode of the epitaxial growth is not affected. Therefore, the formation process for the inner sidewall in this embodiment of the present application does not produce new adverse effects on the epitaxial growth, eventually improving the overall process.

[0054] The present application is described in detail above via specific embodiments, which, however, are not intended to limit the present application. Without departing from the principles of the present application, those skilled in the art can also make many modifications and improvements, which should also be regarded as the protection scope of the present application.