Anisotropic Etching Using Highly Branched Polymers

Abstract

An etching composition for etching an electrically conductive layer structure for forming a conductor track is provided. The etching composition includes an etchant, a highly branched compound and optionally a solvent. In addition, a method of etching an electrically conductive layer structure, a conductor track, an arrangement of at least two conductor tracks, and a component carrier are provided.

Claims

1. An etching composition for etching an electrically conductive layer structure for forming a conductor track, the etching composition comprising: an etchant; a highly branched compound; and optionally a solvent.

2. The etching composition according to claim 1, wherein the etchant comprises at least one of cupric chloride (CuCl.sub.2) and ferric chloride (FeCl.sub.3).

3. The etching composition according to claim 1, wherein the highly branched compound is selected from the group consisting of hyperbranched polymers, dendrons, dendrimers and multifunctional polyethylene glycols.

4. The etching composition according to claim 1, wherein the highly branched compound comprises at least one of an amine functional group and/or a thiol functional group.

5. The etching composition according to claim 1, wherein the highly branched compound is permeable for the etchant.

6. The etching composition according to claim 1, further comprising: an etching inhibitor having a larger sizer than a size of the etchant and/or a larger size than a space between neighboring branches of the highly branched compound.

7. The etching composition according to claim 1, further comprising: a wetting additive.

8. The etching composition according to claim 1, further comprising: a rheological additive.

9. The etching composition according to claim 8, wherein the rheological additive is selected from the group consisting of silica, hydroxyethyl cellulose, phyllosilicates and urea.

10. A method of etching an electrically conductive layer structure of a component carrier for forming a conductor track, the method comprising: providing an electrically conductive layer structure; and subjecting the electrically conductive layer structure to an etching composition having an etchant, a highly branched compound and optionally a solvent.

11. The method according to claim 10, wherein the electrically conductive layer structure is made subject to a subtractive etching procedure for forming the conductor track.

12. A conductor track having a substantially rectangular cross-section, wherein a ratio between the cross-sectional area of an upper third (A1) and the cross-sectional area of a central third (A2) is in a range between 0.8 and 1.2 and a ratio between the cross-sectional area of the central third (A2) and the cross-sectional area of a lower third (A3) is in a range between 0.8 and 1.2.

13. An arrangement of a first conductor track and a laterally directly neighboring second conductor track both having a substantially rectangular cross-section, wherein a ratio between a distance (A) between upper plateaus of the conductor tracks and a distance (B) between lower ends of the conductor tracks is in a range between 0.7 and 1.3.

14. A component carrier, comprising: a stack of at least one electrically insulating layer structure and at least one electrically conductive layer structure, wherein at least a part of at least one electrically conductive layer structure comprises a conductor track having a substantially rectangular cross-section, wherein a ratio between the cross-sectional area of an upper third (A1) and the cross-sectional area of a central third (A2) is in a range between 0.8 and 1.2 and a ratio between the cross-sectional area of the central third (A2) and the cross-sectional area of a lower third (A3) is in a range between 0.8 and 1.2; and/or an arrangement of a first conductor track and a laterally directly neighboring second conductor track both having a substantially rectangular cross-section, wherein a ratio between a distance (A) between upper plateaus of the conductor tracks and a distance (B) between lower ends of the conductor tracks is in a range between 0.7 and 1.3.

15. The component carrier according to claim 14, wherein at least one of the following applies: the component carrier further comprises a component mounted on and/or embedded in the at least one electrically insulating layer structure and/or the at least one electrically conductive layer structure, wherein the component is selected from a group consisting of an electronic component, an electrically non-conductive and/or electrically conductive inlay, a heat transfer unit, an energy harvesting unit, an active electronic component, a passive electronic component, an electronic chip, a storage device, a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter, a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, an actuator, a microelectromechanical system, a microprocessor, a capacitor, a resistor, an inductance, an accumulator, a switch, a camera, an antenna, a magnetic element, a further component carrier and a logic chip; and/or the at least one electrically conductive layer structure comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, and tungsten, any of the mentioned materials being optionally coated with supra-conductive material such as graphene and/or the at least one of the electrically insulating layer structure comprises at least one of the group consisting of resin, reinforced or non-reinforced resin, epoxy resin or Bismaleimide-Triazine resin, FR-4, FR-5, cyanate ester, polyphenylene derivate, glass, prepreg material, polyimide, polyamide, liquid crystal polymer, epoxy-based Build-Up Film, polytetrafluoroethylene, a ceramic, and a metal oxide; and/or the component carrier is shaped as a plate; and/or the component carrier is configured as one of the group consisting of a printed circuit board, and a substrate; and/or the component carrier is configured as a laminate-type component carrier.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0076] FIG. 1 illustrates a conventional isotropic copper etching process according to the prior art.

[0077] FIG. 2 illustrates an ideal anisotropic copper etching process according to an exemplary embodiment of the invention.

[0078] FIG. 3 illustrates a photolithographic structuring of an electrically conductive layer structure of a component carrier by means of a photoresist involving a subtractive etching process according to an exemplary embodiment of the invention.

[0079] FIG. 4 represents an enlarged view of the etching step shown in FIG. 3 according to an exemplary embodiment of the invention.

[0080] FIG. 5 illustrates a cross-sectional view of a conductor track according to an exemplary embodiment of the invention.

[0081] FIG. 6 illustrates a cross-sectional view of an arrangement of conductor tracks according to an exemplary embodiment of the invention.

DETAILED DESCRIPTION OF ILLUSTRATED EMBODIMENTS

[0082] The aspects defined above and further aspects of the invention are apparent from the exemplary embodiments to be described hereinafter and are explained with reference to these exemplary embodiments.

[0083] The illustrations in the drawings are schematically presented. In different drawings, similar or identical elements are provided with the same reference signs.

[0084] Before, referring to the drawings, exemplary embodiments will be described in further detail, some basic considerations will be summarized based on which exemplary embodiments of the invention have been developed.

[0085] According to an exemplary embodiment of the invention, an etching composition is provided comprising a highly branched compound which promotes an anisotropic etching of an electrically conductive layer structure so that conductor tracks may be formed having a substantially regular shape, in particular with substantially vertical side walls. Without wishing to be bound to any theory, it is believed that the various branches of the highly branched compound render the compound very space-consuming thereby providing a steric hinder effect so that the highly branched compound may not reach (or is at least limited in reaching) the bottom of a recess formed in the electrically conductive layer structure during etching (i.e. an etched structure), but it may be stuck between the side walls of the etched structure, thereby protecting or shielding the side walls from the etchant and suppressing a further etching in a lateral direction. In addition, it is believed that small etchant molecules may pass through the highly branched compound and may thus reach the bottom of the etched structure thereby promoting that the etching proceeds in a vertical direction. It may even be possible that a concentration gradient of the etchant occurs within the recess formed in the electrically conductive layer structure during etching wherein the concentration of the etchant near the bottom is higher than the concentration of the etchant at the top or in the middle of the etched structure. As a result, an anisotropic etching may be achieved. The anisotropy of the etching may be further increased by adding an etching inhibitor to the etchant composition which may not pass through the highly branched compound. Hereby, a further etching at the side walls of the etched structure (i.e. in a lateral direction) may be substantially prevented (avoiding the formation of undercuts), whereas the etching at the bottom of the etched structure (i.e. in a vertical direction) is not inhibited. The highly branched compound may thus act as a filter or semipermeable barrier causing a concentration gradient of the etchant (with a higher concentration thereof at the bottom rather than at the top of the etched structure) and an opposite (or inverse) concentration gradient of an etching inhibitor (with a higher concentration thereof at the top rather than at the bottom of the etched structure) so that the etching mainly proceeds in a vertical direction rather than in a lateral direction. As a result, the overall quality of a component carrier, such as a printed circuit board, may be increased, in particular in terms of a decreased defect rate as well as an improved etching distribution (increased homogeneity) within the produced boards and a higher etching factor of etched structures. In addition, a line width lower than 50 m, such as 30 m or less, may be achieved.

[0086] An ideal anisotropic etching process is shown in FIG. 2, wherein the etching exclusively occurs in the vertical direction, but not in the lateral direction of the PCB so that no undercuts are formed.

[0087] FIG. 3 illustrates a photolithographic structuring of an electrically conductive layer structure of a component carrier by means of a photoresist involving a subtractive etching process according to an exemplary embodiment of the invention. In a first step, a laminate or stack of an electrically insulating layer structure (such as made of a dielectric) and an electrically conductive layer structure (such as made of copper) to be etched is provided. Next, a photoresist layer is applied on the electrically conductive layer structure. Then, the photoresist is partly exposed (through a mask, not shown) to electromagnetic radiation (such as UV light) and developed, thereby removing that part of the photoresist that has been exposed to the electromagnetic radiation. In the next step, a subtractive etching step according to an exemplary embodiment of the method of etching of the invention is performed (highlighted by a frame). Hereby, the electrically conductive layer structure is anisotropically etched so that the side walls of a recess formed in the electrically conductive layer structure are substantially vertical, even though a slight undercut beneath the photoresist is shown in FIG. 3. Finally, the remaining photoresist (such as that part of the photoresist that has not been exposed to the electromagnetic radiation before) is removed, for instance stripped off, and an arrangement of conductor tracks according to an exemplary embodiment of the invention on the dielectric is obtained.

[0088] FIG. 4 represents an enlarged view of the etching step highlighted by the frame in FIG. 3 according to an exemplary embodiment of the invention. The etching composition shown in FIG. 4 comprises active particles (i.e., an etchant) and branched polymers with active centers (i.e., a highly branched compound). As can be taken from FIG. 4, the highly branched compound is very bulky or space-consuming so that it may not reach the bottom of a recess formed in the electrically conductive layer structure during etching. Rather, in the embodiment shown in FIG. 4, the highly branched compound is stuck between the side walls of the etched structure. In addition, the highly branched compound adheres to a side wall surface of the recess via interaction between active centers (such as an amine functional group and/or a thiol functional group) of the highly branched compound and the side wall surface. As a result, the highly branched compound may effectively shield and protect the side walls from the etchant and suppress a further etching in a lateral direction. On the other hand, the active particles may pass through the highly branched compound and may thus reach the bottom of the etched structure where they come in contact with a bottom surface and exert their etching activity there. As a result, the etching proceeds in a vertical direction. As further shown in FIG. 4, a concentration gradient of the etchant is formed within the etched structure with a higher concentration of the etchant near the bottom compared to the concentration of the etchant at the top or in the middle of the etched structure.

[0089] Referring to FIG. 5, a cross-sectional view of a conductor track having a substantially rectangular cross-section according to an exemplary embodiment of the invention is shown. In particular, the cross-sectional view shown in FIG. 5 is a cross-sectional view in vertical direction of the conductor track, i.e. a view of the conductor track when cut in a vertical direction. In addition, as depicted in FIG. 5, the conductor track is horizontally subdivided in three thirds of equal heights. As a result, a cross-sectional area of an upper third (A1), a cross-sectional area of a central third (A2) and a cross-sectional area of a lower third (A3) are obtained. The conductor track according to an exemplary embodiment is characterized by a ratio between the cross-sectional area of the upper third (A1) and the cross-sectional area of a central third (A2) being in a range between 0.8 and 1.2 and a ratio between the cross-sectional area of the central third (A2) and the cross-sectional area of the lower third (A3) being in a range between 0.8 and 1.2. In an embodiment, the conductor track may be further characterized by a ratio between the cross-sectional area of the upper third (A1) and the cross-sectional area of the lower third (A3) being in a range between 0.7 and 1.3.

[0090] Referring to FIG. 6, a cross-sectional view of an arrangement of conductor tracks according to an exemplary embodiment of the invention is shown. In particular, the cross-sectional view shown in FIG. 6 is a cross-sectional view in vertical direction of the arrangement of conductor tracks, i.e., a view when the conductor tracks were cut in a vertical direction. FIG. 6 depicts a first conductor track (for instance the conductor track on the left) and a second conductor track (for instance the conductor track on the right). FIG. 6 further depicts an arrowed line, A, representing a distance between upper plateaus of the conductor tracks and an arrowed line, B, representing a distance between lower ends of the conductor tracks. The arrangement of conductor tracks according to an exemplary embodiment is characterized by a ratio between the distance A between upper plateaus of the conductor tracks and the distance B between lower ends of the conductor tracks being in a range between 0.7 and 1.3. The distance A and/or the distance B may be for instance lower than 50 m, such as 30 m or less.

[0091] It should be noted that reference signs in the claims shall not be construed as limiting the scope of the claims.

[0092] Implementation of the invention is not limited to the preferred embodiments shown in the figures and described above. Instead, a multiplicity of variants are possible which use the solutions shown and the principle according to the invention even in the case of fundamentally different embodiments.