Polishing pad for wafer polishing apparatus and manufacturing method therefor
11534889 · 2022-12-27
Assignee
Inventors
Cpc classification
B24B37/013
PERFORMING OPERATIONS; TRANSPORTING
B24B37/26
PERFORMING OPERATIONS; TRANSPORTING
International classification
B24B37/26
PERFORMING OPERATIONS; TRANSPORTING
B24B37/22
PERFORMING OPERATIONS; TRANSPORTING
Abstract
The present invention provides a polishing pad for a wafer polishing apparatus, comprising: an upper pad having a front surface part, which has a cut surface and is in contact with a wafer, a rear surface part positioned on the lower part of the front surface part, and a plurality of grid grooves passing through the front surface part and the rear surface part; a lower pad, which is arranged on the lower part of the upper pad and can be attached to a surface plate; and an adhesion part positioned between the upper pad and the lower pad to couple the upper pad with the lower pad.
Claims
1. A method of manufacturing a polishing pad for a wafer polishing apparatus, the method comprising: a film coating step of coating a film on a nap layer; a grooving step of forming grooves in a back portion of the nap layer; a lamination step of bonding a non-woven fabric layer to the back portion of the nap layer; and a buffing step of buffing a front portion of the nap layer to epose the grooves.
2. The method according to claim 1, wherein the grooving step is performed through hot pressing processing.
3. The method according to claim 2, wherein in the lamination step, the nap layer and the non-woven fabric layer are combined using an adhesive or an adhesive tape.
4. The method according to claim 3, wherein in the buffing step, the front portion of the the nap layer in which edges of the grooves are included is cut such that the exposed grooves have a side section in which a bottom length is greater than a top length.
5. The method according to claim 1, wherein after the buffing step, a cutting step of cutting a polishing pad to an arbitrary size and shape is further performed.
6. The method according to claim 5, wherein before the film coating step, a mixing step of mixing raw materials of the nap layer is performed.
Description
DESCRIPTION OF DRAWINGS
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BEST MODE
(13) Hereinafter, embodiments will be elucidated via description thereof with reference to the accompanying drawings. In the following description of the embodiments, it will be understood that, when an element such as a layer (film), region, pattern, or structure is referred to as being “on” or “under” another element such as a substrate, layer (film), region, pad, or pattern, it can be “directly” on or under the other element, or can be “indirectly” formed such that an intervening element may also be present. In addition, it will also be understood that the criteria for “on” or “under” is on the basis of the drawing.
(14) In the drawings, elements may be exaggerated in size, omitted, or schematically illustrated for convenience in description and clarity. Further, the sizes of elements do not indicate the actual sizes of the elements. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same parts. Hereinafter, embodiments will be described with reference to the accompanying drawings.
(15)
(16) As shown in
(17) The upper pad 110 is a part that forms an upper layer of the polishing pad 100 and is in contact with a wafer to polish the same. In more detail, the upper pad 110 may include a front portion, a back portion, and a plurality of grid grooves 112. Here, the front portion and the back portion of the upper pad 110 may be coated with a film in which various raw materials are mixed.
(18) The front portion may have a horizontal cut surface 102 from which a film-coated surface is removed. The cut surface 102 may be formed through buffing processing, which will be described later.
(19) The back portion may be attached to the adhesive part 130 in the state of being coated with the film.
(20) The grid grooves 112 may be arranged at regular intervals in the upper pad 110 in a form such that they penetrate the front portion and the back portion. For example, the grid grooves 112 may be arranged in the shape shown in
(21) The grid grooves 112 may have a side section in which the bottom length b is greater than the top length a. That is, the grid grooves 112 may be formed such that the size of the entrance area contacting a wafer W is less than the size of the bottom surface area. The grid grooves 112 may be formed to have any of various sectional shapes in which the entrance area is smaller than the bottom surface area.
(22) For example, as shown in
(23) The trapezoidal-shaped grid grooves 112 may exhibit effects of securing the smooth flow of slurry on the surface of the upper pad 110 and minimizing surface tension with respect to the wafer. In addition, since the front portion of each grid groove 112, i.e. the entrance contacting a wafer W, is narrower than the back portion (or the bottom surface), it is possible to minimize the discharge of impurities present in the back areas of the grid grooves 112 to the surface of the upper pad 110 and thus prevent the impurities from contaminating the wafer or adversely affecting the flatness of the wafer.
(24) In addition, since the inner walls of the grid grooves 112 are coated with a film, the flow of the slurry may be further increased, and the generation of impurities may be reduced during the process of forming the grid grooves 112.
(25) The above-described upper pad 110 forms one layer in which the grid grooves 112 are formed, and thus may be referred to as a nap layer of the polishing pad 100. The nap layer 110 may include a porous suede material so as to have excellent performance in removing defects from a wafer and prevent the occurrence of defects.
(26) The lower pad 120 may be disposed below the upper pad 110 described above, and may be attached to the surface plate. The lower pad 120 may be referred to as a non-woven fabric layer of the polishing pad 100. The lower pad 120 may be coupled to the upper pad 110, and may support the upper pad 110 so that the upper pad 110 functions stably.
(27) The adhesive part 130 may be located between the upper pad 110 and the lower pad 120, and may combine the upper pad 110 and the lower pad 120. For example, the adhesive part 130 may be an adhesive or an adhesive tape to which the back portion of the upper pad 110 and the front portion of the lower pad 120 are attached.
(28) The polishing pad 100 for a wafer polishing apparatus of the embodiment having the above-described configuration may solve a problem in which a wafer is not readily separated after a polishing process by securing the smooth flow of slurry and minimizing surface tension using the grid grooves 112, which have a relatively narrow entrance and a relatively wide bottom (e.g. have a trapezoidal shape). In addition, it is possible to prevent reduced flatness of a wafer or degradation in LLS quality attributable to impurities during a wafer polishing process.
(29) Hereinafter, a method of manufacturing the polishing pad 100 according to an embodiment of the present invention and the above-described structure of the polishing pad 100 will be described in more detail. Hereinafter, the upper pad 110 and the lower pad 120 of the polishing pad 100 will be referred to as a nap layer 110 and a non-woven fabric layer 120.
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(31) As shown in
(32) In the mixing step (S100), a nap layer 110 including a porous suede material may be manufactured by appropriately mixing the raw materials for forming the nap layer 110.
(33) Subsequently, a film coating step (S200) of coating a film on the nap layer 110 may be performed. The film coating step (S200), as shown in
(34) Subsequently, a grooving step (S300) of forming wedge grooves 101 in the back portion of the nap layer 110 may be performed. The grooving step (S300), as shown in
(35) In the embodiment, the grid grooves 112 of the polishing pad 100 may be formed by preferentially forming the wedge grooves 101 (refer to
(36) As shown in
(37) After the grooving step (S300), a lamination step (S400) of bonding the nap layer 110 and the non-woven fabric layer 120 may be performed. The lamination step (S400), as shown in
(38) After the lamination step (S400), a buffing step (S500) of buffing the front portion of the nap layer 110 is performed. The buffing step (S500) is a process of removing the surface of the nap layer 110. In the buffing step (S500), as shown in
(39) Here, the cut surface 102 may be referred to as a buffed surface. According to the embodiment, the nap layer 110, which has the cut surface 102 at the front portion thereof, may solve the problems with the front portion formed through the conventional hot press processing, in which a portion adjacent to the grooves G is thermally deformed. Therefore, the polishing pad 100 according to the embodiment, which has the cut surface 102 at the front portion thereof, does not have a thermally deformed surface, thereby preventing direct contact between a wafer and a thermally deformed layer when contacting the wafer during the polishing process, reducing over-polishing of the side surface of the wafer, and consequently improving polishing quality.
(40) When the buffing step (S500) is completed, as shown in
(41) The grid grooves 112 having the above-described shape may exhibit effects of securing the smooth flow of slurry on the surface of the upper pad 110 and minimizing surface tension with respect to the wafer. In addition, since the entrance of the front portion of each grid groove 112 is narrower than the back portion, it is possible to minimize the discharge of impurities present in the back area of each grid groove 112 to the surface of the upper pad 110, thus preventing the impurities from contaminating the wafer or adversely affecting the flatness of the wafer.
(42) In addition, since the inner walls of the grid grooves 112 are coated with a film, the flow of the slurry may be further increased, and the generation of impurities may be reduced during the process of forming the grid grooves 112.
(43) After the buffing step (S500), a cutting step (S600) of cutting the polishing pad 100 to an arbitrary size and shape may be performed. In the cutting step (S600), the polishing pad 100 may be cut on a sheet-by-sheet basis so as to have an arbitrary size and shape. For example, in the cutting step (S600), the edge of the polishing pad 100 may be cut so that the polishing pad 100 has a circular-shaped, elliptical-shaped, or rectangular-shaped section. Subsequently, a quality inspection step (S700) of inspecting the quality of the manufactured polishing pad 100 may be performed.
(44) As described above, according to the polishing pad 100 for a wafer polishing apparatus and the manufacturing method therefor of the present invention, the trapezoidal-shaped grid grooves 112 may secure the smooth flow of slurry, may mitigate excessive surface tension with respect to a wafer, and may prevent reduced flatness of a wafer or degradation in LLS quality attributable to impurities during a wafer polishing process.
(45) The features, structures, effects, and the like described in association with the embodiments above are incorporated into at least one embodiment of the present invention, but are not limited only to the one embodiment. Furthermore, the features, structures, effects, and the like exemplified in association with respective embodiments can be implemented in other embodiments by combination or modification by those skilled in the art. Therefore, contents related to such combinations and modifications should be construed as falling within the scope of the present invention.
INDUSTRIAL APPLICABILITY
(46) The polishing pad for a wafer polishing apparatus and the manufacturing method therefor of the embodiments may be used for a process of manufacturing a silicon wafer.