Signal processing systems and signal processing methods

Abstract

It is provided a signal processing system, comprising at least a first, a second and a third digital-to-analog converter (DAC); a processing unit configured for splitting a sampled signal into a first and a second signal corresponding to different frequency portions of the sampled signal, transmitting the first signal to the first DAC, splitting the second signal into a first and a second subsignal and transmitting the first subsignal to the second DAC and the second subsignal to the third DAC, the first subsignal corresponding to the real part of the second signal and the second subsignal corresponding to the imaginary part of the second signal; an IQ mixer configured for mixing an analog output signal of the second DAC and an analog output signal of the third DAC and a combiner for combining an analog output signal of the first DAC and an output signal of the IQ mixer.

Claims

1. A signal processing system, comprising at least a first, a second and a third digital-to-analog converter (DAC); a processing unit configured for splitting a sampled signal into at least a first and a second signal corresponding to different frequency portions of the sampled signal, transmitting the first signal to the first DAC, splitting the second signal into a first and a second sub signal and transmitting the first sub signal to the second DAC and the second subsignal to the third DAC, the first subsignal corresponding to the real part of the second signal and the second sub signal corresponding to the imaginary part of the second signal; an IQ mixer configured for mixing an analog output signal of the second DAC and an analog output signal of the third DAC; a combiner for combining an analog output signal of the first DAC and an output signal of the IQ mixer.

2. The system as claimed in claim 1, wherein the frequency portion that corresponds to the first signal comprises lower frequencies than the frequency portion that corresponds to the second signal.

3. The system as claimed in claim 1, wherein the processing unit is configured for carrying out the splitting of the sampled signal into the first and the second signal in the frequency domain.

4. The system as claimed in claim 1, wherein the processing unit is configured for carrying out the splitting of the sampled signal into the first and the second signal in the time domain.

5. The system as claimed in claim 1, wherein the processing unit is configured for carrying out a Fourier transform of the second signal for generating the first and the second subsignal.

6. The system as claimed in claim 1, further comprising at least one low pass filter for filtering the outputs of the DACs and/or a band pass or a low pass or a high pass filter for filtering the output of the IQ mixer.

7. The system as claimed in claim 1, wherein the processing unit is realized by a digital signal processor.

8. The system as claimed in claim 1, wherein the IQ mixer is configured for single sideband modulation.

9. The system as claimed in claim 1, wherein the IQ mixer is realized by an opto-electronic modulator.

10. A signal processing method, in particular using the system according to claim 1, the method comprising the steps of: providing at least a first and a second digital-to-analog converter (DAC); splitting a sampled signal into at least a first and a second signal corresponding to different frequency portions of the sampled signal by means of a processing unit; pre-equalizing the first and the second signal; converting the pre-equalized first signal into a first analog signal using the first DAC; converting the pre-equalized second signal into a second analog signal using the second DAC; combining the first and the second analog signal using a combiner, wherein the processing unit, the first DAC and the combiner define a first processing channel, wherein the processing unit, the second DAC and the combiner define a second processing channel, wherein the pre-equalized first signal is generated by processing the first signal in such a way that the pre-equalized first signal compensates cross talk between the first and the second processing channel, and/or the pre-equalized second signal is generated by processing the second signal in such a way that the pre-equalized second signal compensates cross talk between the first and the second processing channel.

11. The method as claimed in claim 10, wherein generating the pre-equalized first and second signal is carried out using the results of a calibration measurement with respect to at least a spatial, frequency and/or time portion of the first and/or the second processing channel.

12. The method as claimed in claim 11, wherein the calibration measurement is carried out using a channel estimation scheme with respect to the first and/or the second processing channel.

13. The method as claimed in claim 12, wherein the channel estimation scheme comprises treating the combination of the first and the second processing channel as a MIMO system.

14. The method as claimed in claim 13, wherein the calibration measurement comprises determining coefficients of a frequency response matrix related to the MIMO system.

15. The method as claimed in claim 12, wherein the channel estimation scheme comprises transmitting a channel estimation sequence to the first and/or the second DAC.

16. The method as claimed in claim 15, wherein a first channel estimation sequence is transmitted to the first DAC and a second channel estimation sequence is transmitted to the second DAC, wherein the first channel estimation sequence is distinguishable from the second channel estimation sequence.

17. The method as claimed in claim 11, wherein the calibration measurement comprises an S- and/or X-parameter measurement of at least a part of an analog section of the first and/or the second processing channel.

18. The method as claimed in claim 10, wherein the pre-equalized first and second signal are generated adaptively by means of the results of re-calibration measurements carried out using a portion of an analog signal produced by the combiner.

19. The method as claimed in claim 10, further comprising creating an oversampled first signal and converting the oversampled first signal by the first DAC in order to obtain the first analog signal and/or creating an oversampled second signal and converting the oversampled second signal by the second DAC in order to obtain the second analog signal.

20. A signal processing system, in particular for carrying out the method according to claim 10, the system comprising: a processing unit configured for splitting a sampled signal into at least a first and a second signal corresponding to different frequency portions of the sampled signal; a pre-equalizing unit for pre-equalizing the first and the second signal; at least a first digital-to-analog converter (DAC) for converting the pre-equalized first signal into a first analog signal and a second DAC for converting the pre-equalized second signal into a second analog signal; a combiner for combining the first and the second analog signal, wherein the processing unit, the first DAC and the combiner define a first processing channel, wherein the processing unit, the second DAC and the combiner define a second processing channel, wherein pre-equalizing unit is configured for generating the pre-equalized first signal by processing the first signal in such a way that the pre-equalized first signal compensates cross talk between the first and the second processing channel, and/or for generating the pre-equalized second signal by processing the second signal in such a way that the pre-equalized second signal compensates cross talk between the first and the second processing channel.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Embodiments of the invention are described hereinafter with reference to the drawings.

(2) FIG. 1 shows a block diagram of a signal processing system according to an embodiment of the invention.

(3) FIG. 2 shows a modification of FIG. 1.

(4) FIG. 3 shows a diagram illustrating an embodiment of a signal processing method according to the invention.

(5) FIG. 4 shows a block diagram of the system of FIG. 1 showing spectra at specific positions of the system.

(6) FIG. 5 shows a diagram illustrating portions of the received frequency spectra.

(7) FIG. 6 shows a diagram illustrating components of the received frequency spectra.

(8) FIG. 7 shows a block diagram illustrating the MIMO model.

(9) FIG. 8 shows a block diagram of a signal processing system according to another embodiment of the invention.

(10) FIG. 9 shows a modification of FIG. 8.

(11) FIG. 10 shows a diagram illustrating the spectral splitting scheme using the system of FIG. 8 or 9.

(12) FIG. 11 shows possible implementations of the DACs.

(13) FIG. 12 shows a block diagram illustrating a calibration setup.

(14) FIG. 13 shows different realizations of a channel identification system.

(15) FIG. 14 shows a diagram illustrating channel estimation schemes.

(16) FIG. 15 shows a modification of FIG. 14.

(17) FIG. 16 shows another modification the channel estimation scheme.

(18) FIG. 17 shows a diagram illustrating MIMO digital signal processing.

(19) FIG. 18 shows a diagram further illustrating MIMO digital signal processing.

(20) FIG. 19 shows the concept of raised cosine filtering.

(21) FIG. 20 shows the frequency response of raised cosine frequency domain filters and brickwall filters, respectively.

(22) FIG. 21 shows a diagram illustrating another embodiment of a signal processing method according to the invention.

(23) FIG. 22 shows a block diagram of the system of FIG. 1 showing spectra at specific positions of the system when carrying out the method illustrated in FIG. 21.

DETAILED DESCRIPTION

(24) FIG. 1 depicts a signal processing system 1 according to an embodiment of the invention. The system 1 comprises a processing unit 21 and a digital signal processor 22. Further, the system comprises a first and a second digital-to-analog converter (DAC) 31, 32 and a combiner 4.

(25) The processing unit 21 receives a sampled input signal d(n) and splits the sampled signal d(n) into a first and a second signal d.sub.1(n), d.sub.2(n) corresponding to different frequency portions of the sampled signal. The digital signal processor 22 realizes a pre-equalizing unit 220 generating a pre-equalized first signal x.sub.1(n) and a pre-equalized second signal x.sub.2(n) by processing the first signal d.sub.1(n) and the second signal d.sub.2(n) preferably jointly. The pre-equalized first and second signals x.sub.1(n), x.sub.2(n) are converted into a first and a second analog signal s.sub.1(t) and s.sub.2(t) by means of the first and the second DAC 31, 32, respectively. Of course, the processing unit 21 might also be realized by the digital signal processor 22.

(26) After analog filtering (using filters 51, 52, 53) and upmixing the second analog signal s.sub.2(t) (using a mixer 6 comprising a local oscillator 61) the final analog signals s.sub.1(t) and s.sub.2(t) are created. The finalized analog signals s.sub.1(t) and s.sub.2(t) are combined with the combiner 4 to produce the combined output signal s(t). The operation of the processing system 1 is also illustrated in FIG. 3.

(27) The processing unit 21, the first DAC 31 and the combiner 4 define a first processing channel 101, while the processing unit 21, the second DAC 32 and the combiner 4 define a second processing channel 102. It is noted that the filters 51, 52, 53 might be part of the processing channels 101, 102 as well. The digital signal processor 22 generates the pre-equalized first signal x.sub.1(n) in such a way that it compensates cross talk between the first and the second processing channel 101, 102, and/or generates the pre-equalized second signal x.sub.2(n) in such a way that it compensates cross talk between the first and the second processing channel 101, 102. Details of the cross talk compensation have been discussed above.

(28) It is noted that at least one of the analog filters 51, 52, 53 can be omitted as shown in FIG. 2. It is also possible that no analog filters are employed at all. However, a low pass filter 50 might be inserted after combining the signals (i.e. after the combiner 4) in order to suppress the upper sideband of the mixer 6. The filter 50 could be placed behind the mixer 6 as well. If the number of DACs exceeds two (and thus more than one mixer is used), the filter 50 is used for suppressing the sideband of the mixer with the highest LO frequency.

(29) An overview of an embodiment of the method according to the invention is illustrated in FIG. 3 which might be carried out using the system shown in FIG. 1 or 2. A 2N-point digital input signal (sequence), which corresponds to the input signal d(n) in FIGS. 1 and 2, undergoes a discrete Fourier transformation (DFT) to obtain the spectral representation of the sequence (shown in step 1), wherein I.sup.+, I.sup., II.sup.+ and II.sup. describe the positive and the negative frequency bands of the signal portions I and II, respectively. The arrows denote the direction of the frequency of the bands.

(30) As illustrated in step 2, the input signal is split into two portions of equal length N(2) in the spectral domain (e.g. using the processing unit 21 of FIG. 1 or 2). These two spectral (frequency) portions are then each transformed to the time domain by an inverse discrete Fourier transformation (IDFT). In the next step, the digital signals are fed to the DACs (e.g. DACs 31, 32 of FIG. 1 or 2), which, for example, are running at their maximum sample rate fs without any oversampling in order to generate the analog signals (step 3).

(31) Due to the zero-order-hold (ZOH) operation of the DACs, the DAC output signals are attenuated by a sinc-function, which is indicated by triangles in step 3. The image bands are removed by appropriate low pass filters (step 4). However, the filters will not filter all image band components due to their finite roll-off characteristics. Analog processing of the first analog signal in the first processing path (see processing path 101 in FIG. 1 or FIG. 2) is finished, while the second analog signal undergoes further processing steps. For example, the second analog signal is upmixed (e.g. multiplied by a local oscillator (LO) such as the LO 61 in FIG. 1 or 2) in order to be shifted to a higher frequency region (step 5).

(32) For example, two alternatives 1 and 2 exist for the frequency position of the LO. Either the LO is located at half of the sampling frequency fs/2 or the LO is located directly at the sampling frequency fs. For carrying out the second alternative, the corresponding spectrum has to be digitally inverted prior to the D/A conversion in order to ensure the right frequency orientation in the upper band at the end of the processing. The upconversion with a cosine carrier will generate two side bands. One of these side bands is redundant and can be removed by a band pass filter (step 6). Finally, the two individual analog signals are combined (using e.g. the combiner 4 in FIG. 1 or 2) in order to form an analog representation of the digital input waveform with a bandwidth of fs and a sampling rate of 2 fs (step 7).

(33) In case the mixer 6 shall be omitted, Beyond-Nyquist signaling can be used: The second signal would be generated as in alternative 2 by means of digital spectrum inversion. Instead of using a low pass filter after the DAC in step 3, a band pass filter would be utilized in order to select the frequencies in the second Nyquist zone in the frequency range [fs/2, fs]. The non-linearity distortions caused by the mixer could be avoided. Furthermore, LO phase noise is circumvented. A possible disadvantage of this variant might be a higher loss in amplitude at frequencies close to fs due to the sinc roll-off. This could be avoided by using return-to-zero (RZ) instead of non-return-to-zero (NRZ) operation for the DAC.

(34) Moreover, in alternative 1 the LO is located in-band and thus may disturb the signal (waveform). In order to reduce this interference, a (e.g. very good) notch filter could be employed to cancel the LO line. However, this might produce degradations of a time domain waveform. Though, a frequency domain waveform, e.g. OFDM, might be affected less. Furthermore, if the phase of the LO was known, a digital LO could be generated and inserted in the digital signal, which cancels the disturbing LO line in the analog signal.

(35) The block diagram shown in FIG. 4 relates the spectra shown in FIG. 3 to the system 1 depicted in FIG. 1. It is noted that the processing unit 21 and the digital signal processor 22 (and thus the pre-equalizing) are combined in a common unit.

(36) FIG. 5 illustrates the spectral representation S of the received signal being restricted to the frequency range [fs, fs], corresponding to a sampling rate of 2fs. Although the received signal is a real valued signal, a two-sided spectrum is shown here instead of the single-sided spectrum, because the DFT yields a two-sided spectrum. The spectrum is split into a lower frequency band S.sub.I(k) and an upper frequency band S.sub.II(k), as already set forth above:
S=[S.sup.+,S.sup.]=[S.sub.I.sup.+,S.sub.II.sup.+,S.sub.II.sup.,S.sub.I.sup.],
S.sub.I=[S.sub.I.sup.+,S.sub.I.sup.]
S.sub.II=[S.sub.II.sup.+,S.sub.II.sup.]

(37) Another representation of the spectra S.sub.I(k) and S.sub.II(k) is shown in FIG. 6. The spectra S.sub.I(k) and S.sub.II(k) are each separated into the desired main components and the undesired cross talk components. As already discussed above, the problem encompasses cross coupling terms which are the mirror spectra of the actual spectra. The arrows in FIG. 6, which denote the direction of frequency, visualize that the spectra are reversed in frequency and complex conjugated. This operation can be described by a shift of half of the sample points of the discrete Fourier transformation (DFT): X(k+N/2)=X(kN/2), thereby exploiting the repetitive nature of the discrete spectrum.

(38) As already set forth above, the cross coupling problem, which arises due to the non-ideal filtering as shown in FIG. 5, is denoted as
S.sub.I(k)=H.sub.11(k).Math.X.sub.1(k)+H.sub.12(k).Math.X.sub.2(k+N/2)
S.sub.II(k)=H.sub.21(k).Math.X.sub.1(k+N/2)+H.sub.22(k).Math.X.sub.2(k),
where X.sub.1(k) and X.sub.2(k) are the spectra after the equalizer (after performing the pre-equalizing of the first and the second signal). This MIMO system is visualized in FIG. 7. Straightaway, the difference to a standard MIMO problem becomes visible with two additional shift operations in the frequency domain. The derived model is a special 22 MIMO model and can also be rewritten as a standard 44 MIMO model as described above. Other approaches such as a 11, a 21 or even a 41 model are possible as well.

(39) FIG. 8 depicts a signal processing system 1 according to another embodiment of the invention. System 1 comprises a first, a second and a third DAC 31, 32, 33 receiving a digital (sampled) input signal from a DSP unit 22. A processing unit 21 for splitting the sampled input signal into split signals corresponding to different frequency portions of the sampled signal is provided by the DSP unit 22 or might be realized by a separate unit.

(40) The processing unit 21 splits the input signal into a first and a second signal corresponding to a first and a second frequency portion of the sampled signal, wherein the first signal is transmitted to the first DAC 31. The second signal is split into a first and a second subsignal, wherein the first subsignal is supplied to the second DAC 32, while the second subsignal is supplied to the third DAC 33. The first subsignal corresponds to the real part of the second signal and the second subsignal corresponds to the imaginary part of the second signal (see FIG. 10).

(41) The processing system 1 further comprises an IQ mixer 600 (comprising a local oscillator 601) receiving an analog output signal of the second DAC 32 and an analog output signal of the third DAC 33. The IQ mixer 600 mixes the output signals of the DACs 32, 33 and transmits its output to a combiner 4 (via an analog filter 54). The combiner 4 thus combines the output signal of the IQ mixer 600 with the output signal of the first DAC 31. It is noted that the output signals of the DACs 31-33 are fed to the combiner 4 and the IQ mixer 600, respectively, via analog filters 51-53. However, at least some of the filters 51-54 may be omitted as indicated in FIG. 9.

(42) Due to the IQ mixer 600, the spectrum of the second signal does not need to possess conjugate symmetry properties corresponding to a real valued time domain signal. Thus, the spectrum can be defined for the positive as well as for the negative frequencies independently and the resulting time domain signal is complex valued. FIG. 10 shows the partitioning of the input signal (data) spectrum. The spectrum is split into two parts. The first part (comprising the spectrum portion I.sup., I.sup.+ corresponds to a real valued signal which is fed directly to the first DAC 31. The second part of the spectrum (comprising the spectrum portion II.sup.+, III.sup.+) does not show conjugate symmetry such that the corresponding time domain signal is complex. After a Fourier transformation (e.g. an IFFT), the time domain signal is separated into the real and the imaginary part (i.e. the first and the second subsignal), which are fed to the second and the third DAC, respectively.

(43) As mentioned above, splitting of the non-conjugate-symmetrical spectrum for the first and the second DAC can be performed in the spectral domain instead of the time domain as well. Therefore, the individual signals for the inphase component (second DAC 32) and the quadrature component (third DAC 33) can be obtained each by a Fourier transformation (e.g. an IFFT) of certain spectral components directly. This step requires the exploitation of the general symmetry properties of the Fourier transformation for odd and even functions and spectra, respectively.

(44) It is further noted that more than three DACs might be used and that the DACs 31-33 of FIGS. 8 and 9 do not need to be separate standard single DACs. For example, at least some of them might be realized by a plurality of sub-DACs. For example, the sub-DACs 300a-300k can be either implemented as TIDACs using digital time interleaving in combination with an analog summation point 7 as shown in FIG. 11a). Further, they might be realized as MUXDACs with an analog multiplexer 70 (MUXDAC) as shown in FIG. 11b). The MUXDAC realization does not necessarily need to combine all outputs of the DACs 300a-300k in a single multiplexer. Rather, a multiple-stage multiplexer is possible as well, e.g. in the case of 8 DACs: 3 stages of 2:1 multiplexers (first stage: 42:1, second stage: 22:1, third stage: 12:1. Note, that the individual sub-DACs 300a-300k could be frequency interleaved as well, thereby creating multiple hierarchies of frequency interleaved DACs.

(45) Further, the system 1 may also comprise a pre-equalizing unit 220 as discussed above with respect to FIGS. 1 and 2, wherein the pre-equalizing unit is configured for pre-equalizing the signals supplied to DACs 31-33.

(46) FIG. 12 illustrates another processing system 1 according to the invention based on the system shown in FIG. 1 and configured for carrying out a calibration procedure. In order to carry out a calibration, the system 1 comprises a channel identification unit 80 used for carrying out a channel estimation regarding the first and the second processing channel 101, 102. A splitter 81 is used for branching off a portion of the output signal of the combiner 4, the branched off portion being supplied to the channel identification unit 80. Of course, a switch could be used instead of the splitter as well.

(47) FIGS. 13a) to 13c) show different realizations of the channel identification unit 80. According to FIG. 13a), the full spectrum of the signal (produced by splitter 81) is acquired (using an oscilloscope 800) and processed by a DSP/CE block 801. According to FIG. 13b), fractions of the signal are obtained by filtering (using a filter 802) and down conversion (using a mixer 803), thus limiting the requirements for the bandwidth and the sample rate of oscilloscope 800. The filter and the LO 8031 of the mixer 803 might be tunable, thereby enabling the iterative identification of the full spectrum. The sequentially obtained information is recombined digitally, thus obtaining information about the full spectral width.

(48) Further, in FIG. 13c) information about the LO's frequency f.sub.LO and phase .sub.LO is acquired, only, since the LO 61, 601 is the only critical dynamical element in the system setup. It is either obtained by a notch filter in combination with a scope or by reading the information about the current frequency and phase from a PLL (using oscilloscope 800) for the stabilization of the LO. An initial channel identification might be needed for this variant.

(49) The invention is of course not limited to the realizations shown in FIGS. 13a) to c). For example, hybrid variants as well as related variants are possible. Further, dedicated sequences for the channel estimation are not absolutely necessary, but might improve the channel estimation quality.

(50) Further, as already set forth above, in order to compensate analog impairments of the mixer 6, the filters 51-53, the combiner 4 and/or the frequency response of DACs 31, 32, information about the impulse responses and/or frequency responses of these systems is needed. The calibration routine uses a channel estimation algorithm (see above) to retrieve this information for the whole system. However, it is possible as well to use S-parameter analyzers or X-parameter analyzers to obtain this information. The system can be either measured as a whole or the component's parameters are measured individually and are digitally combined afterwards. During operation system 1 might need to compensate for changing parameters, e.g. component's temperature variations etc. In particular, the calibration procedure is used during operation of system 1 in order to constantly adapt the system 1. Possible calibration procedure have been already explained above.

(51) For example, the calibration procedure uses channel estimation schemes illustrated in FIGS. 14a), 14b) and 16. According to FIG. 14a), only the first DAC 31 is running, wherein the signal s(t) (from splitter 81) is acquired by the oscilloscope 800 of the channel identification unit 80. A FFT is computed (using the DSP unit 801) and the resulting signal is down-sampled in the spectral domain to 2f.sub.s. After splitting the spectrum into two parts, the spectra are converted into the time domain, where two individual Least-Squares (LS) CEs are performed. One of them with the sequence representing the image spectrum and the other with the sequence representing the regular spectrum. Lastly, the obtained channel impulse responses are transformed to the frequency domain yielding H.sub.11(k) and H.sub.21(k). The same procedure is used to calculate H.sub.12(k) and H.sub.22(k), but for the difference that only the second DAC 32 is running (FIG. 14b). The channel frequency responses are later interpolated to match the length of the data pattern in order to perform frequency domain equalization (FDE).

(52) Besides, the CE can be performed with the ABI sequences (i.e. the payload sequences) as well, but the quality might be improved by using e.g. a De Bruijn Binary Sequence (DBBS) pattern of equal length. Note, that the channel estimation can be performed in the frequency domain as well.

(53) In order to circumvent problems with the aforementioned CE scheme, another scheme is presented in FIG. 15. According this scheme, a reduced number of FFT/IFFT operations is utilized. The CE sequences of the scheme presented in the previous section could determine spectral components in the range [0, f.sub.s/2] and [f.sub.s/2, f.sub.s]. With these new sequences spectral components in the range [0, f.sub.s] can be estimated in a single step and thus a more efficient and reliable estimation may be obtained.

(54) Another solution (FIG. 16) uses a MIMO least squares channel estimation scheme, whereby the MIMO 21 channel is estimated jointly. The resulting frequency responses are split in the frequency domain in order to retrieve four channel frequency responses.

(55) The DSP steps for the ABI scheme using a repetitive data sequence, e.g. for an arbitrary waveform generator (AWG), are shown in FIG. 17. Using a frequency domain modulation format, e.g. OFDM or DMT, obviates the need for the first FFT Operation. The input signal (sequence) d(n) is transformed to the frequency domain using a fast Fourier transform (FFT). Then, it is split into two parts D.sub.1(k) and D.sub.2(k). Further, a shifted and a non-shifted version of both D.sub.1(k) and D.sub.2(k) are generated. The equalizers are applied (i.e. the pre-equalizing is performed) to the spectra D.sub.j(k) and D.sub.j(k+N/2) with i, j{1,2}. The resulting spectra are transformed to the time domain via an inverse fast Fourier transform (IFFT) operation and the resulting sequences can be fed to the DACs 31, 32. The equalizer coefficients W.sub.ij(k) with i, j{2, 2} are given by the solution for the 22-MIMO problem as discussed above.

(56) FIG. 18 generally illustrates an example of carrying out the splitting of the input signal and the pre-equalization (which e.g. be used with the system of FIGS. 1 and 2, but also with the IQ mixer system illustrated in FIG. 8 or 9). The input sequence d(n) is transformed into its spectral representation using an FFT. In the spectral domain the sequence is split into two parts (using the processing unit 21), i.e. the first and the second signal are generated. The first part corresponds to low frequency (LF) components and the second part to high frequency (HF) components of the input signal. The splitting can be done by partitioning the spectrum, whereby low frequency samples and high frequency samples are picked from the frequency domain representation in order to generate spectral representations of the two sequences (the first and the second signal). This operation might comprise a rate change. In FIG. 18, the rate change is denoted by the downward arrows.

(57) Now, a MIMO equalizer 221 of the pre-equalizing unit 220 follows, which compensates (as already mentioned above) e.g.

(58) a) magnitude and/or phase in each frequency band

(59) b) magnitude and/or phase mismatches between the frequency bands and

(60) c) cross talk between the frequency bands.

(61) d) and might also account for non-linear distortions

(62) There are multiple ways of achieving the spectrum split (i.e. for configuring the processing unit 21). In the following two possibilities are explained. The main condition for the splitting functions is to equal 1 over all discrete frequencies and/or to ensure that all discrete frequency components are present in one or the other frequency portion.

(63) For example (see steps 1 and 2 of above FIG. 3), brickwall filtering might be used for the lower frequency portion of the input signal corresponding to ideal low pass filtering combined with down sampling of e.g. a factor 2 (if the input signal (spectrum) is split equally). For the higher frequency portion this operation corresponds to bandpass (highpass) filtering followed by downmixing and an additional ideal lowpass filtering action. For example, factor 2 downsampling follows (if the input signal is split equally). In the frequency domain this can be achieved by selecting the appropriate samples.

(64) Another possibility is raised cosine filtering (see FIG. 19). The frequency samples which are multiplied by zeros in the raised cosine function may be removed as illustrated in the figure in order to perform a rate conversion. The frequency response of raised cosine filters H.sub.rc, low and H.sub.rc, high are illustrated in FIG. 20a). FIG. 20b) shows the frequency response of brick wall filters H.sub.block, low and H.sub.block, high.

(65) FIG. 21 illustrates a method for data processing according to another variant of the invention. Again, at least a first and a second DAC is provided and a sampled signal is split into a first and a second signal corresponding to different frequency portions of the sampled signal using a processing unit (steps I, II). Further, a first and a second analog signal is created using the first and the second DAC (step III). However, different from the method shown in FIG. 3, oversampled first and second signals are generated and converted by the first and the second DAC in order to obtain the first and second analog signal. The oversampling can of course be combined with the pre-equalizing of the signals described above.

(66) The oversampling (e.g. by inserting zeros in the digital spectra) is used in order to move the image bands away from the desired bands. Thus, appropriate analog filters (step IV and step VI) are able to eliminate the images almost completely such that cross talk between the processing channels may be avoided. The input spectrum may be divided unequally among the first and the second DAC since the signal in the first processing path undergoes filtering only once and thus does not require oversampling both at the high frequencies and the low frequencies. The oversampled second signal is not generated at base band, but at an intermediate frequency (digital upmixing or digital upconversion). Thus, spectral zeros are achieved both at high frequencies and at low frequencies. Then, the second signal is upconverted to the desired frequency using an LO (step V) and a sideband rejection filter (e.g. band pass, high pass or low pass filter) removes the undesired side band (step VI).

(67) The principle design of a system 1 (being e.g. identical to the system illustrated in FIG. 1) for carrying out the oversampling method described above is shown in FIG. 22, wherein the signal spectra at specific location of the system 1 are also shown.