Abstract
The purpose of the present invention is to allow a silicon photonics modulator to be operated at high speed with high frequency by providing an electrode structure for the small multichannel high-density silicon photonics modulator. This electrode structure for a silicon photonics modulator includes, on the planar surface of a silicon substrate, a first layer for forming a plurality of bias electrical wirings, and a second layer formed by aligning each of a plurality of ground electrode portions and each electrical wiring in the first layer.
Claims
1. An electrode structure for a silicon photonics modulator comprising, on a plane of a silicon substrate: a first layer for forming plural bias electrical wires; and a second layer formed by aligning plural ground electrode parts with the electrical wires in the first layer respectively, wherein the plural bias electrical wires are electrically connected with each other in the first layer, the plural ground electrode parts are electrically connected with each other in the second layer, the silicon photonics modulator is constructed with plural divided-type modulators, plural signal electrode parts are arranged in parallel with the electrical wires in the first layer, the plural electrical wires are electrically connected with each other through spaces between the signal electrode parts in the first layer, and the plural ground electrode parts are electrically connected with each other through spaces between the signal electrode parts in the second layer.
2. The electrode structure according to claim 1, wherein capacitance for connection between each of the electrical wires in the first layer and each of the aligned ground electrode parts in the second layer is further provided individually.
3. The electrode structure according to claim 1, wherein capacitance for connection between the interconnected electrical wires in the first layer and the interconnected ground electrode parts in the second layer is further provided.
Description
BRIEF DESCRIPTION OF DRAWINGS
(1) FIG. 1 is a schematic drawing of an electrode structure for a prior-art optical modulator.
(2) FIG. 2 shows an example of a circuit diagram of an electrode structure for a prior-art silicon photonics modulator.
(3) FIG. 3 shows another example of a circuit diagram of an electrode structure for a prior-art silicon photonics modulator.
(4) FIG. 4(a) is a schematic top view of a silicon substrate, in an electrode structure for a prior-art silicon photonics modulator.
(5) FIG. 4(b) is a schematic top view of a silicon substrate, in an electrode structure for a prior-art silicon photonics modulator.
(6) FIG. 5 shows an example of a circuit diagram which comprises the circuit diagram of FIG. 3 to which inductance is added.
(7) FIG. 6 is a graph of frequency response of a prior-art silicon photonics modulator which is measured by use of the schematic circuit in the schematic circuit diagram of FIG. 5.
(8) FIG. 7A is an example schematic top view of a silicon substrate, in an electrode structure for a silicon photonics modulator, according to an embodiment of the present invention.
(9) FIG. 7B is another example schematic top view of a silicon substrate, in an electrode structure for a silicon photonics modulator, according to an embodiment of the present invention.
(10) FIG. 8 is an example cross-section view of the electrode structure for the silicon photonics modulator of FIG. 7A.
(11) FIG. 9 is another example cross-section view of the electrode structure for the silicon photonics modulator of FIG. 7A.
(12) FIG. 10A is a circuit diagram of an equivalent circuit corresponding to the electrode structure for the silicon photonics modulator of FIG. 7A.
(13) FIG. 10B is a circuit diagram of an equivalent circuit corresponding to the electrode structure for the silicon photonics modulator of FIG. 7B.
(14) FIG. 11 is a schematic top view of a silicon substrate, in an electrode structure for a silicon photonics modulator, according to another embodiment of the present invention.
(15) FIG. 12 is an example cross-section view of the electrode structure for the silicon photonics modulator of FIG. 11.
(16) FIG. 13 is a graph of frequency response of a silicon photonics modulator which is measured by use of an electrode structure for the silicon photonics modulator, according to an embodiment of the present invention.
DESCRIPTION OF EMBODIMENTS
(17) An electrode structure for a silicon photonics modulator integrated on a plane of a silicon substrate, according to an embodiment of the present invention, will be explained below with reference to the figures. Note that similar symbols are assigned to components which are similar with each other.
(18) FIG. 7A is an example schematic top view of a silicon substrate relating to an electrode structure for a silicon photonics modulator, according to an embodiment of the present invention. FIG. 8 shows an example of a cross-section view at the first row, the fourth row, or the seventh row in FIG. 7A, and FIG. 9 shows an example of a cross-section view at the second row, the third row, the fifth row, or the sixth row in FIG. 7A. FIG. 7A also shows electric signal input parts 50 for receiving input of electric signals from a driver IC circuit (not shown in the figure) which covers a part of a circuit as illustrated by the top surface in the top view, and optical waveguides 60 for inputting and outputting optical signals (which are not shown in FIG. 4).
(19) FIG. 7A and FIG. 8 are referred to. When paying attention to the first row in FIG. 7A, it can be seen that the pattern (the color painted part) of the bias electrical wire V formed on the waveguide of the modulator is covered, in an aligned manner, by a pattern (the part defined by a broken line) of the ground electrode part G having a width substantially equal to that of the above pattern. That is, the electrode structure comprises a layer I.sub.1 for forming plural bias electrical lines and a layer I.sub.2 formed by aligning plural ground electrode parts with the electrical wires in the layer I.sub.1, respectively, and they are stacked. As a result, in the electrode structure, the V in the bias electrical wire layer I.sub.1 and the G in the ground electrode layer I.sub.2 can be used to function as capacitor which has an insulation material between the layers.
(20) Note that, although it has been explained in the above example that the width of the pattern of the bias electrical wire V is substantially equal to that of the pattern of the ground electrode part G, the widths are not limited to the above, thus, the widths may be set to be different. Further, although the ground electrode layer I.sub.2 is stacked on the bias electrical wire layer I.sub.1 in the above example, the order to stack the layers are not limited to the above. In an opposite manner, the bias electrical wire layer I.sub.1 may be stacked on the ground electrode layer I.sub.2.
(21) Next, FIG. 9, which corresponds to the second row in FIG. 7A, is referred to. As shown in a series of arrows in FIG. 9, an electric signal is supplied from a signal electrode part S.sub.1 formed at an end of the second row to the driver IC circuit via an electric signal input part 51; and, next, the electric signal is received from the driver IC circuit by electric signal input parts 52-54, respectively, and transmitted to signal electrode parts S.sub.2-S.sub.4, respectively. A layer I.sub.3 positioned below the signal electrode parts S.sub.2-S.sub.4 is provided with an optical waveguide, and a silicon photonics modulator is formed in the layer I.sub.3. Thus, the electric signal is supplied and the silicon photonics modulator is driven.
(22) FIG. 10A is a circuit diagram of an equivalent circuit corresponding to the electrode structure for the silicon photonics modulator constructed according to the embodiment of the present invention shown in FIG. 7A. As explained above, the electrode structure becomes equivalent to that to which capacitor (C2) is logically added. As a result, it is understood that the impedance of the modulator can be reduced.
(23) Next, FIG. 7B, wherein the electrode structure of FIG. 7A has been modified, is referred to. As shown in FIG. 7B, in an example of an improved electrode structure, capacitance (capacitor chips) (C) is arranged between the bias electrical lines V and the ground electrode parts G which are aligned with the bias electrical lines V, respectively. Thus, an equivalent circuit corresponding to the improved electrode structure constructed as illustrated in FIG. 7A becomes like that of FIG. 10B. In this manner, by providing a capacitor chip (C), stable operation between the electrode structure and an external element connected from the electrode structure can be expected especially, so that further advantages can be obtained.
(24) As shown in FIG. 11, in another embodiment of the present invention, it is constructed in such a manner that patterns of parallel bias electrical wires V.sub.1, V.sub.2, and V.sub.3 shown in the first row, the fourth row, and the seventh row are electrically connected with each other in a direction perpendicular thereto by wires V.sub.1 and V.sub.2 which are also bias electrical wires, and that ground electrode parts G.sub.1, G.sub.2, and G.sub.3 on the layer of the above bias electrical wires are also electrically connected with each other in a direction perpendicular thereto by ground electrode parts G1 and G2. In the example of FIG. 7A, by having the interconnection in the perpendicular direction as explained above, the respective amounts of capacitance that are formed at the first row, the fourth row, and the seventh row, respectively, by parallel flat plates comprising the layer of bias electrical wires V and the layer of ground electrode parts G can function together as a unified amount of capacitance through all channels. As a result, it becomes possible to further stabilize the electric characteristic of the silicon photonics modulator.
(25) Further, in the case that the construction shown in FIG. 7B, i.e., the construction in which capacitor (C) is added between a bias electrical wire V and a ground electrode part G, is applied to the electrode structure shown in FIG. 11, it is possible to electrically connect the bias electrical wire V layers with each other and electrically connect the ground electrode part G layers with each other through all channels. That is, the capacitor (C) required for connection may be only one, in total; and it becomes possible to perform more stable operation.
(26) As explained above, a silicon photonics modulator having an electrode structure according to an embodiment of the present invention is constructed as a divided-type modulator in an example. Then, the electrode structure for such a silicon photonics modulator has, for example, four signal electrode parts S.sub.1-S.sub.4, and they are arranged and patterned in such a manner that it is positioned to be in parallel with the pattern of the bias electrical wire V and adjacent to the first row. FIG. 12 is a cross-section view at the second row, the third row, the fifth row, and the sixth row in FIG. 11, and the electrode structure shown in FIG. 11 can be further understood.
(27) That is, the bias electrical wires V.sub.1 and V.sub.2, which connect the patterns of the bias electrical wires V with each other, are connected through spaces between signal electrode parts (i.e., the spaces between S.sub.2 and S.sub.3 and between S.sub.3 and S.sub.4) in the layer I.sub.1. Similarly, it can be understood that the ground electrode parts G.sub.1 and G.sub.2, which connect the patterns of the ground electrode parts G on the bias electrical wires V with each other, are connected through spaces between signal electrode parts (i.e., the spaces between S.sub.2 and S.sub.3 and between S.sub.3 and S.sub.4) in the layer I.sub.2.
(28) On the other hand, in the case that a travelling-wave-type electrode is used as the silicon photonics modulator, spaces such as those between S.sub.2 and S.sub.3 and between S.sub.3 and S.sub.4, which are explained above, do not exist; thus, a new layer would be additionally formed, alternately, it is constructed that from a periphery of a long modulator, patterns of bias electrical wires V would be connected with each other and/or patterns of the ground electrode parts G on the bias electrical wires V would be connected with each other.
(29) Finally, effect of an electrode structure for a silicon photonics modulator according to an embodiment of the present invention will be explained with reference to FIG. 13. FIG. 13 is a graph of frequency response of a silicon photonics modulator which is measured by use of the electrode structure shown in FIG. 7A or FIG. 11. In the graph, the solid line [a] represents the case of the electrode structure of the present embodiment; on the other hand, the dotted line [b] corresponds to the case wherein the pattern width w of the electrical wire V of the bias shown in FIG. 6 is made to be narrow, and the dashed line [c] corresponds the case which is opposite to the above case, i.e., the case wherein the pattern width w is made to be wide.
(30) As previously explained in relation to FIG. 6, in the cases of the dotted line [b] and the dashed line [c], the electrical characteristic of the silicon photonics modulator is adversely affected by the problem of inductance (L2) of the electrode structure, regardless of the pattern with W of the electrical wire V of the bias. On the other hand, in the case of the solid line [a], i.e., when the electrode structure according to the present embodiment is applied, such quality degradation is not observed; and even in the case of a high frequency (for example, 25 GHz), it is considered that frequency response similar to that in the case of FIG. 6 (specifically, the case that the value of inductance of L2 shown in FIG. 5 is set to 0 nH) will be presented. Thus, it can be fully understood that, by the construction wherein the capacitor C2 is further added to the ground electrode side as shown in the circuit diagram of the equivalent circuit in FIG. 10A, the electrical characteristic of the silicon photonics modulator is greatly improved and the frequency response of the modulator is improved.
(31) In the above description, the embodiments of the present invention has explained with reference to the drawings; and, in this regard, it should be reminded that a person skilled in the art can use other similar embodiments, and can appropriately perform modification of an embodiment and/or addition to an embodiment without departing from the present invention. Note that the present invention should not be limited to the above embodiments; and the present invention should be construed based on the descriptions in the claims.
