Device and method for fault current detection

Abstract

The invention relates to a method and a device for detecting fault currents in a regulated DC intermediate circuit having an active power factor correction.

Claims

1. A system comprising: an EC motor connected to a regulated DC intermediate circuit having a rectifier, an intermediate circuit capacitor, and an inverter having an active power factor correction; a detection device for detecting a first current signal flowing through a feed conductor and a second current signal flowing through a return conductor, the feed conductor and the return conductor being connected on an input side to an AC voltage source, the detection device including a first electrical component in the feed conductor tapping the first current signal and a second electrical component in the return conductor tapping the second current signal, a transformer generating a first analog signal proportional to the first current signal and a second analog signal proportional to the second current signal, a differential amplifier generating and amplifying a difference signal corresponding to a difference between the first and second analog signals, and a circuit connected between the active power factor correction and the detection device and configured to lower an intermediate circuit voltage of the regulated DC intermediate circuit by switching off the active power factor correction when the difference signal exceeds a maximum permissible threshold value so that the difference signal can be detected by a type-A fault current circuit breaker.

2. The device according to claim 1, wherein the regulated DC intermediate circuit generates a boosted intermediate circuit voltage.

3. The device according to claim 1, wherein the first and second electrical components are each resistance, inductance, or magnetic field sensors.

4. The device according to claim 1, wherein the differential amplifier comprises a signal preparation module, in order to prepare the difference signal so that it may be further processed by a microcontroller, an ASIC or an integrated circuit.

5. The device according to claim 1, wherein the circuit includes a microcontroller, an ASIC or an integrated circuit for processing the difference signal.

6. A method for detecting fault currents comprising: detecting, using a detection device, first and second current signals flowing through a feed conductor and a return conductor, respectively, of a regulated DC intermediate circuit connected to an EC motor and having a rectifier, an intermediate circuit capacitor, and an inverter having an active power factor correction, the feed conductor and the return conductor being connected on an input side to an AC voltage source, generating, with a transformer, first and second analog signals proportional to the first and second current signals, respectively, preparing a difference signal between the first and second analog signals, with a differential amplifier, corresponding to a difference between the first and second analog signals, and lowering an intermediate circuit voltage, with a circuit connected between the active power factor correction and the detection device, by switching off the active power correction of the regulated DC intermediate circuit when the difference signal exceeds a maximum permissible threshold value, wherein the difference signal has a wave form that can be detected by a type-A fault current circuit breaker when the difference signal exceeds the maximum permissible threshold value.

7. The method according to claim 6, wherein, by means of the lowering of the intermediate circuit voltage, a voltage curve between the intermediate circuit voltage and a ground potential, generated as a fault current curve, can be detected by the type-A fault current circuit breaker.

8. A system comprising: an EC motor connected to a regulated DC intermediate circuit having a rectifier, an intermediate circuit capacitor, and an inverter having an active power factor correction; a detection device having a first electrical component that generates a first current signal identifying current flowing through a feed conductor; and a second electrical component that generates a second current signal identifying current flowing through a return conductor, the feed conductor and the return conductor being connected on an input side to an AC voltage source; a first transformer that generates a first analog signal proportional to the first current signal; a second transformer that generates a second analog signal proportional to the second current signal; a differential amplifier that generates and amplifies a difference signal corresponding to a difference between the first analog signal and the second analog signal; and a circuit connected between the active power factor correction and the detection device and including a microprocessor configured to receive the difference signal and lower an intermediate circuit voltage of the regulated DC intermediate circuit by switching off the active power factor correction when the difference signal exceeds a maximum permissible threshold value so that the difference signal can be detected by a type-A fault current circuit breaker.

Description

(1) Other advantageous refinements of the invention are characterized in the subclaims and are described in greater detail below together with the description of the preferred embodiment of the invention with reference to the figures, in which:

(2) FIG. 1 shows a basic circuit diagram of known commutation electronics for a 3-chain EC motor having a passive PFC;

(3) FIG. 2 shows a basic circuit diagram of a known commutation electronics for a 3-chain EC motor having an active PFC;

(4) FIG. 3 shows in CH4 the voltage curve between the intermediate circuit voltage and the protective ground potential in an inverter having passive PFC, CH2 shows the mains input voltage;

(5) FIG. 4 shows in CH4 the voltage curve between the intermediate circuit voltage and the protective ground potential in an inverter having active PFC, CH2 shows the mains input voltage;

(6) FIG. 5 shows in CH4 the voltage curve between the intermediate circuit voltage and the protective ground potential in an intermediate circuit of a commutation circuit having passive PFC and CH3 shows the fault current, CH2 the input voltage;

(7) FIG. 6 shows in CH4 the voltage curve between the intermediate circuit voltage and the protective ground potential in an intermediate circuit of a commutation circuit having active PFC and CH3 shows the fault current, CH2 the input voltage, and

(8) FIG. 7 shows a basic circuit diagram of an exemplary embodiment of the invention of commutation electronics for an EC motor having an active PFC.

(9) In the following description, based on FIGS. 1 through 7, identical reference numerals refer to identical structural or functional features. FIG. 1 shows the basic circuit diagram of commutation electronics having passive PFC 21 for a 3-chain EC motor 20, which is connected on the input side to an AC voltage source 23 via an EMV filter 24 consisting of an L-C combination. The passive power factor correction 21 in this case consists merely of an intermediate circuit choke 25.

(10) FIG. 2 depicts commutation electronics having an active power factor correction 22. In electronics having passive PFC according to FIG. 1, the intermediate circuit voltage present across the capacitor C.sub.1 has a value of U.sub.c1={square root over (2)}*U.sub.ac, wherein U.sub.ac is the feed AC voltage. In a commutation circuit having an active PFC, as depicted in FIG. 2, the voltage across the capacitor C.sub.1 may be set to values of U.sub.IC>{square root over (2)}*U.sub.ac,rms. Typical values used in EC devices are at voltages in the range of 380 VDC to 440 VDC.

(11) Accordingly, a voltage is present between the positive terminal of the capacitor (anode) and the PE potential (protective ground potential), the nature of which depends on the topology, as shown in the figures described below.

(12) FIG. 3 shows the voltage curve between the intermediate circuit voltage and the protective ground potential in an inverter having passive PFC and FIG. 4 shows the voltage curve between the intermediate circuit voltage and the protective ground potential in an inverter having active PFC.

(13) Measured curves are shown, which are associated with corresponding measured channels. The sinusoidal input voltage of the AC voltage source is depicted in the lower curve on the channel Ch2. The voltage curve between the intermediate circuit voltage and the protective ground potential is shown in channel Ch4 for an inverter having passive PFC. It is clearly apparent that the potential between the intermediate circuit voltage and the protective ground potential, i.e., the voltage U.sub.IC relative to the protective ground potential (PE potential) alternates between the values 0V and U.sub.max,ac,rms.

(14) As a comparison, FIG. 4 shows the voltage curve between the intermediate circuit voltage and the protective ground potential in an inverter having active PFC. In this case, the voltage potential between the anode of the capacitor and the protective ground potential is always greater than 0V. The minimum value is at U.sub.min=U.sub.IC-ac,rms.

(15) If an insulation fault is present in the aforementioned examples, this then corresponds topologically to a state in which a resistance between the positive intermediate circuit potential and the protective ground (PE) potential is introduced. The fault current then also behaves in accordance with the voltage curve. In the inverter according to FIG. 1, the current will periodically recede to 0 A and in the inverter according to FIG. 2 to a minimum value, which represents the minimum fault current, the latter being determined from the quotients (U.sub.IC{square root over (2)}*U.sub.ac,rms)/R.sub.fault. In contrast to the inverter according to FIG. 1, a DC portion always flows in the inverter according to FIG. 2.

(16) Depicted in each of the FIGS. 5 and 6 is a situation in which in the case of the two circuit topologies a resistance of R.sub.fault of 3 K has been integrated in each case between the intermediate circuit voltage and the protective ground potential (in this case, the conductive housing of the motor).

(17) FIG. 5 represents the measurement results in commutation electronics having passive PFC. In the upper curve (CH4), the voltage drop is plotted over the fault resistance R.sub.fault. Depicted in the lower curve, (CH3) is the corresponding fault current, which flows via the resistance to the housing.

(18) FIG. 6 shows the measured curves of a corresponding measurement for the case in which commutation electronics having active PFC are used. In these figures, the middle sinusoidal measured curve (channel Ch2) represents the sinusoidal input voltage. The voltage between U.sub.IC+ and the protective ground potential is reflected by the upper curve (Ch4) and the measured fault current by the resistance R.sub.fault is represented by the middle curve form.

(19) FIG. 7 shows the schematic diagram of an exemplary embodiment of the invention of commutation electronics for an EC motor having an active PFC. A device 1 for detecting fault currents in a regulated DC intermediate circuit 2 is shown having an active power factor correction 22 and having a detection device 3 for detecting current signals S1, S2, which flow through the two live conductors 4a, 4b on the input side.

(20) The detection device 3 includes an electrical component 3a, 3b in each of the two live conductors 4a, 4b for tapping current signals S1=I.sub.feed and S2=I.sub.return, thus, the currents through the feed line and the return line. With the detection options described below, the detected current value from the feed line and return line is converted into a corresponding analog voltage signal. These voltage signals are preferably fed as input signals to a differential amplifier 6.

(21) A transformer 5 is provided for generating in each case an analog signal S1, S2 from the respectively detected signals S1, S2, as well as a differential amplifier 6 for preparing a signal S.sub.DIFF as a difference signal between the signals S1, S2 corresponding to a detected fault current, in particular, in the event that the fault current exceeds maximum permissible threshold value of the signal S.sub.DIFF.

(22) To lower the intermediate circuit voltage, a circuit configuration 7 is provided, so that a switch-off process is initiated by means of the signal S.sub.DIFF. The circuit configuration 7 is designed so that the intermediate circuit voltage is lowered by switching off the active power factor correction.

(23) The invention is not limited in its implementation to the aforementioned preferred exemplary embodiments. Rather, a number of variants are conceivable, which use the solution presented, even in the case of embodiments of a fundamentally different type. Thus, the detection device 3, the transformer 4 and/or the circuit configuration 7 may also be designed as a shared circuit.