Limiting driver for switch-mode power amplifier

Abstract

A switch-mode RFPA driver includes first and second field-effect transistors (FETs) arranged in a totem-pole-like configuration. The switch-mode RFPA driver operates to generate a switch-mode RFPA drive signal having a generally square-wave-like waveform from an input RF signal having a generally sinusoidal-like waveform. To maximize high-frequency operation and avoid distorting the switch-mode RFPA drive signal, the switch-mode RFPA driver is designed so that its output can be connected directly to the input of the switch-mode RFPA to be driven, i.e., without using or requiring the use of an AC coupling capacitor. The first and second FETs of the switch-mode RFPA driver are designed and configured to limit and control the upper and lower magnitude levels of the switch-mode RFPA drive signal to levels suitable for switching the switch-mode RFPA directly, obviating any need for DC biasing at the input of the switch-mode RFPA.

Claims

1. A method of driving a switch-mode radio frequency power amplifier (RFPA), comprising: generating a switch drive signal having a generally square-wave-like waveform at an output node of a switch-mode totem-pole driver; directly driving a power field-effect transistor (FET) in the switch-mode RFPA according to the switch drive signal; controlling upper and lower drive levels of the switch drive signal so that the power FET in the switch-mode RFPA is switched between fully ON and fully OFF states without having to first level shift the switch drive signal; and during times the switch-mode RFPA is producing low output RF powers, minimizing gate-source leakage through a gate-source capacitor of the power FET of the switch-mode RFPA and concomitant amplitude-dependent distortion produced in an RF output of the switch-mode RFPA by lowering a magnitude of the upper drive level of the switch drive signal.

2. The method of claim 1, wherein directly driving the power FET includes not using a coupling capacitor and not using a DC biasing circuit.

3. The method of claim 1, further comprising controlling the lower drive level of the switch drive signal to limit a gate-source voltage applied across the gate-source terminals of the power FET to a gate-source voltage less than a pinch-off voltage of the depletion mode power FET.

4. The method of claim 1, wherein controlling the upper drive level of the switch drive signal comprises limiting the upper drive level to a value less than a voltage that would turn on an internal Schottky diode of the power FET.

5. The method of claim 1, wherein the power FET is a depletion mode FET.

6. The method of claim 5, wherein the switch-mode totem-pole driver comprises first and second depletion mode FETs.

7. A method of minimizing amplitude-dependent phase distortion in an output signal produced by a switch-mode power amplifier (SMPA), comprising: generating a bi-level switch drive signal having a generally square-wave-like waveform with an upper drive level defined by and substantially equal to a first driver power supply voltage; applying the bi-level switch drive signal directly to a gate of a field-effect transistor (FET) in the SMPA; switching the FET ON and OFF according to the bi-level switch drive signal; during times the SMPA is producing low output power, generating a modified bi-level switch drive signal having a generally square-wave-like waveform with an upper drive level defined by and substantially equal to a modified driver power supply voltage that is less than the first driver power supply voltage; applying the modified bi-level switch drive signal directly to the gate of the FET in the SMPA; and minimizing gate-source leakage through a gate-source capacitor of the FET and concomitant amplitude-dependent distortion produced at an output of the FET by switching the FET ON and OFF according to the modified bi-level switch drive signal.

8. The method of claim 7, wherein: generating the bi-level switch drive signal comprises pulling up an output node of a switch-mode totem-pole driver to the first driver power supply voltage and pulling down the output node of the switch-mode totem-pole driver to a second driver power supply voltage; and generating the modified bi-level switch drive signal comprises pulling up the output node of the switch-mode totem-pole driver to the modified driver power supply voltage and pulling down the output node of the switch-mode totem-pole driver to the second driver power supply voltage.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a simplified cross-sectional drawing of a typical GaN-HEMT, highlighting the GaN-HEMT's salient material layers and physical characteristics;

(2) FIG. 2 is a block level drawing of a radio frequency power amplifier (RFPA) driver apparatus, according to an embodiment of the present invention;

(3) FIG. 3 is a schematic diagram of an RFPA driver apparatus, according to an embodiment of the present invention;

(4) FIG. 4 is a schematic drawing of a current-regulating diode, which can be used to implement the current source in the driver control circuit of the RFPA driver apparatus in FIG. 3;

(5) FIGS. 5A and 5B are signal diagrams of first and second driver control signals generated by the driver control circuit of the RFPA driver apparatus in FIG. 3; and

(6) FIG. 5C is a signal diagram of the drive signal generated by the driver circuit of the RFPA driver apparatus in FIG. 3.

DETAILED DESCRIPTION

(7) Referring to FIG. 2, there is shown a block diagram of an exemplary radio frequency power amplifier (RFPA) driver apparatus 200, according to an embodiment of the present invention. The RFPA driver apparatus 200 comprises an input signal conditioner 202, a driver control section 204, and a driver 206, which is configured to drive a switch-mode RFPA 208. As explained in the detailed description that follows, the input signal conditioner 202 operates to transform an RF input signal RF.sub.in having a generally sinusoidal-like waveform into a conditioned RF input signal RF.sub.in having faster edge transitions and a generally square-wave-like waveform; the driver control section 204 controls operation of the driver 206, in accordance with the conditioned RF input signal RF.sub.in; and the driver 206 generates a drive signal VG having a generally square-wave like waveform and limited low and high magnitude levels suitable for driving the switch-mode RFPA 208.

(8) FIG. 3 is a schematic diagram of an exemplary RFPA driver apparatus 300 designed in accordance with the general block-level representation of the RFPA driver apparatus 200 in FIG. 2. The RFPA driver apparatus 300 comprises an input signal conditioning circuit 302, a driver control circuit 304, and a driver circuit 306, which is configured to drive a main power switch 354 of a switch-mode RFPA 308. In one embodiment of the invention the RFPA driver apparatus 300 and switch-mode RFPA 308 are both formed in a single gallium-nitride-based (GaN-based) monolithic microwave integrated circuit (MMIC), with all transistors being depletion-mode, n-channel AlGaN/GaN high electron-mobility transistors (referred to simply as GaN-HEMTs in the description that follows). By utilizing GaN-HEMTs the RFPA driver apparatus 300 and switch-mode RFPA 308 are able to operate at high frequencies (e.g. several GHz and above). Further, because GaN has a wide bandgap (3.4 eV@300K), high breakdown field (300 V/m@300K), and high thermal conductivity (2.3 W/cm.Math.K@300K), utilizing GaN-based HEMTs in the RFPA driver apparatus 300 allows the switch-mode RFPA 308 to generate very high RF output powers (tens to hundreds of watts) at high power densities (e.g., >5 W/mm). To further facilitate high-power operation the GaN-based RFPA driver apparatus 300/switch-mode RFPA 308 GaN-based MIMIC can be manufactured on a high-thermal-conductivity heat-sinking substrate, such as SiC or diamond. The high-thermal-conductivity property of GaN and the heat-sinking substrate allow heat to be readily conducted away from the RFPA 308 and RFPA driver apparatus 300, thereby protecting the RFPA 308 and RFPA driver apparatus 300 from being damaged or destroyed due to excessive heating. The ability to effectively conduct heat away from the RFPA 308 and RFPA driver apparatus 300 also reduces the size and cost of any external cooling system that may be needed.

(9) In embodiments of the invention in which the RFPA driver apparatus 300 is implemented as a GaN-based MIMIC using GaN-HEMTs, it and the GaN-HEMTs may be fabricated using metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or any other suitable manufacturing process. Details of some exemplary MOCVD fabrication processes that may be used or adapted to fabricate the GaN-based RFPA driver apparatus 300 and RFPA 308 may be found in, for example, U.S. Pat. No. 7,230,284 to Parikh et al., U.S. Pat. No. 7,364,988 to Harris et al., and Pengelly et al., A Review of GaN on SiC High Electron Mobility Power Transistors and MMICs, IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 6, June 2012, all of which are incorporated herein by reference.

(10) In the description of the exemplary embodiments of invention that follows, it is assumed that all transistors in the various circuits of the RFPA driver apparatus 300 and the RFPA 308 are GaN-based HEMTs. It should be emphasized, however, that the invention is not limited to GaN-based-HEMT technology or to developing drive signals for GaN-based RFPAs. In other words, although the RFPA driver apparatus 300 and RFPA 308 are preferably made from GaN-based HEMTs, other types of depletion-mode field effect devices, possibly made from other semiconducting materials, could be alternatively used. Also, although it is preferred that the circuitry of the RFPA driver apparatus 300 (input signal conditioning circuit 302, driver control circuit 304, and driver circuit 306) and RFPA 308 all be formed in a single MMIC, the RFPA driver apparatus 300 and RFPA 308 could be formed separately, for example, with the RFPA driver apparatus 300 implemented in a first MMIC, the RFPA 308 implemented in a second MIMIC, and both MMICs mounted and configured in a hybrid RF power module. In an implementation in which the RFPA driver apparatus 300 is implemented separate from the RFPA 308 (i.e., both not formed in the same MMIC), the RFPA 308 could then be implemented, though not necessarily, using a different field-effect transistor topology than used to implement the RFPA driver apparatus 300 (i.e., using a transistor topology other than a HEMT), and/or could be made from a different type of semiconducting material than that used to form the RFPA driver apparatus 300 (i.e., a semiconductor other than GaN).

(11) A detailed description of the various circuits making up the RFPA driver apparatus 300 will now be presented, starting with a detailed description of the input signal conditioning circuit 302. As shown in FIG. 3, the input signal conditioning circuit 302 comprises a balanced differential pair having: a first arm including a first GaN-HEMT 310 connected in series with a first load resistor 312; a second arm including a second GaN-HEMT 314 connected in series with a second load resistor 316; and a tail resistor 318. The first and second load resistors 312 and 316 are coupled between a common power supply V.sub.D and the drains of their respective GaN-HEMTs 310 and 314. The sources of the first and second GaN-HEMTs 310 and 314 are connected together at a common node 320 (also referred to as the common source node 320 below). The tail resistor 318 is connected between the common source node 320 and ground or to some other negative voltage source. The first and second GaN-HEMTs 310 and 314 are substantially identical, both being depletion-mode, n-channel GaN-HEMTs and both having a common negative pinch-off voltage V.sub.P. In fact, all GaN-HEMTs in the exemplary RFPA driver apparatus 300 described here (i.e., not just the first and second GaN-HEMTs 310 and 314 have the same (i.e., common) pinch-off voltage V.sub.P. (In one specific embodiment of the invention, for example, all GaN-HEMTs in the RFPA driver apparatus 300, as well as the main power switch (GaN-HEMT 354) of the switch-mode RFPA 308, have a common pinch-off voltage V.sub.P=3.8V.) It should be emphasized, however, that a common pinch-off voltage V.sub.P is not an absolute requirement, insofar as the claimed invention is concerned.

(12) The gates of the first and second GaN-HEMTs 310 and 314 are biased to DC bias voltages determined by the voltage dividers formed by bias resistors 326, 328, 330 and 332, the power supply voltage V.sub.D, and the negative bias voltage V.sub.NEG. In one embodiment of the invention the bias resistors 326, 328, 330 and 332 have values that set the gate bias voltage at both gates of the first and second GaN-HEMTs 310 and 314 to a value close to zero volts. Setting the gate bias voltages to zero volts allows the RF input signal RF.sub.in to be directly coupled to the input signal conditioning circuit, via RF coupling resistor 334. The resistance of the tail resistor 318 is selected so that the DC gate-to-source voltage of both the first and second GaN-HEMT 310 and 314 is greater than the pinch-off voltage V.sub.P but not so high that any input Schottky diodes which may be present at the gates of the first and second GaN-HEMTs 310 and 314 are able to clamp the RF input signal RF.sub.in.

(13) The principal function of the input signal conditioning circuit 302 is to transform the generally sinusoidal-like RF input signal RF.sub.in into a conditioned RF signal RF.sub.in having faster low-to-high and high-to-low transitions. Depending on the application, the RF input signal RF.sub.in may be modulated or unmodulated. (For example, in an application in which the RFPA driver apparatus 300 and RFPA 308 are employed in a polar modulation transmitter, the RF input signal RF.sub.in could be an angle-modulated RF carrier signal.) The input signal conditioning circuit 302 reduces the high-to-low and low-to-high transition times of the RF input signal RF.sub.in by exploiting a first feedback path 322 formed from the drain of the first GaN-HEMT 310 to the gate of the second GaN HEMT 314, and a second feedback path 324 formed from the drain of the second GaN-HEMT 314 to the gate of the first GaN-HEMT 310. When the RF input signal RF.sub.in is applied to the input signal conditioning circuit 302 and begins swinging negative below the bias point (bias point is assumed to be zero volts in the description that follows), the resistance of the first GaN-HEMT 310 increases, causing the drain voltage of the first GaN-HEMT 310 to be pulled up toward the supply voltage V.sub.D. The increasing drain voltage is fed to the gate of the second GaN-HEMT 314, via the first feedback path 322, thereby reinforcing the gate drive of the second GaN-HEMT 314. As the drain voltage of the first GaN-HEMT 310 increases, the drain voltage of the second GaN-HEMT 314 decreases. The decreasing drain voltage is fed to the gate of the first GaN-HEMT 310, via the second feedback path 324, reducing the gate drive of the first GaN-HEMT 310. Reducing the gate drive of the first GaN-HEMT 310 while reinforcing the gate drive of the second GaN-HEMT 314 in this manner has the effect of accelerating the transition of the signal produced at the output node 336 (referred to as the conditioned RF input signal RF.sub.in below) from high to low (i.e., compared to if no gate drive reduction and reinforcement were applied). The result is a conditioned RF input signal RF.sub.in having faster high-to-low transitions than the unconditioned RF input signal RF.sub.in. On the other hand, for transitions from low to high, when the RF input signal RF.sub.in begins swinging positive, the resistance of the second GaN-HEMT 314 increases, causing the drain voltage of the second GaN-HEMT 314 to be pulled up toward the supply voltage V.sub.D. The increasing drain voltage is fed to the gate of the first GaN-HEMT 310, via the second feedback path 324 to reinforce the gate drive of the first GaN-HEMT 310. As the drain voltage of the second GaN-HEMT 314 increases, the drain voltage of the first GaN-HEMT 310 decreases. The decreasing drain voltage is fed to the gate of the second GaN-HEMT 314, via the first feedback path 322, thereby reducing the gate drive of the second GaN-HEMT 314. Reducing the gate drive of the second GaN-HEMT 314 while reinforcing the gate drive of the first GaN-HEMT 310 in this manner has the effect of accelerating the low-to-high transition of the conditioned RF input signal RF.sub.in (i.e., compared to if no gate drive reduction and reinforcement were applied), resulting in a conditioned RF input signal RF.sub.in having faster low-to-high transitions than the unconditioned RF input signal RF.sub.in.

(14) The conditioned RF input signal RF.sub.in produced at the output node 336 of the input signal conditioning circuit 302 is applied to the input of the driver control circuit 304. (Note that in the exemplary RFPA driver apparatus 300 depicted in FIG. 3, the driver control circuit 304 is driven single-endedly. In other embodiments of the invention it is driven differentially using the RF drain outputs of the first and second GaN HEMTs 310 and 314 as the differential drive signals.) The driver control circuit 304 comprises an unbalanced differential pair having: a first arm including a first GaN-HEMT 338 connected in series with a first load resistor 340; a second arm including a second GaN-HEMT 342 connected in series with a second load resistor 344; and a tail current source 346. A supply end of the first load resistor 340 in the first arm is connected to a first power supply producing a voltage V.sub.1 (which in one embodiment of the invention is the same voltage V.sub.DRV applied to the driver circuit 306, i.e., V.sub.1=V.sub.DRV), and the supply end of the second resistor 344 in the second arm is connected to a second power supply voltage V.sub.2 (which in one embodiment of the invention is the same as the voltage V.sub.4 applied to the source of the driver transistor 352 in the driver circuit 308, i.e., V.sub.2=V.sub.4). The gates of the first and second GaN-HEMTs 338 and 342 are both biased to a gate bias voltage V.sub.BIAS having a value higher than the pinch-off voltage V.sub.P but not so high that any Schottky diodes which may be present at the gates of the first and second GaN-HEMTs 338 and 348 are able to clamp the conditioned RF input signal RF.sub.in. Biasing the gates of the first and second GaN-HEMTs 338 and 342 above pinch-off, i.e., V.sub.BIAS>V.sub.3+V.sub.P, also ensures that a current path is always available for the tail current source 346.

(15) The tail current source 346 is connected between the common source node 348 and a negative power supply voltage V.sub.NRAIL. In one embodiment of the invention, the tail current source 346 is implemented using a current-regulating (CR) diode 400. As illustrated in FIG. 4, the CR diode 400 comprises a GaN-HEMT 402 and a current-setting resistor 404 connected between the source and gate of the GaN-HEMT 402. The CR diode 400 produces a constant current I.sub.SET of a value determined by the resistance of the current-setting resistor 404. The voltage dropped by the current-setting resistor 404 (I.sub.SETR.sub.SET) is fed back across the gate-source terminals of the GaN-HEMT 402. The fed-back voltage is negative from gate to source (i.e., (V.sub.GS=(I.sub.SETR.sub.SET)). Accordingly, any propensity of the CR diode current to deviate from I.sub.SET is opposed by the negative feedback. For example, if the supply voltage V.sub.CRD was to increase in an attempt to increase the drain current through the GaN-HEMT 402, the voltage drop across the current-setting resistor 404 would increase and since the fed-back voltage is negatively applied across the gate-source terminals of the GaN-HEMT 402 the GaN-HEMT 402 would oppose the increase in current, forcing the drain current back down to I.sub.SET. So long as the supply voltage V.sub.CRD is not reduced below a minimum voltage V.sub.min, the CR diode 400 is effective at regulating the constant current I.sub.SET in this manner, despite any variation in the supply voltage V.sub.CRD.

(16) The primary purpose of the driver control circuit 304 is to generate first and second gate control signals VG+ and VG for controlling operation of the driver circuit 306. When the conditioned RF input signal RF.sub.in increases higher than the gate bias voltage V.sub.BIAS, the resistance of the first GaN-HEMT 338 decreases, eventually to a value that is negligible compared to the resistance of the first load resistor 340. This results in the drain voltage VG+ of the first GaN-HEMT 338 being pulled down to the DC voltage V.sub.3 at the common source node 348. (In one embodiment of the invention V.sub.3=8V.) The first and second GaN-HEMT 338 and 342 operate as source followers. Accordingly, as the drain voltage VG+ of the first GaN-HEMT 338 is being pulled down to voltage V.sub.3, the voltage at the source of the second GaN-HEMT 342 rises, effectively lowering the gate-to-source voltage applied to the second GaN-HEMT 342 and causing the second GaN-HEMT 342 to turn OFF. With the second GaN-HEMT 342 turned OFF, the drain voltage VG of the second GaN-HEMT 342 is pulled up to the supply voltage V.sub.2. (V.sub.2=4V in one embodiment of the invention.) Subsequently, when the conditioned RF input signal RF.sub.in transitions to a value below the bias voltage V.sub.BIAS, the resistance of the first GaN-HEMT 338 increases, resulting in the drain voltage VG+ of the first GaN-HEMT 238 being pulled up to the supply voltage V.sub.1. (In one embodiment of the invention, V.sub.1=V.sub.DRV and 2V.sub.DRV0V.) Since the first and second GaN-HEMTs 338 and 342 also operate as source followers, as the drain voltage VG+ of the first GaN-HEMT 338 is being pulled up to the supply voltage V.sub.1, the voltage at the source of the second GaN-HEMT 342 is lowered, effectively increasing the gate-to-source voltage applied the second GaN-HEMT 342 and causing the second GaN-HEMT 342 to turn ON. With the second GaN-HEMT 342 turned ON, the drain voltage VG of the second GaN-HEMT 342 is pulled down to voltage V.sub.3. FIGS. 5A and 5B are signal diagrams showing the voltage levels and timing characteristics of the resulting first and second gate control signals VG+ and VG produced by the driver control circuit 304. As can be seen, the first gate control signal VG+ varies between an upper voltage level V.sub.1 and a lower voltage level V.sub.3, and the second gate control signal VG various between an upper voltage level V.sub.2 and a lower voltage level V.sub.3.

(17) The driver circuit 306 comprises a push-pull type structure having first and second GaN-HEMTs 350 and 352. The first GaN-HEMT 350 is stacked over the second GaN-HEMT 352 in a totem-pole-like configuration, with the source of the first GaN-HEMT 350 connected to the drain of the second GaN-HEMT 352. The drain of the first GaN-HEMT 350 is configured to connect to a driver power supply V.sub.DRV, and the source of the second GaN-HEMT 352 is configured to connect to a source power supply that produces a negative supply voltage V.sub.4 less than the GaN-HEMT pinch-off voltage V.sub.P. (In one embodiment of the invention, V.sub.4=V.sub.2=4V.) The gate of the first GaN-HEMT 350 is configured to receive the first gate control signal VG+ while the second GaN-HEMT 352 is configured to receive the second gate control signal VG. As illustrated in FIGS. 5A and 5B, the first and second gate control signals VG+ and VG both have generally square-wave-like waveforms and are preferably 180 degrees out of phase so that ideally only one of the first and second GaN-HEMTs 350 and 352 of the driver circuit 306 conducts at any given time. Permitting only one of the first and second GaN-HEMTs 350 and 352 to conduct at any given time is beneficial since it prevents a waste current path from forming through the first and second GaN-HEMTs 350 and 352.

(18) The purpose of the driver circuit 306 is to generate a drive signal VG for the main power switch (GaN-HEMT 354) of the switch-mode RFPA 308. The drive signal VG produced by the driver circuit 306 has a generally square-wave-like waveform with fast edge transitions and limited and controlled high and low magnitude levels. Preferably, the drive signal VG is directly connected to the input of the switch-mode RFPA 308, i.e., is not coupled to the input of the switch-mode RFPA 308 via an AC coupling capacitor. Directly connecting the drive signal VG to the input of the switch-mode RFPA 308 ensures that the waveform of the drive signal VG remains substantially square-wave like and is not slowed or distorted by the presence of an AC coupling capacitor. Directly connecting the drive signal VG to the input of the switch-mode RFPA 308 also avoids the need for any additional components and/or power supplies that would be needed to bias the input of the switch-mode RFPA 308 if AC coupling was to be used, since biasing can be established and set by the driver circuit 306 and appropriate selection of the driver circuit 306 power supplies.

(19) The drive signal VG switches the main power GaN-HEMT 354 of the switch-mode RFPA 308 ON and OFF as follows. During times when the first GaN-HEMT 350 of the driver circuit 306 is ON and the second GaN-HEMT 352 is OFF, such as, for example, during time t=t1 (see FIGS. 5A and 5B), a voltage VG+=V.sub.1 is applied to the gate of the first GaN-HEMT 350 while a voltage VG=V.sub.3 is applied to the gate of the second GaN-HEMT 352. The voltage VG+=V.sub.1 has a value sufficient to maintain a conducting channel between the drain and source of the first GaN-HEMT 350, and the voltage VG=V.sub.3 has a value sufficiently negative to pinch off the conducting channel in the second GaN-HEMT 352. Thus charge flows through the GaN-HEMT 350 into the gate of the main power GaN-HEMT 354 of the RFPA 308 to turn the main power GaN-HEMT 354 ON. With the second GaN-HEMT 352 OFF and the first GaN-HEMT 350 ON, the gate voltage VG applied to the gate of the main power GaN-HEMT 354 is pulled up to level of the driver supply voltage V.sub.DRV. Conversely, during times when the first GaN-HEMT 350 is OFF and the second GaN-HEMT 352 is ON, such as, for example, during time t=t2, a voltage VG+=V.sub.3 is applied to the gate of the first GaN-HEMT 350 while a voltage VG=V.sub.2 is applied to the gate of the second GaN-HEMT 352. The voltage VG=V.sub.2 has a value sufficient to maintain a conducting channel between the drain and source in the second GaN-HEMT 352, and the voltage VG+=V.sub.3 is sufficiently negative to pinch off the conducting channel in the first GaN-HEMT 350. With the first GaN-HEMT 350 OFF and the second GaN-HEMT 352 ON, the gate voltage VG applied to the gate of the main power GaN-HEMT 354 is pulled down to voltage level V.sub.4 sufficient to pinch off its conducting channel and turn it OFF

(20) FIG. 5C is a signal diagram showing the voltage levels and timing characteristics of the resulting drive signal VG produced by the driver circuit 306. The drive signal VG has very fast rising and falling transitions and its high and low drive levels VG.sub.H and VG.sub.L are limited and controlled. Specifically, the low drive level VG.sub.L is limited to VG.sub.L=V.sub.4 (in one embodiment just below the main power GaN-HEMT 354 pinch-off voltage V.sub.P) and the high drive level VG.sub.H is limited to the driver circuit supply voltage, i.e., VG.sub.H=V.sub.DRV. Note that in one embodiment of the invention, the high drive level VG.sub.H is adjustable to one of a plurality of different high drive levels, as indicated by the bracket 502 in FIG. 5C. Since VG.sub.H=V.sub.DRV, this adjustment can be made by simply varying the driver supply voltage V.sub.DRv. (In one embodiment of the invention in which the pinch-off voltage of the main power GaN-HEMT 354 is V.sub.P=3.8V, the high drive level VG.sub.H is adjustable to one of 0V, 1V or 2V.) This variable-drive capability is beneficial since it allows the high drive level VG.sub.H to be reduced during times the switch-mode RFPA 308 is transmitting only at low output power levels. Lowering the high drive level VG.sub.H at low output power levels reduces gate leakage and undesirable amplitude-dependent phase distortion (i.e., AM-PM distortion), thereby improving the output dynamic range of the RFPA 308.

(21) While various embodiments of the present invention have been described, they have been presented by way of example and not limitation. It will be apparent to persons skilled in the relevant art that various changes in form and detail may be made to the exemplary embodiments without departing from the true spirit and scope of the invention. Accordingly, the scope of the invention should not be limited by the specifics of the exemplary embodiments but, instead, should be determined by the appended claims, including the full scope of equivalents to which such claims are entitled.