VCO tuning range extension using parasitic diode capacitance control

Abstract

Embodiments of methods and apparatuses may provide the capability to extend the tuning range of a VCO in a way that does not degrade VCO circuit performance. For example, the parasitic capacitance of semiconductor devices in the VCO circuit may be utilized to extend the tuning range of a VCO without significant degradation of VCO circuit performance. For example, in an embodiment, a method voltage-control of an oscillator may comprise receiving a first signal for control of a frequency of an output signal from the oscillator, deriving a second signal from the first signal, controlling the frequency of the output signal from the oscillator using the first signal, and extending a frequency range of the oscillator using the second signal.

Claims

1. A method of voltage-control of an oscillator comprising: receiving a first signal for control of a frequency of an output signal from the oscillator; deriving a second signal from the first signal, wherein the second signal is derived from the first signal by performing signal conditioning on the first signal, and wherein the signal conditioning comprises a non-linear transformation of the first signal; controlling the frequency of the output signal from the oscillator using the first signal; and extending a frequency range of the oscillator using the second signal.

2. The method of claim 1, wherein the frequency of the output signal is controlled by controlling a capacitance of at least one voltage-variable capacitance with the first signal; and the frequency range of the oscillator is extended by controlling a parasitic capacitance of at least one amplifying element or a parasitic capacitance of the at least one voltage-variable capacitance with the second signal.

3. The method of claim 2, wherein at least one of the at least one amplifying element or the at least one voltage-variable capacitance comprises a MOS device and the parasitic capacitance is a drain to bulk diode parasitic capacitance of the MOS device.

4. The method of claim 2, wherein the signal conditioning comprises analog signal conditioning.

5. The method of claim 2, wherein the signal conditioning comprises digital signal conditioning.

6. A voltage-controlled oscillator comprising: voltage-controlled oscillator circuitry having a first input for receiving a first signal and configured to control of a frequency of an output signal from the oscillator using the first signal, and having a second input for receiving a second signal and configured to extend a frequency range of the oscillator using the second signal; and signal conditioning circuitry configured to derive the second signal from the first signal; wherein the signal conditioning circuitry comprises circuitry to perform a non-linear transformation on the first signal.

7. The voltage-controlled oscillator of claim 6, further comprising: at least one voltage-variable capacitance controlled by the first signal.

8. The voltage-controlled oscillator of claim 7, wherein the second input is connected to a parasitic capacitance of at least one amplifying element or a parasitic capacitance of the at least one voltage-variable capacitance with the second signal.

9. The voltage-controlled oscillator of claim 8, wherein at least one of the at least one amplifying element or the at least one voltage-variable capacitance comprises a MOS device and the parasitic capacitance is a drain to bulk diode parasitic capacitance of the MOS device.

10. The voltage-controlled oscillator of claim 9, wherein the signal conditioning circuitry comprises analog signal conditioning circuitry.

11. The voltage-controlled oscillator of claim 9, wherein the signal conditioning circuitry comprises digital signal conditioning circuitry.

12. An apparatus comprising: a voltage-controlled oscillator having a first input for receiving a first signal and configured to control of a frequency of an output signal from the oscillator using the first signal, and having a second input for receiving a second signal and configured to extend a frequency range of the oscillator using the second signal; and signal conditioning circuitry for deriving the second signal from the first signal; wherein the signal conditioning circuitry comprises circuitry to perform a non-linear transformation on the first signal.

13. The apparatus of claim 12, wherein the voltage-controlled oscillator comprises: at least one voltage-variable capacitance controlled by the first signal.

14. The apparatus of claim 13, wherein the second input is connected to a parasitic capacitance of at least one amplifying element or a parasitic capacitance of the at least one voltage-variable capacitance with the second signal.

15. The apparatus of claim 14, wherein at least one of the at least one amplifying element or the at least one voltage-variable capacitance comprises a MOS device and the parasitic capacitance is a drain to bulk diode parasitic capacitance of the MOS device.

16. The apparatus of claim 12, wherein the signal conditioning circuitry comprises analog signal conditioning circuitry or digital signal conditioning circuitry.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The details of the present invention, both as to its structure and operation, can best be understood by referring to the accompanying drawings, in which like reference numbers and designations refer to like elements.

(2) FIG. 1 is an exemplary block diagram and circuit diagram of an embodiment of a VCO in accordance with the present apparatuses and methods.

(3) FIG. 2 is a simplified exemplary circuit diagram of a signal conditioner as shown in FIG. 1.

(4) FIG. 3 is an exemplary diagram of extension of the VCO tuning range and linearization of the gain for the circuit examples shown in FIGS. 1 and 2.

DETAILED DESCRIPTION

(5) Embodiments of methods and apparatuses may provide the capability to extend the tuning range of a voltage-controlled oscillator (VCO) in a way that does not degrade VCO circuit performance. For example, the parasitic capacitance of semiconductor devices in the VCO circuit may be utilized to extend the tuning range of a VCO without significant degradation of VCO circuit performance.

(6) An exemplary block diagram and circuit diagram 100 of an embodiment of a VCO is shown in FIG. 1. In this example, a block diagram includes a VCO 102 and a signal conditioner 104. VCO 102 is shown in more detail in circuit diagram 120. A tuning voltage, V.sub.Tune 106 may be applied to a tuning input 110 of VCO 102 to control the frequency of the output signal 108 from VCO 102. Likewise, V.sub.Tune 106 may be applied to signal conditioner 104, which may shape V.sub.Tune 106 to form a conditioned drain parasitic capacitance tuning signal V.sub.D 112, which may be applied to drain parasitic capacitance tuning input 114.

(7) Circuit diagram 120 illustrates a simplified exemplary circuit configuration for VCO 102. In this example, VCO 102 includes amplifying elements 122A, B, voltage-variable capacitances 124A, B, inductance 126, and current sink 128. In this exemplary circuit diagram, amplifying elements 122A, B may typically be MOS devices, such as MOS-FET transistors, while voltage-variable capacitances 124A, B, may typically be varactor or varicap diodes, which may be implemented, for example, using MOS devices. Inductance 126 may typically be an on-chip or external inductor. Current sink 128 may absorb current from amplifying elements 122A, B. In this example, VCO 102 output frequency may be controlled by one or more voltage-variable capacitances 124A, B connected to the LC tank. V.sub.Tune 106 may be applied to tuning input 110, and V.sub.D 112 may be applied to drain parasitic capacitance tuning inputs 114. Typically, V.sub.Tune 106 may be used to control the frequency of the output signal 108 from VCO 102.

(8) The frequency of the output signal 108 from VCO 102 may also be controlled by changing the parasitic capacitance of the drain/bulk diodes of amplifying elements 122A, B, which are connected to the tank circuitry (here LC). Drain parasitic capacitance tuning inputs 114 are connected to the bulk terminals or connections of amplifying elements 122A, B. When applied to drain parasitic capacitance tuning inputs 114, V.sub.D 112 biases the drain/bulk diodes of amplifying elements 122A, B, which alters the parasitic capacitances 128A, B of the drain/bulk diodes 122A, B. The parasitic capacitances 128A, B may change according to

(9) $C_{\mathrm{diode}}=\frac{c_{\mathrm{jo}}}{\sqrt{1+\frac{V_{\mathrm{BD}}}{V_{\mathrm{bi}}}}}.$
Utilizing the parasitic capacitances of the drain/bulk diodes of amplifying elements 122A, B in VCO 102 may provide the capability to extend the tuning range of VCO 102 with little or no performance degradation.

(10) In the example shown in FIG. 1, V.sub.D 112 is applied to the bulk terminals or connections of amplifying elements 122A, B. In some embodiments, voltage-variable capacitances 124A, B may be varactor or varicap diodes that have bulk terminals or connections as well. For example, varactor or varicap diodes may be implemented as MOS devices having gate, source, drain, and bulk terminals or connections. In such embodiments, V.sub.D 112 may be applied to the bulk terminals or connections of the varactor or varicap diodes instead of, or in addition to, being applied to the bulk terminals or connections of amplifying elements 122A, B.

(11) A simplified exemplary circuit diagram of a signal conditioner 104 is shown in FIG. 2. In this example, signal conditioner 104 may include an input V.sub.In 202 and an output V.sub.Out 204. As shown in FIG. 1, the signal V.sub.Tune 106 may be applied to input V.sub.In 202 and output V.sub.Out 204 may output the signal V.sub.D 112, which may be applied to drain parasitic capacitance tuning input 114. In this example, signal conditioner 104 may produce a signal V.sub.D 112 having the characteristics shown. With such signal conditioning, V.sub.D 112 may be used to extend the VCO tuning range and linearize the gain in a broader V.sub.Tune 106 region.

(12) In this exemplary embodiment, signal conditional 104 operates as a non-linear amplifier. Use of such a signal conditioner may provide extension of the tuning range of the VCO and may prevent gain degradation at the band edges. In this example, signal conditioner 104 may include a n-channel transistor 206, an p-channel transistor 208, a first resistor 210, a second resistor 212, and a capacitor 214.

(13) The transistors should have sufficient transconductance so that: (g.sub.m).sup.1<<R/2 for |V.sub.GS|>V.sub.T, where g.sub.m is the nmos/pmos transconductance, V.sub.GS is gate source voltage, and V.sub.T is the transistor threshold voltage. Then for V.sub.in<V.sub.CC/2V.sub.T 216: p-channel transistor operates as a source follower and the n-channel transistor is off. For V.sub.CC/2+V.sub.T>V.sub.in>V.sub.CC/2V.sub.T218, both transistors are off. For V.sub.in>V.sub.CC/2+V.sub.T 220, the n-channel transistor operates as a source follower and the p-channel transistor is off. This may produce a transfer function 222 as shown in FIG. 2. Capacitor 214 may be selected or designed such that: 1/RC will be low as possible while g.sub.m/C is still higher than the input frequency bandwidth. This may provide filtering of the resistor noise at the circuit output when both transistors are off. Accordingly, for |V.sub.inV.sub.CC/2|>V.sub.T: the output noise PSD is

(14) $V_N^2\left(f\right)=\frac{\mathrm{KT}}{g_m}.$
Likewise, for |V.sub.inV.sub.CC/2|<V.sub.T: the output noise PSD is

(15) $V_N^2\left(f\right)=\frac{2\mathrm{KT}}{{\mathrm{RC}}^2{f}^2}.$

(16) In the example shown in FIG. 2, an analog signal conditioner is shown. In embodiments, other analog signal conditioner configurations may be used. Likewise, in embodiments, digital signal conditioner configurations may be used. Any and all configurations of analog or digital signal conditioners may be applicable to the present methods and apparatuses.

(17) An example of extension of the VCO tuning range 300 and linearization of the gain 302 for the circuit examples shown in FIGS. 1 and 2 is shown in FIG. 3. An exemplary tuning range 304 and gain 306 for a conventional VCO are shown, as an exemplary tuning range 308 and gain 310 for the circuit examples shown in FIGS. 1 and 2. As may be seen, the tuning range 308 has been extended relative to the conventional VCO tuning range 304. Likewise, the gain 310 has been linearized relative to the conventional VCO gain 306.

(18) The present invention may be a system and/or a method at any possible technical detail level of integration. Although specific embodiments of the present invention have been described, it will be understood by those of skill in the art that there are other embodiments that are equivalent to the described embodiments. Accordingly, it is to be understood that the invention is not to be limited by the specific illustrated embodiments, but only by the scope of the appended claims.