Clock recovery circuits, systems and implementation for increased optical channel density

Abstract

Techniques and circuits are proposed to increase averaging in the clock recovery band based on an amount of channel overlap in receivers using excess bandwidth for clock recovery, to mitigate the impact of spectral energy leaking into an active channel of interest from an adjacent active channel and to improve the accuracy of the phase estimate of the received transmitted clock.

Claims

1. A flexible grid optical receiver circuit comprising: a phase locked loop circuit configured to receive a received signal and to output a sampling signal based on timing of the received signal; and a clock recovery circuit configured to determine a phase difference between the received signal and the sampling signal, determine a control signal based on the phase difference, and utilize the control signal to set a clock recovery bandwidth of the phase locked loop circuit, wherein the clock recovery bandwidth is set to filter out adjacent channel interference.

2. The flexible grid optical receiver circuit of claim 1, wherein the clock recovery bandwidth is set to optimize channel spacing of the received channel for a given optical signal-to-noise ratio.

3. The flexible grid optical receiver circuit of claim 2, wherein the clock recovery circuit is configured to estimate jitter margin from neighboring channels and to utilize the estimated jitter margin to set the optimized channel spacing.

4. The flexible grid optical receiver circuit of claim 1, wherein the received signal is in a super-Nyquist mode of operation.

5. The flexible grid optical receiver circuit of claim 1, wherein the clock recovery circuit includes a phase rotator configured to couple the phase locked loop circuit and the clock recovery loop circuit such that a feedback signal copy of the sampling signal is either delayed or advanced based on the control signal to filter out adjacent channel interference.

6. The flexible grid optical receiver circuit of claim 1, wherein the clock recovery circuit is configured to adjust a reference clock associated with the received signal.

7. The flexible grid optical receiver circuit of claim 6, wherein the local reference clock has an adjustable frequency and the control signal is employed to control a frequency of the local reference clock to filter out adjacent channel interference, and wherein the adjusted reference signal is combined with a feedback signal copy of the sampling signal.

8. A flexible grid optical system comprising: one or more flexible grid modems; and a bandwidth utilization controller communicatively coupled to the one or more flexible grid modems and configured to for a given optical signal-to-noise ratio target for a new channel on one of the one or more flexible grid modems, determine a required optical signal-to-noise ratio for the new channel; obtain estimated jitter margin from neighboring channels associated with the one or more flexible grid modems; and translate the estimated jitter margin into channel spacing for the new channel based on the given optical signal-to-noise ratio target.

9. The flexible grid optical system of claim 8, wherein a relationship between the estimated jitter margin and the channel spacing for the new channel based on the given optical signal-to-noise ratio target is predetermined.

10. The flexible grid optical system of claim 8, wherein the estimated jitter margin is translated to provide optimal clock recovery parameters in terms of existing channel information and the given optical signal-to-noise ratio target.

11. The flexible grid optical system of claim 8, wherein a flexible grid modem for the new channel includes a phase locked loop circuit configured to receive a received signal and to output a sampling signal based on timing of the received signal; and a clock recovery circuit configured to determine a phase difference between the received signal and the sampling signal, determine a control signal based on the phase difference, and utilize the control signal to set a clock recovery bandwidth of the phase locked loop circuit, wherein the clock recovery bandwidth is set to filter out adjacent channel interference.

12. The flexible grid optical system of claim 11, wherein the clock recovery bandwidth is set to optimize channel spacing of the received channel for a given optical signal-to-noise ratio.

13. The flexible grid optical system of claim 12, wherein the clock recovery circuit is configured to estimate jitter margin from neighboring channels and to utilize the estimated jitter margin to set the optimized channel spacing.

14. The flexible grid optical system of claim 11, wherein the received signal is in a super-Nyquist mode of operation.

15. The flexible grid optical system of claim 11, wherein the clock recovery circuit includes a phase rotator configured to couple the phase locked loop circuit and the clock recovery loop circuit such that a feedback signal copy of the sampling signal is either delayed or advanced based on the control signal to filter out adjacent channel interference.

16. The flexible grid optical system of claim 11, wherein the clock recovery circuit is configured to adjust a reference clock associated with the received signal.

17. The flexible grid optical system of claim 16, wherein the local reference clock has an adjustable frequency and the control signal is employed to control a frequency of the local reference clock to filter out adjacent channel interference, and wherein the adjusted reference signal is combined with a feedback signal copy of the sampling signal.

18. A method comprising for a given optical signal-to-noise ratio target for a new channel on one of the one or more flexible grid modems, determining a required optical signal-to-noise ratio for the new channel; obtaining estimated jitter margin from neighboring channels associated with the one or more flexible grid modems; and translating the estimated jitter margin into channel spacing for the new channel based on the given optical signal-to-noise ratio target.

19. The method of claim 18, wherein a relationship between the estimated jitter margin and the channel spacing for the new channel based on the given optical signal-to-noise ratio target is predetermined.

20. The method of claim 18, wherein the estimated jitter margin is translated to provide optimal clock recovery parameters in terms of existing channel information and the given optical signal-to-noise ratio target.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The proposed solution will be better understood by way of the following detailed description of embodiments of the invention with reference to the appended drawings, in which:

[0031] FIG. 1A is a schematic diagram illustrating generic adjacent channels in a fixed grid spectrum optical system;

[0032] FIG. 1B is a schematic diagram illustrating an example of adjacent channels in a gridless spectrum optical system;

[0033] FIG. 1C is a schematic diagram illustrating pulse shaping for signal transmission in a data channel;

[0034] FIG. 1D is a schematic diagram illustrating received signal power distribution for an active data channel;

[0035] FIG. 2 is schematic diagram showing a phase domain (.sub.dBc) spectral density variation of different contributors at the receiver;

[0036] FIG. 3A is a circuit schematic for digital programming of a clock recovery in a feedback loop;

[0037] FIG. 3B is a circuit schematic illustrating legacy clock recovery wherein VCO jitter suppression is dependent on clock recovery bandwidth;

[0038] FIG. 3C is a schematic diagram showing phase noise variation with frequency in phase locked loops;

[0039] FIG. 4A is a circuit schematic diagram illustrating clock recovery employing a phase rotator in accordance with an embodiment of the proposed solution;

[0040] FIG. 4B is a circuit schematic diagram illustrating clock recovery employing an adjustable reference clock in accordance with another embodiment of the proposed solution;

[0041] FIG. 5A is a schematic flow diagram illustrating a process for selecting receiver clock recovery bandwidth and gain in accordance with an embodiment of the proposed solution;

[0042] FIG. 5B is a graph illustrating simulated penalties for different modulation formats;

[0043] FIG. 5C is a graph illustrating a variation which is steeper versus channel spacing (right side of the graph) compared to changes in ASE noise level that is due to the high bandwidth phase noise induced in the jitter estimation (left side of the graph);

[0044] FIG. 6A is a schematic diagram illustrating an experimental setup in accordance with the proposed solution;

[0045] FIG. 6B is a schematic plot illustrating a measure power distribution of the tested channels in the experimental setup illustrated in FIG. 6A in accordance with the proposed solution; and

[0046] FIGS. 6C and 6D are schematic diagrams illustrating experimental results in accordance with the proposed solution,

[0047] wherein similar features bear similar labels throughout the drawings.

DETAILED DESCRIPTION

[0048] The operating principles of the proposed solution are based on employing a clock recovery circuit that provides selection of a programmable clock recovery bandwidth such as to suppress the leakage of adjacent channels independently from adjusting phase noise suppression parameters of the receiver VCO. The objective is to optimize clock recovery bandwidth to filter out adjacent channel interference.

[0049] In accordance with one embodiment of the proposed solution such a clock recovery circuit 400 in a receiver employs a phase rotator 402 in the feedback path of an analog PLL as shown in FIG. 4A. The phase rotator 402 decouples the intrinsic VCO jitter phase noise suppression from the clock recovery.

[0050] An analog PLL 404 locks to a local reference clock 406 using an analog phase detector 408 providing a trigger signal 410 to charge pump 412. Charge pump 412 provides a voltage setting signal 414 to low pass filter 416. The low pass filter 416 is set to a high bandwidth to smooth out voltage signal 414 changes to reduce VCO phase noise in the output 420 of the VCO 418. The phase rotator-based clock recovery loop 424 (digital PLL) is nested in the analog PLL 404 and locks to the received data signal 426 using a digital phase detector 428. Received data signal 426 includes the transmitted clock signal information. The output 430 of the digital phase detector 428, which is representative of phase differences between the received data signal and the VCO output 420, is provided to digital accumulator 432. Digital codes 434 output by the digital accumulator 432 configure the phase rotator 402 to delay or advance the feedback signal in analog PLL loop 404. Phase rotator 402 can have a finer resolution when compared to total untracked RMS Jitter. The digital codes can be employed, for example through a functional dependency or through a look-up table, to correct non-linearity errors for example due to arctan and I-Q mismatch. Circuit 400 is configured to decouple the requirement for high bandwidth of the analog PLL 404 to reject the phase noise of the VCO 418 from the requirement of the clock recovery bandwidth. The phase rotator based digital clock recovery bandwidth provides improved jitter rejection in the received data signal versus VCO jitter generation and minimizes digital phase detector error through filtering/averaging (using the digital accumulator 432). The recovered data clock 420 is used to trigger an ADC to sample the received data signal 426. The configuration illustrated in FIG. 4A provides an optimization of VCO phase noise suppression using high bandwidth analog PLL 404 and the adjacent channel leakage into the clock recovery band by minimizing the clock recovery bandwidth.

[0051] In accordance with another embodiment of the proposed solution, another technique to reduce clock recovery bandwidth to filter out adjacent channel interference can for example adjust the reference clock of the receiver as illustrated in FIG. 4B. In circuit 500, an analog PLL feedback signal derived from the output 520 of the VCO 418 is combined at 510 with the output of an adjustable reference clock 506. The combined signal 512 is filtered by low pass filter 416 which sets a high bandwidth to smooth out driving signal 512 changes to reduce VCO phase noise in the output 520 of the VCO 418. Divider 514 provides the feedback signal of the analog PLL loop 504. A second digital PLL loop 524 compares the received data signal including the transmitted clock information 426 with the VCO output 520 using digital phase detector 428. The output 430 of the digital phase detector 428, which is representative of phase differences between the data signal and the VCO output 420, is provided to a digital controller 532. Output 536 of the digital controller 532 is used to provide digital PLL frequency control of the adjustable reference clock 506. Digital codes of the digital controller 532 configure adjustable reference clock 502 to output a lower or higher frequency to drive analog PLL loop 504. The digital codes can be employed, for example through a functional dependency or through a look-up table, to correct non-linearity errors for example due to arctan and I-Q mismatch. In this way, the adjustable reference clock can be regarded as a Numerically Controlled Oscillator (NCO) where the frequency control word 536 is provided by control block 532. Here again, this configuration provides an optimization of VCO phase noise suppression using the high bandwidth analog PLL 404 and the adjacent channel leakage into the clock recovery band by minimizing the bandwidth of the clock recovery loop 524.

[0052] While separate circuits are illustrated in FIGS. 4A and 4B, it is to be understood that hybrid circuits would also work.

[0053] Incidentally, it is noted that when measuring SNR, and assuming noise is uncorrelated with zero mean, averaging over N observations smooths out the result:

[00002]$\begin{array}{cc}{\mathrm{SNR}}_{\mathrm{averaged}}=\frac{E\left[{.Math.\mathrm{signal}.Math.}^2\right]}{\frac{E\left[{.Math..Math..Math.\mathrm{noise}.Math.}^2\right]}{N^2}}=\frac{E\left[{.Math.\mathrm{signal}.Math.}^2\right]}{\frac{N*E\left[{.Math.\mathrm{noise}.Math.}^2\right]}{N^2}}=N*{\mathrm{SNR}}_{\mathrm{original}}.& \left(3\right)\end{array}$

[0054] With reference to FIG. 2, lowering the clock recovery bandwidth effectively helps to filter out the impact of the adjacent channel interference and would provide better signal integrity with respect to transmitter clock extraction at the receiver. Such a system also requires signal transmission techniques to ensure that the transmitter jitter is low because lowering the clock recovery bandwidth limits the capability of tracking the transmitted clock at the receiver.

[0055] In addition, lowering the clock recovery bandwidth reduces the effective tracking by the receiver of the other sources of jitter. If we assume J.sub.rx (jitter induced by the receiver) is tracked by the receiver PLL, J.sub.channel can be estimated from neighboring channels in the same NMC. For the cases of low transmitter clock standard deviation in the total phase error (J.sub.tx), the optimized parameters (bandwidth and gain) can be based on the specification in order to perform a fitting to extract optimal channel spacing. This can be summarized by:

J.sub.interference(spacing)<J.sub.specJ.sub.channelJ.sub.txJ.sub.rx(4).

[0056] A process is proposed which takes into consideration phase noise induced by neighboring channels for programming the effective clock recovery bandwidth and gain of the channel of interest. Such a process is illustrated in FIG. 5A which can assess system penalty versus increasing bandwidth utilization based on optical network type. This methodology can be used to obtain Required Optical Signal-to-Noise Ratio (ROSNR) needed for a given channel capacity, for example through estimating channel spacing. The process 600 is initiated upon a request for new channel 602 with determining the optical network type 604. For a fixed grid optical system, predefined receiver settings can be employed to select 606 the clock recovery bandwidth, gain, Bit Error Rate (BER) and reduction in neighboring channel attenuation to permit channel width increase. However, if the network deployment includes a gridless optical system at 604, a brute force search method can be used to optimize parameters by adding a channel at nominal spacing predefined or at (1+)*Baud-rate. Typical gridless deployments include channel spacing based on the granularity of the ROADMs, for example an integer multiple of 12.5 GHz.

[0057] The impact of channel density on the ROSNR for different modulation formats typically used in commercial coherent modems was measured and a guideline can be provided regarding how jitter is affected by spacing and OSNR availability. Leaked energy from neighboring channels manifests itself as a form of noise added to the channel of interest, therefore the ROSNR to meet a Forward Error Correction (FEC) threshold will increase. FIG. 5B illustrates simulated penalties for different modulation formats to obtain the minimum available ROSNR required when increasing channel density. Deployments covering submarine links, long-haul, metro and data-center interconnects were investigated to be able to predict how ROSNR in link budget will be impacted by channel spacing.

[0058] From the graph of the measurements the penalty increases with the density of the constellation employed. Returning to the process illustrated in FIG. 5A, if no OSNR margin is available 610, the process resumes from step 606 employing predefined parameters as per ITU-T G.870. However, if OSNR margin is available, clock information can be obtained 612 in the gridless optical system from transponders typically on the same link.

[0059] The Power Spectrum Distribution (PSD) of the generated phase noise of VCOs within a receiver PLL can be modelled as a Lorentzian distribution to associate channel density and OSNR with jitter margin. The linear effects of the noise source components mentioned hereinabove can be combined in a simulation, the results of which are illustrated in FIG. 5C. 0% margin is the point at which the receiver cannot reach steady state failing to synchronize to the transmitter clock at the receiver. FIG. 5C illustrates a variation which is steeper versus channel spacing (right side of the graph) compared to changes in ASE noise level that is due to the high bandwidth phase noise induced in the jitter estimation (left side of the graph). With this in mind, returning to FIG. 5A, a 2D sweep can be run 612 using receiver firmware (or a control processor) to obtain the optimized jitter based on the margin available by fitting to the variation illustrated in FIG. 5C. The optimization process results in identifying 614 a sweet spot for operating the receiver at optimal clock recovery parameters (clock recovery bandwidth) in terms of existing channel information (to cover untracked jitter and optical nonlinear effects) and OSNR margin (to cope with linear cross-talk penalty). Both discrete look-up table or continuous fitting can be used to translate a jitter margin (defined based on specifications associated with the transceiver) into channel spacing for known OSNR. Put another way, the variation in FIG. 5C is employed to provide channel spacing when the jitter margin is estimated from neighboring channels. The estimated jitter margin includes nonlinear impacts. The fitting is employed to predict channel spacing with a margin.

[0060] In a gridless deployment the clock recovery bandwidth can be set 616 in the receiver to optimize the channel spacing for a given OSNR target and squeeze the channel spacing. With reference to FIGS. 4A and 4B, the clock recovery bandwidth is set by adjusting low pass filter 416 parameters. Channel spacing can be set by specifying digital accumulator 432 or controller 532 parameters.

[0061] The process illustrated in FIG. 5A can be implemented in a bandwidth utilization controller, such as but not limited to: a receiver controller, line card controller, a network node controller, a link controller, a control plane controller, an optical system controller, centralized network controller, etc., via coded logic including, but not limited to: firmware, software, state machine logic, etc.

[0062] To demonstrate the validity of the method illustrated in FIG. 5A, a grid-less experimental setup was employed. The experimental setup takes into consideration fiber propagation effects and introduces controlled impairments as illustrated in FIG. 6A to quantitatively assess benefits. The experiment intentionally applied stress to the receiver (Wavelogic modem) to confirm the proposed optimization would be stable in real-life scenarios. Multiple channels were mixed onto an optical fiber using gridless settings typically employed in deployments using Ciena 6500 ROADMs. The probe wavelength of interest was selected and coherent transceivers with programmable wavelength (adjustable lasers) were used to change channel spacing. Three channels were active with the center one being the probe and the other two channels as interferers. Operation at 35 GBaud was provided using three WaveLogic 3 transponders (100 G/150 G/200 G). To help mimic real fiber propagation, a polarization dependent loss emulator (PDL) and a differential group delay emulator (DGD) were used. A Variable Optical Attenuator (VOA) was used to control the amount of noise impairment provided by an ASE amplifier. The fiber spool was a few kilometers (but can be of any length as long as link budgeting is complied with). Polarization scramblers PC1, PC2 were employed to mix the transmitted polarizations. Measurement sweeps were performed over multiple Polarization Depended Loss (PDL), Differential Group Delay (DGD), State of Polarization rate (PC1/PC2) and OSNR values.

[0063] FIG. 6B illustrates a measured power distribution of the tested channels. During typical use neighboring channels have similar power. Employing higher power neighboring channels was used to apply stress at the receiver. The testing method can be generalized to any type of neighboring channels.

[0064] When trying to squeeze channels into a super-Nyquist mode of operation the penalty from linear cross-talk, looking like white noise, is apparent. The proposed method allowed for pushing the bounds at which receiver can carry traffic. The setup was able to operate without any errors with the same 2 dB OSNR penalty as non-optimal method but with 1 GHz less spacing as shown in FIGS. 6C and 6D. The experiment shows an ability to save about 10 to 20 GHz in the optical spectrum for each NMC.

[0065] It has been discovered that such a clock recovery scheme would benefit relaxing the stringent filtering requirements of the analog frontend when required in tight spacing applications, for example in submarine applications.

[0066] While the proposed solution has been described in detail with respect to increasing channel density in gridless deployments, the same circuits illustrated in FIGS. 4A and 4B can be employed to increase channel width in fixed grid deployments. In fixed grid deployments, increased Bit Error Rate (BER) can be tolerated at higher baud rates with a corresponding programmable lower neighboring channel attenuation being enforced (606) at the receiver by an optical filtering device such as a Wavelength Selective Switch (WSS) (not shown).

[0067] While the invention has been illustrated and described with reference to preferred embodiments thereof, it will be recognized by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.