METHOD FOR OPERATING A MULTILEVEL CONVERTER

Abstract

A method for operating a multilevel converter in flycap topology, in which the multilevel converter has at least two semiconductor switches controlled by control pulses of variable pulse durations within a control period that recurs at a control frequency to selectively interconnect a voltage source connected to an input of the multilevel converter, an output of the multilevel converter, and at least one auxiliary capacitor arranged between the input and the output, for generating an output voltage. The method includes using at least one oscillation parameter that describes the oscillation behavior of at least one harmonic of an electrical measured variable, at least one correction pulse duration is determined for a future control pulse to reduce the amplitude of the at least one harmonic and at least one semiconductor switch is controlled with a control pulse of the determined correction pulse duration.

Claims

1. A method for operating a multilevel converter in flycap topology, the multilevel converter having at least two semiconductor switches controlled by control pulses of variable pulse durations within a control period that recurs at a control frequency to selectively interconnect a voltage source connected to an input of the multilevel converter, an output of the multilevel converter, and at least one auxiliary capacitor arranged between the input and the output of the multilevel converter, for generating an output voltage of the multilevel converter, such that an auxiliary voltage is formed on the at least one auxiliary capacitor and at least one electrical voltage or at least one electrical current is measured as an electrical measured variable at a point that is electrically connected to the output of the multilevel converter, the method comprising: using at least one oscillation parameter derived from the electrical measured variable, the oscillation parameter describing oscillation behavior of at least one harmonic of the electrical measured variable and a frequency of the harmonic corresponding to an integral multiple of the control frequency; determining at least one correction pulse duration for a future control pulse to reduce an amplitude of the at least one harmonic, and controlling at least one of the semiconductor switches with a control pulse of the determined correction pulse duration.

2. The method according to claim 1, wherein, to determine the at least one correction pulse duration from the at least one oscillation parameter, the method further comprises determining at least one estimated value of an auxiliary voltage dropping across the at least one auxiliary capacitor is determined; determining a deviation between the at least one estimated value and a target value that is specified for the auxiliary voltage described by the at least one estimated value; and wherein the determined deviation is used to determine the at least one correction pulse duration.

3. The method according to claim 2, wherein the at least one estimated value of the auxiliary voltage dropping across at least one auxiliary capacitor is determined by solving a system of equations, in which the at least one oscillation parameter is taken into account as a known variable.

4. The method according to claim 2, wherein the determination of the at least one correction pulse duration based on the deviation between the at least one estimated value and the target value that is specified for the auxiliary voltage described by at least the one estimated value takes place by a control operator that maps the determined deviation to a controller output variable, wherein at least one correction pulse duration is determined from the controller output variable, where duration is assigned to at least one semiconductor switch provided in the multilevel converter, and wherein the correction pulse duration determined is subsequently used in order to control the at least one semiconductor switch.

5. The method according to claim 1, wherein the at least one correction pulse duration is determined from the electrical measured variable using a convolution operation in which the electrical measured variable is convolved with an impulse response derived from the at least one oscillation parameter.

6. The method according to claim 1, wherein at least one of a frequency, an amplitude or a phase position of the at least one harmonic of the electrical measured variable is determined as an oscillation parameter to describe the oscillation behavior of the at least one harmonic of the electrical measured variable.

7. The method according to claim 6, wherein the phase position of the at least one harmonic describes a time shift of the at least one harmonic to a beginning of a control period.

8. The method according to claim 1, wherein a frequency and/or, in accordance with an IQ method, two amplitudes of two signal components, which are phase-shifted by 90 degrees with respect to one another, of the at least one harmonic of the electrical measured variable are determined as an oscillation parameter to describe the used behavior of the at least one harmonic of the electrical measured variable.

9. A multilevel converter in flycap topology having an input and an output, the multilevel converter comprising: at least two semiconductor switches, which are controllable by control pulses of variable pulse durations within a control period that recurs at a control frequency; at least one auxiliary capacitor selectively interconnected between the input and the output via the at least two semiconductor switches; a voltage source connected to the input, the output and the at least one auxiliary capacitor for generating an output voltage, wherein an auxiliary voltage is formed at the at least one auxiliary capacitor, and wherein at least one electrical voltage or at least one electrical current as an electrical measured variable at a point which is electrically connected to the output is detectable, wherein at least one oscillation parameter derived from the electrical measured variable, the at least one oscillation parameter describing an oscillation behavior of at least one harmonic of the electrical measured variable, where the frequency of the harmonic corresponds to an integral multiple of the control frequency, is used to determine at least one correction pulse duration for a subsequent control pulse to reduce an amplitude of the at least one harmonic and to control at least one of the semiconductor switches with the at least one control pulse with the determined correction pulse duration.

10. A multilevel converter in flycap topology according to claim 8, wherein a control unit is coupled to use the at least one oscillation parameter derived from the electrical measured variable to determine the at least one correction pulse duration for the future control pulse to reduce the amplitude of the at least one harmonic and to control the at least one of the semiconductor switches with the at least one control pulse with the determined correction pulse duration.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In the following, the present invention is described in greater detail with reference to FIG. 1 to 8, which, by way of example, show schematic and non-limiting advantageous embodiments of the invention. In the drawing:

[0029] FIG. 1 is a schematic representation of a 5-level converter with an output filter;

[0030] FIG. 2 shows switch combinations for the voltage level u/4 in the case of a 5-level converter;

[0031] FIG. 3 shows a time course of an output voltage and the spectral decomposition thereof;

[0032] FIG. 4 shows a first course of control pulses;

[0033] FIG. 5 shows a second course of control pulses;

[0034] FIG. 6 shows a third course of control pulses when using the method according to the invention;

[0035] FIG. 7 is a first block diagram for implementing the method according to the invention;

[0036] FIG. 8 is a second block diagram for implementing the method according to the invention;

DETAILED DESCRIPTION

[0037] The particulars shown herein are by way of example and for purposes of illustrative discussion of the embodiments of the present invention only and are presented in the cause of providing what is believed to be the most useful and readily understood description of the principles and conceptual aspects of the present invention. In this regard, no attempt is made to show structural details of the present invention in more detail than is necessary for the fundamental understanding of the present invention, the description taken with the drawings making apparent to those skilled in the art how the several forms of the present invention may be embodied in practice.

[0038] FIG. 1 is a schematic representation of a 5-level converter 1 in flycap topology. In the situation shown, a voltage source S connected to the input E of the 5-level converter 1 supplies the 5-level converter 1 with the input voltage u. The input voltage u is preferably provided in the form of a DC voltage (DC supply). In this case, the voltage source S can be designed in particular as a rectifier or a DC intermediate circuit. However, it should be noted that an AC voltage source can also be used to implement the present invention, for example in the form of an inverter, which in turn is supplied by a rectifier, or in the form of a (frequency) converter. If a multilevel converter to which embodiments of the method are applied has a different topology, other connection points for a voltage source S and thus an input E are also conceivable. The 5-level converter 1 is in this case based on the reference potential G.

[0039] In addition to the voltage source S, three auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 are provided in the case shown, which provide the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 as shown. The number of auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 can be selected as desired with regards to the method according to the embodiments; a larger or smaller number of auxiliary capacitors is also conceivable, which can be connected to one another in a different way. However, at least one auxiliary capacitor is necessary. In order to connect the voltage source S, the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2, and the output A, the semiconductor switches T.sub.01,T.sub.02, . . . T.sub.31,T.sub.32 are used in the situation shown, which are implemented in particular by transistors of various types, such as field effect transistors.

[0040] Controlling the semiconductor switches T.sub.k1, T.sub.k2 takes place, as is customary in semiconductor technology and power electronics, by electrical control pulses in the form of electrical voltages which typically have a fixed pulse height. However, the pulse widths or pulse durations τ.sub.k of these control pulses can usually be changed and thus also in the present case can be adapted to the requirements of a given situation. A specific sequence of switching pulses for the semiconductor switches T.sub.01,T.sub.02, . . . , T.sub.31,T.sub.32 is also referred to as a switching pattern in this context. In the course of the implementation of a switching pattern, each switch is typically opened at least once using a control pulse of pulse duration τ.sub.k and then closed again within a control period AP that recurs at a control frequency f.sub.A, whereby different desired output voltages u.sub.out can be generated. This procedure is well known in semiconductor technology and power electronics, in particular as PWM (pulse width modulation) technology. In the case shown in FIG. 1, a switching pattern is generated by the control unit 2 and implemented at the semiconductor switches T.sub.01,T.sub.02, . . . T.sub.31,T.sub.32 using the electric control pulses mentioned. In this case, the control unit 2 can be implemented in particular by microprocessor-based hardware, microcontrollers, and/or integrated circuits (ASIC, FPGA). The control unit 2 objectively also records the target value u*.sub.out to be realized for the output voltage u.sub.out. Since, as mentioned, the method according to the embodiments is not limited to the topology shown in FIG. 1, other locations as output A are also conceivable.

[0041] In other words, any auxiliary capacitor C.sub.j can be bridged using the semiconductor switches T.sub.01,T.sub.02, . . . T.sub.31,T.sub.32, connected in series to another capacitor, or connected in series to a plurality of other auxiliary capacitors. The counter variable j serves to index the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 provided in the 5-level converter 1 under consideration. Depending on the switching states of the semiconductor switches T.sub.01,T.sub.02, . . . T.sub.31,T.sub.32, various serial interconnections of different combinations of auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 are connected to the output A.

[0042] The semiconductor switches T.sub.k1,T.sub.k2 are each switched in a complementary manner, wherein the counter variable k is used to index the semiconductor switches shown. This means that one of the two switches is always open and the other is closed, whereby the semiconductor switches T.sub.k1,T .sub.k2 form a functionally related pair of semiconductor switches T.sub.k1,T.sub.k2. In the present case, it is therefore sufficient for a description of a given position of the switch pair of semiconductor switches T.sub.k1,T.sub.k2 of each of these switch pairs to show only the switch position of the upper (or lower) semiconductor switch T.sub.k1 (or T.sub.k2). An open semiconductor switch T.sub.k1 is usually specified with “1” or “T.sub.k1=1”; a closed semiconductor switch T.sub.k1 on the other hand is specified with “0” or “T.sub.k1=0”. For a complete description of all the switch positions occurring in a multilevel converter 1, a series of digits “1” and “0” is common, for example “0110”, wherein the digits from left to right represent the semiconductor switches T.sub.k1 assigned from left to right. In the situation shown in FIG. 1, “0110” would therefore mean T.sub.31=0, T.sub.21=1, T.sub.11=1, T.sub.01=0.

[0043] In the structure shown in FIG. 1, the output filter AF is also connected to the output A of the 5-level converter 1. The output voltage u.sub.out is present at the output filter AF, which causes the output current i.sub.out to flow into the output filter AF. In the present case, the load current i.sub.L leaves the output filter AF, which load current i.sub.L subsequently supplies the load Z.sub.L. In cases of this type, the output filter AF is usually used to smooth the output voltage u.sub.out and output current i.sub.out, but it can also be or include a known EMC (electromagnetic compatibility) filter. A preferred embodiment of an output filter AF is often given by a well-known LCL filter.

[0044] In principle, output filters AF are used to suppress interference signals which are also generated by converters in addition to the actually desired time curves of output variables. In the present context, interference signals mean in particular harmonics in the output voltage u.sub.out and the output current i.sub.out, whereby harmonics in the present context are to be understood as frequency components of u.sub.out and i.sub.out, the frequencies of which each correspond to an integral multiple of the control frequency f.sub.A.

[0045] For this purpose, the output filter AF is usually dimensioned in such a way that a satisfactory suppression, in particular of the dominant harmonic of the load current i.sub.L, is reached. The frequency of the dominant harmonic is usually given by the product of the number of switch pairs T.sub.k1,T.sub.k2 and the control frequency f.sub.A and is often referred to as the “fundamental tone.” For harmonics, whose frequencies lie between the control frequency f.sub.A and the frequency of the fundamental tone, the term “undertone” is often used, including the following explanations. At this point, it should be emphasized that the output filter AF is not a necessary prerequisite for implementing the method according to the invention. In order to implement the method according to the invention, in addition to the output voltage u.sub.out and the output current l.sub.out, measurements of electrical variables prevailing in the output filter AF can also be used, which is indicated in FIG. 1 by the variable x.

[0046] As mentioned, the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 play a substantial role in the operation of a multilevel converter 1. In the case of the 5-level converter 1 shown, it proves to be particularly advantageous to select the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 in such a way that the differences between the auxiliary voltages C.sub.0, C.sub.1 or C.sub.1, C.sub.2 dropping across two adjacent auxiliary capacitors u.sub.0, u.sub.1 or u.sub.1, u.sub.2 are always given by the auxiliary voltage u.sub.0 of the output-side auxiliary capacitor C.sub.0. If the same is also required for the difference between the voltage u of the voltage source S and the auxiliary voltage u.sub.2 of the first input-side auxiliary capacitor C.sub.2, this can be expressed mathematically by the equation

u−u.sub.2=u.sub.2−u.sub.1=u.sub.1−u.sub.0=u.sub.0

which is fulfilled in particular by the assignment

[00001] $u_{0} = \frac{u}{4}, u_{1} = \frac{2 u}{4}, .Math. {.Math.}_{2} = \frac{3 u}{4} .$

These values are preferably also used as target or default values u*.sub.0, u*.sub.1, u*.sub.2 for the auxiliary voltages u.sub.0, u.sub.1, u.sub.2. Target values u*.sub.0, u*.sub.1, u*.sub.2 for the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 can be passed on to the control unit 2, just like the target value u*.sub.out for the output voltage u.sub.out. It should be noted at this point that advantageous values for the auxiliary voltages can also be determined in the same way for other multilevel converters 1 with a different number of switching stages. However, the present invention in no way presupposes this preferred choice of auxiliary voltages u.sub.0, u.sub.1, u.sub.2, and could also be used with differently selected target values u*.sub.0, u*.sub.1, u*.sub.2 for the auxiliary voltages u.sub.0, u.sub.1, u.sub.2. However, an advantage of precisely this choice that is important in practice is that the resulting voltage levels are distributed evenly over the voltage interval from 0 to u, which can be represented with the output voltage u.sub.out, which primarily allows for a fine-grained voltage generation in the entire voltage interval.

[0047] In general, for an N-level converter, which according to its designation has a number of N voltage levels, a corresponding choice could be represented as

[00002] $u_{j}^{⋆} = j \frac{u}{N - 1} .$

At this point, however, it should be noted again that the presented assignment of target values u*.sub.j for the auxiliary voltages u.sub.j does not necessarily have to be the case, and that other target values u*.sub.j could also be selected for an operation according to the invention of a multilevel converter 1, in particular since the method according to the invention, as mentioned, is not limited to the number of three auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 of the present embodiment. If the method according to the invention is used in a multilevel converter that has a different number of auxiliary capacitors, the same requirement for identical differences between the auxiliary voltages dropping across two adjacent auxiliary capacitors results in different default values for the auxiliary voltages.

[0048] There are multiple options for loading the auxiliary voltages in a multilevel converter 1 at the start of operation, for example to the specified target values

[00003] $u_{j}^{*} = j \frac{u}{N - 1}$

or to other target values. The given pairs of semiconductor switches T.sub.k1, T.sub.k2 can be switched to “1” at the start of operation, i.e. be switched to the switch position “1111.” After the desired voltage level u*.sub.j for the respective auxiliary capacitors C.sub.j has been reached, the pairs of semiconductor switches T.sub.k1,T.sub.k2 can be switched back to “0” starting from the right, i.e. from the output side, whereby the initially present interconnection of all auxiliary capacitors C.sub.j is dissolved one after another and the auxiliary voltages u.sub.j from the auxiliary capacitors C.sub.j no longer connected to the positive pole u of the voltage source S remain at a voltage level.

[0049] In the 5-level converter 1 shown, the presented selection of the auxiliary voltages from

[00004] $u_{0} = \frac{u}{4}, u_{1} = \frac{2 u}{4}, u_{2} = \frac{3 u}{4}$

results in sixteen possible control combinations with which the output voltage v.sub.out can be assigned the five voltage levels

[00005] ${0, \frac{u}{4}, \frac{2 u}{4}, \frac{3 u}{4}, u} .$

While the lowest voltage level u.sub.out=0 is reached with the switch combination “0000” and the highest voltage level u.sub.out=u is reached with the switch combination “1111”, there are at least four different switch combinations for all other voltage levels.

[0050] How the same voltage level can be specifically generated with multiple switch combinations is shown in FIG. 2 on the basis of a more abstract consideration of the 5-level converter 1 in question. With the help of the switch combinations shown, four serial connections of the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 are implemented, which result in four different connection paths between the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2, the voltage source S, and the output A. In the case shown in FIG. 2, all switch positions shown produce the same output voltage

[00006] $u_{out} = \frac{u}{4} .$

Switch positions that result in the same output voltage are referred to in this context as “redundant switch positions” or “redundant switch combinations.” It should be noted in this case that identical output voltages u.sub.out occur in these cases precisely when the equation mentioned above for equal voltage differences between the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 of two adjacent auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 is satisfied. If specific voltage levels are required at the output of the multilevel converter 1 in the course of a pulse width modulation (PWM) and if there are a plurality of redundant circuit combinations for these voltage levels, it is possible to continuously switch between these redundant circuit combinations within a control period AP in an advantageous manner and thus make a selective selection from the redundant circuit combinations. Since a plurality of smaller partial pulses usually result in the generated output variables within a control period AP, the residual ripple in the output variables generated by the multilevel converter 1 is reduced in particular. To implement this concept, however, it is crucial that all auxiliary voltages u.sub.0, u.sub.1, u.sub.2 remain as constant as possible during operation and as close as possible to their target values.

[0051] For a more detailed explanation as to why adverse changes in the auxiliary voltages in real operation of multilevel converters 1 u.sub.0, u.sub.1, u.sub.2 may occur, reference should first be made to the fact that an auxiliary capacitor C.sub.j is charged precisely when T.sub.j+1.1−T.sub.j,1=1 applies for the difference in the switch positions of the adjacent semiconductor switches, and that it is discharged precisely when T.sub.j+1.1−T.sub.j,1=−1 applies for that very difference. The counter variable j serves in this case, as before, for indexing the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 provided in the 5-level converter 1 under consideration. Typically, charging and discharging switch positions occur to the same extent for an auxiliary capacitor C.sub.j during a control period AP. If the durations of the resulting charging and discharging time sub-intervals are identical, and if that amount of charge that is taken from an auxiliary capacitor C.sub.j, in the event of a corresponding discharge, is introduced back into the auxiliary capacitor C.sub.j by a charging process, a so-called balanced Charge balance is created over a control period AP, resulting in the same auxiliary voltages u.sub.0, u.sub.1, u.sub.2 at the beginning and end of a control period AP.

[0052] Disturbances that occur in practice, such as component scattering of the semiconductor switches T.sub.01,T.sub.02, . . . T.sub.31,T.sub.32 and load currents i.sub.L that change over time, often result in a deviation from this ideal situation. In particular, load currents i.sub.L that change over time can result in a difference between the charge withdrawal in a discharging phase of an auxiliary capacitor C.sub.j and the charge injection in a charging phase, which means that the auxiliary voltage u.sub.j dropping across the auxiliary capacitor C.sub.j can sometimes change significantly.

[0053] For these reasons, among others, the method according to the invention aims to improve the balance of auxiliary voltages during operation of multilevel converters in flycap topology 1. For this purpose, the invention uses the knowledge that, conversely, by deliberately modifying the pulse durations τ.sub.k of the control pulses, which are used to open and close the semiconductor switches T.sub.01,T.sub.02, . . . T.sub.31,T.sub.32, disturbances in the balance of the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 can be counteracted in a targeted manner.

[0054] Accordingly, the method according to the invention provides for the pulse durations τ.sub.k of the respective control pulses for opening and closing the semiconductor switches T.sub.01,T.sub.02, . . . T.sub.31,T.sub.32 to be increased or decreased, in a preferred manner by 1% to 10%, in a further preferred manner by 10% to 50%, and in a further preferred manner by 50% to 100% of their original value, so that the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 are charged and discharged in such a way that there is a balanced charge balance on the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2, and the associated auxiliary voltages u.sub.0, u.sub.1, u.sub.2 are thus kept constant and balanced.

[0055] To implement this modification of the pulse durations τ.sub.k according to the invention, a remarkable finding is used, namely that there is a connection that is surprising and just as astonishing, but which is in particular analytically describable, between the harmonics of an output signal generated by a multilevel converter 1 and the auxiliary voltages dropping across its auxiliary capacitors u.sub.0, u.sub.1, u.sub.2. This shows that, from the amplitudes and phase positions of the undertones, i.e. the harmonics of an output variable such as output voltage u.sub.out or output current i.sub.out, the frequencies of which are between the control frequency f.sub.A and the frequency of the fundamental tone, the actual values of the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 dropping across the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 can be inferred. In particular, it was recognized that vanishing amplitudes of the undertones in an output variable of a multilevel converter 1 such as that from FIG. 1 are equivalent to balanced, i.e. constant, auxiliary voltages. In the state of balanced auxiliary voltages u.sub.0, u.sub.1, u.sub.2, it is particularly noteworthy that in this case output variables such as the output voltage u.sub.out only include frequency components, whose frequencies correspond to integral multiples of the frequency of the fundamental tone.

[0056] In order to describe this relationship and the implementation of the steps according to the invention in more detail, FIG. 3 shows a possible time course of an output variable and of four harmonics contained therein. Specifically, the first line of the diagram represents a possible time course of a resulting, pulsed output voltage u.sub.out. A qualitative representation of the first four harmonics is shown in the following lines, whereby these are broken down into two sinusoidal or cosinusoidal components which are phase-shifted by 90 degrees with respect to one another, which is also known in literature as the IQ method. In an advantageous manner, these signal components can be selected in such a way that a zero crossing of one of these signal components, which are phase-shifted by 90 degrees with respect to one another, coincides with the beginning and with the end of a control period. The amplitudes or weights U.sub.1I, U.sub.1Q, U.sub.2I, . . . U.sub.4I, U.sub.4Q are used in FIG. 3 to describe these signal components, which are phase-shifted by 90 degrees to one another, using suitable oscillation parameters which can be determined using a whole range of methods from signal processing. From the relevant literature, the (discrete) Fourier analysis or the IQ method mentioned should be mentioned in particular.

[0057] As mentioned, the harmonics are related to the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 and can be represented analytically. Specifically, for signal components determined according to the IQ method and their weights U.sub.1I, U.sub.1Q, U.sub.2I, . . . U.sub.4I, U.sub.4Q with the so-called degree of modulation m which represents the relation between the target output voltage u*.sub.out and the maximum displayable output voltage u, i.e.

[00007] $m = \frac{u_{out}^{*}}{u},$

the relationship

U.sub.0=mu [0058] results for the direct component of the output voltage; [0059] the relationship

[00008] $\begin{matrix} U_{1 I} = \frac{2}{π} \sin (π m) (u_{0} - u_{1} - u_{2} + u), & U_{1 Q} = \frac{2}{π} \sin (π m) (- u_{0} - u_{1} + u_{2}), \end{matrix}$ [0060] results for the first harmonic (PWM fundamental, first “undertone”); [0061] the relationship

[00009] $\begin{matrix} U_{2 I} = \frac{1}{π} \sin (2 π m) (- 2_{u_{0}} - 2_{u_{1}} - 2_{u_{2}} + u), & U_{2 Q} \end{matrix} = 0$ [0062] results for the second harmonic or the second undertone; [0063] and the relationship

[00010] $\begin{matrix} U_{4 I} = \frac{2}{π} \sin (4 π m) .Math. u, & U_{4 Q} = 0 \end{matrix}$ [0064] results for the fourth harmonic which also describes the fundamental tone of the output variable.

[0065] While the DC component and the fundamental tone only depend on the degree of modulation m, the undertones in particular also depend on the auxiliary voltages. At this point, it is easily seen that auxiliary voltages that remain constant at

[00011] $u_{0} = \frac{u}{4}, u_{1} = \frac{2 u}{4}, u_{2} = \frac{3 u}{4}$

cause the undertones of the output voltage to disappear.

[0066] The relationships shown make it clear that maintaining the charge balance on the auxiliary capacitors C.sub.0, C.sub.1, C.sub.2 or balancing or keeping the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 constant is equivalent to suppressing the undertones. If the pulse durations τ.sub.k are now modified or adjusted in such a way that balanced auxiliary voltages u.sub.0, u.sub.1, u.sub.2 result at the specified target values, the weights U.sub.I, U.sub.1Q, U.sub.2I, U.sub.2Q are brought to zero. Conversely, weights U.sub.1I, U.sub.1Q, U.sub.2I, U.sub.2Q brought to zero mean balanced auxiliary voltages. The balancing of auxiliary voltages and the suppression of undertones are therefore equivalent. This astonishing relationship can also be specified in an adapted form for other topologies of multilevel capacitors, for example with a different number of auxiliary capacitors or with different target values for the auxiliary voltages.

[0067] The pulse durations τ.sub.k can be adjusted in a preferred manner by determining new, so-called correction pulse durations τ*.sub.k on the basis of the weights U.sub.1I, U.sub.1Q, U.sub.2I, U.sub.2Q. The new correction pulse durations τ*.sub.k replace existing pulse durations τ.sub.k for controlling the semiconductor switches T.sub.k1,T.sub.k2 and modify their opening and dosing times in such a way that balanced auxiliary voltages u.sub.0, u.sub.1, u.sub.2 are set. The correction pulse durations τ*.sub.k can only be used in a future method step to actually control a semiconductor switch T.sub.01,T.sub.02, . . . T.sub.31,T.sub.32.

[0068] To implement the method according to the invention, it should be noted that the use of weights U.sub.ηIand U.sub.ηQ of two partial signals of a harmonic, which signals are phase-shifted by 90 degrees, wherein, from one of these partial signals, one zero crossing preferably coincides with the beginning and one zero crossing preferably coincides with the end of a control period, is just one of many approaches. In the case of the 5-level converter 1 in question, the counter variable η runs from one to four. The determination of correction pulse durations τ*.sub.k can take place just as well based on amplitude U.sub.η and phase position φ.sub.η of a total harmonic, wherein, as is well known, the relationship U.sub.ηI=U.sub.η.Math.cos(φ.sub.η) and U.sub.nηQ=U.sub.η.Math.sin(φ.sub.η) applies in this case, and thus the same information is transported by amplitude U.sub.η and phase position φ.sub.η as by the weights U.sub.ηI and U.sub.ηQ.

[0069] In this case, the phase position of a harmonic describes its (temporal) shift at the start of a control period AP, for example by describing the (temporal) shift of the first zero crossing of the harmonic in a control period AP at the start of the control period AP.

[0070] Since in many cases the amplitude U.sub.η and the phase position φ.sub.η of a signal component can be determined more directly and easily than the presented weights U.sub.ηL and U.sub.ηQ, the use of amplitude U.sub.η and phase position φ.sub.η represents a further advantageous embodiment of the method according to the invention. In general terms, at least one oscillation parameter is used to implement the method according to the invention, which parameter describes the oscillation behavior of at least one harmonic of the electrical measured variable x.

[0071] The description of the oscillation behavior is primarily understood as a description of the frequency and/or amplitude and/or phase position of a harmonic. In this sense, a suitable oscillation parameter can be implemented in many different ways, for example in the form of a complex amplitude, as is well known from complex AC calculations. If a complex amplitude is used to describe a harmonic, a single oscillation parameter may already be sufficient for describing a harmonic according to the invention.

[0072] Conversely, the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 can also be recalculated from the undertones by solving a system of equations. Since the system only has 3 degrees of freedom u.sub.0, u.sub.1, u.sub.2, just as many spectral components, i.e. amplitudes or weights of harmonics, are required. In a particularly advantageous embodiment of the method according to the invention, the bijective relationship

u.sub.0, u.sub.1, u.sub.2 .Math. U.sub.1I, U.sub.1Q, U.sub.2I

is used in this sense, for example in the form of a system of equations consisting of the above equations, in order to first determine estimated values û.sub.0, û.sub.1, û.sub.2 of the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 from oscillation parameters such as U.sub.1I, U.sub.1Q, U.sub.2I, said estimated values corresponding to the above relationship. At this point, as already mentioned earlier, it should be noted that the specific number of auxiliary capacitors and the specific number of auxiliary voltages associated therewith are not decisive for the applicability of the method according to the invention. In the case of a larger number of auxiliary capacitors, only a correspondingly larger number of auxiliary voltages and a correspondingly larger number of weights of undertone amplitudes would have to be used, and the relationship between auxiliary voltages and harmonics, i.e. undertones and fundamental tone, would have to be adapted to the given situation.

[0073] The estimated values û.sub.0, û.sub.1, û.sub.2 can then be compared with target values u*.sub.0, u*.sub.1, u*.sub.2 provided for them, which are specified, for example, by an operator or a higher-level control loop. In the present case, the presented choice

[00012] $u_{0}^{*} = \frac{u}{4}, u_{1}^{*} = \frac{2 u}{4}, u_{2}^{*} = \frac{3 u}{4}$

can be advantageously used as target values u*.sub.0, u*.sub.1, u*.sub.2, whereby, as already mentioned, an optionally different choice of target values does not constitute a limitation of the present invention.

[0074] Finally, the deviations e.sub.0=u*.sub.0−û.sub.0, e.sub.1=u*.sub.1−û.sub.1, e.sub.2=u*.sub.2−û.sub.2 resulting from this comparison between target and estimated values can be used to set the correction pulse durations of the control pulses, for which, for example, a suitable controller output variable is calculated using a controller transfer function from the determined deviations e.sub.0=u*.sub.0−û.sub.0, e.sub.1=u*.sub.1−û.sub.1, e.sub.2=u*.sub.2−û.sub.2, which variable describes the correction pulse durations for future control of the semiconductor switches. To carry out this step, a wide variety of procedures from control engineering can in turn be used.

[0075] A general suppression of harmonics, as is made possible by the method according to the invention, results in a number of significant advantages in practical operation, in particular with regard to the output filter AF that is usually to be provided in the case of a mains feed. In the simplest case, the output filter AF is an LCL low-pass filter, the cut-off frequency of which is designed to suppress the fundamental tone. A reduction in the cut-off frequency to the undertones would be directly associated with increased material and space requirements for the filter. In order to be able to suppress the undertones, an ohmic resistor would also be necessary in many cases in an output filter AF, which resistor would drastically reduce the efficiency of the converter 1 and subsequently require additional space for appropriate cooling.

[0076] Another serious disadvantage of insufficient suppression of undertones in the load current i.sub.L is that in many cases this can further increase an unbalanced and/or time-varying load on the multilevel converter, which can represent a possible cause for a lack of charge imbalance. This in turn can result in positive feedback in which the unbalanced loading of the multilevel converter 1 results in an increased charge imbalance, and the increased charge imbalance in turn increases the load asymmetry. The behavior of the entire multilevel converter 1 can thus become unstable or chaotic. The controlled suppression of the undertones is therefore substantial for the practical use of multilevel converters.

[0077] One way in which the pulse durations τ.sub.k of the control pulses for opening and closing the respective semiconductor switches T.sub.k1, T.sub.k2 can be specifically determined in order to subsequently modify them according to the method according to the invention is shown in FIG. 4. In the embodiment shown, the degree of modulation m is used again, which as before stands for the relation of target output voltage u*.sub.out and maximum representable output voltage u, i.e.

[00013] $m = \frac{u_{out}^{*}}{u} .$

In particular, a target value to be realized u*.sub.out can be represented by the degree of modulation m. The procedure shown can preferably be implemented in the control unit 2.

[0078] In FIG. 4, comparison signals r.sub.k assigned to the respective semiconductor switches are compared with the degree of modulation m, with a semiconductor switch T.sub.k1 being controlled and thus opened when the comparison signal r.sub.k assigned thereto, hereinafter also referred to as “travelling wave,” is greater than m, and otherwise remains closed. The respective traveling waves r.sub.k are phase-shifted in relation to one another in such a way that identical signal sections are distributed in the various traveling waves r.sub.k at equal time intervals over a control period AP. An idealized course of an output voltage u.sub.out generated by this procedure is shown in the lower half of the diagram using signal u.sub.out. Since the desired voltage is just below the voltage level

[00014] $\frac{u}{2}$

in the specific example, the voltage levels

[00015] $\frac{u}{2} and \frac{u}{4}$

alternate in pulses in me output variable. What happens in a case where the desired output voltage is just above an available voltage level, is shown in FIG. 5. Contrary to the situation from FIG. 4, the target voltage given in this case slightly above the voltage level

[00016] $\frac{u}{2}$

causes a continuous change between the voltage levels

[00017] $\frac{u}{2} and \frac{3 u}{4}$

in the output variable.

[0079] The method according to the invention can now make use of a change in the degree of modulation m within a control period AP in an advantageous manner in order to bring about the adaptation of the pulse durations τ.sub.k according to the invention. What such a course of a degree of modulation m that changes during a control period AP can look like is shown in FIG. 6. The result is output voltage pulses with different pulse durations τ.sub.k, by means of which the voltage-time area required by a conventionally superimposed PWM is nevertheless generated in the control period AP, but at the same time the balance of the auxiliary voltages u.sub.0, u.sub.1, u.sub.2 according to the invention is also achieved. In order to implement a degree of modulation m that changes within a control period AP, a plurality of approaches can be used. For this purpose, a time-varying modulation degree m(t) or m[n] with the discrete time index n or a plurality of degrees of modulation m.sub.0, m.sub.1, m.sub.2, m.sub.3 that are constant over a corresponding control period AP and that are assigned to the switch pairs T.sub.k1, T.sub.k2 are conceivable.

[0080] FIG. 7 also shows how the method according to the invention can be implemented using a block diagram. The measurement signal x[n] preferably represents the output voltage u.sub.out or the output current i.sub.out, measured at points in time t.sub.n defined by the discrete time index n. From the measurement signal x, the spectral components X.sub.0, X.sub.1I, X.sub.1Q and X.sub.2I are first determined as oscillation parameters using the FFT (“Fast Fourier Transformation”) block. The main element of the block diagram is the control operator R shown as a block in FIG. 7, which determines the spectral components M.sub.0, M.sub.1I, M.sub.1Q, M.sub.2I of the degree of modulation m from the spectral components or oscillation parameters X.sub.0, X.sub.1I, X.sub.1Q, X.sub.2I of the measurement signal. In the specific case, this control operator R can without restriction be interpreted as a 4×4 matrix. In many cases, it is advantageous to use a pure diagonal matrix as the control operator R. In this case, this can be represented, for example, by an LTI (multivariable) system, which allows an efficient implementation, preferably in the form of a discrete, linear, and often time-invariant filter.

[0081] In the case shown in FIG. 7, the individual degrees of modulation m.sub.0, m.sub.1, m.sub.2, m.sub.3 are determined using the block IFFT, which represents a vector-valued, inverse Fourier transformation. As shown by the multiplexer block in FIG. 7, these individual degrees of modulation m.sub.0, m.sub.1, m.sub.2, m.sub.3 are converted in a further step into a degree of modulation m[n] that changes over time.

[0082] In a further advantageous embodiment of the method according to the invention, an average degree of modulation m can be specified, which ensures that the DC component X.sub.0 follows a target value, for example u*.sub.out. Based on the invention described, an average degree of modulation m of this type can be varied piece by piece in a further step based on individual degrees of modulation m.sub.0, m.sub.1, m.sub.2, m.sub.3, and can be subsequently shown using a time-changing course of the degree of modulation m[n], as shown for example in FIG. 6. As mentioned, a comparison of such a time course of the degree of modulation m[n] with one or more traveling waves r.sub.k can be used to determine the desired correction pulse durations τ*.sub.k which keep the auxiliary capacitors and thus the auxiliary voltages dropping across them in balance.

[0083] In a preferred embodiment, the blocks FFT, control operator R, and IFFT can also be concentrated into one block, which is shown in FIG. 8. The middle block is characterized by the impulse response h[n] and summarizes the mentioned FFT, control operator R, and IFFT. The steps previously carried out in the separate blocks can thus be carried out, for example, by means of the mathematical operation of convolution, which is well known from control engineering, wherein the measurement signal x[n] is convolved with the impulse response h[n], which in turn can be used to determine a time course of a degree of modulation m[n], from which, as shown in FIG. 4, FIG. 5, and FIG. 6, the correction pulse durations τ*.sub.k ultimately sought can be determined by a comparison with traveling waves r.sub.k. This approach allows the at least one correction pulse duration τ*.sub.k to be determined from the electrical measured variable x using a convolution operation in which the electrical measured variable x is convolved with an impulse response derived from the at least one oscillation parameter. The impulse response can preferably be derived from an oscillation parameter, which contains information about the frequency of the harmonic it describes, in that said impulse response is selected in such a way that the loop amplification of the control loop from the correction pulse duration τ*.sub.k to the measured variable x and back to the correction pulse duration τ*.sub.k lays at a pole, i.e. assumes a very large amplification, but at least an amplification greater than one, at the frequency of the harmonic described by the oscillation parameter.

[0084] In an advantageous embodiment, in order to suppress a plurality of harmonics, a plurality of poles located at the frequencies of said plurality of harmonics are introduced into the above-mentioned loop. Various approaches from control engineering can also be used to design the impulse response on the basis of one or more oscillation parameters, such as H-infinity control, repetitive control, or other control design methods based on optimization. An impulse response of this type, which can also be implemented as a z-transfer function or as a digital filter, among other things, is preferably designed before the start of operation of the multilevel converter and is no longer changed during operation. In certain cases, however, it can also be advantageous to adapt such an impulse response during operation and, for example, to adapt it to changing oscillation parameters.

[0085] A block diagram for implementing the method according to the invention, as shown in FIG. 7 or FIG. 8, can preferably be implemented on the control unit 2 which records the measurement data of the measured variable x according to the invention, which performs the calculations corresponding to the block diagram and outputs the desired, adjusted correction pulse durations τ*.sub.k, optionally on the basis of a previously calculated course of a degree of modulation m[n], as shown in FIG. 4, FIG. 5, and FIG. 6. Assuming that a linear output filter AF (LTI system, for example in the form of an LCL filter) is connected to the output of the multilevel converter 1, the overtones of voltages and currents entering or leaving the output filter AF are always linked by a complex-valued, so-called undertone impedance. The reaction of the load Z.sub.L on the undertone impedances is negligible in most cases relevant to practice, which is why it is irrelevant whether a voltage or a current is measured at the input or output of the output filter AF for carrying out the method according to the invention. It is crucial that the point at which the measurement is taken is electrically connected to the output. A linear combination of a plurality of measured variables is also conceivable, which can bring advantages in particular with regard to the signal-to-noise ratio (“SNR”).

[0086] In addition to the above-described control unit 2, which can be implemented in particular by microprocessor-based hardware, microcontrollers, and/or integrated circuits (ASIC, FPGA), control unit 2 can be implemental digitally, as software on microprocessor-based hardware. Thus, control unit 2 can be physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, and the like, which may be formed using semiconductor-based fabrication techniques or other manufacturing technologies, and/or analog instrumentation, e.g., analog electric/electronic circuits, analog computers, analog devices, etc. Further, the switching pattern to be generated by control unit 2 which can be implemented by microprocessors or similar components, programmed using software (e.g., microcode) to perform various functions discussed herein and may optionally be driven by firmware and/or software. Alternatively, control unit 2 may be implemented by dedicated hardware, or as a combination of dedicated hardware to perform some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) to perform other functions.

[0087] At least one memory (not shown), e.g., a non-transitory computer readable medium or media, can be provided to store one or more sets of instructions to perform any of the methods or computer-based functions disclosed herein, either alone or in combination with the other described devices. The at least one memory, accessible by the processors, can be part of the controller or remote from the controller, e.g., a remotely located server, memory, system, or communication network or in a cloud environment.

[0088] It is noted that the foregoing examples have been provided merely for the purpose of explanation and are in no way to be construed as limiting of the present invention. While the present invention has been described with reference to an exemplary embodiment, it is understood that the words which have been used herein are words of description and illustration, rather than words of limitation. Changes may be made, within the purview of the appended claims, as presently stated and as amended, without departing from the scope and spirit of the present invention in its aspects. Although the present invention has been described herein with reference to particular means, materials and embodiments, the present invention is not intended to be limited to the particulars disclosed herein; rather, the present invention extends to all functionally equivalent structures, methods and uses, such as are within the scope of the appended claims.

METHOD FOR OPERATING A MULTILEVEL CONVERTER

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H02M3/158

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H02M7/4837

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H02M1/0095

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H02M1/12

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H02M7/4833

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H02M1/12

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H02M1/00

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H02M3/158

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Abstract

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Description