Abstract
Disclosed is a phase-shifted square wave modulation technique for single-phase and three-phase IM2DC applications in HVDC/MVDC systems. A square wave based modulation waveform is applied to each cell of IM2DC and compared to the phase-shifted carrier waveforms to generate device gate signals. As a result, a higher equivalent switching frequency can be achieved, and square wave based arm and AC link waveforms will be generated. In addition, power flow of IM2DC can be controlled by a phase shift angle of the square modulation waveforms between HVS and LVS. The converter cell capacitors can be reduced in size because they are only required to smooth high switching frequency ripple components. In addition, lower TDR can be achieved due to the higher power transferring capability of square waves.
Claims
1. A method for reducing power fluctuations in a DC to DC converter to reduce component requirements and improve efficiency, the method comprising: providing an isolated modular multilevel DC to DC converter (IM2DC) comprising a high-voltage side (HVS) modular multilevel converter (MMC) that is coupled by a transformer to a low-voltage side (LVS) MMC, wherein each MMC comprises arms, and wherein each arm includes one or more cells that each comprises a capacitor and switches to charge/discharge the capacitor according to gate signals; generating, using a digital controller, gate signals for each cell, wherein the generating comprises comparing a square waveform with a triangular waveform, and wherein the triangular waveform for each cell in an arm has a different phase; and applying the gate signals for each cell to the switches in each cell to produce an arm voltage, wherein the arm voltage has a square wave aspect and a high frequency aspect that reduce power fluctuations in the IM2DC during DC to DC conversion.
2. The method according to claim 1, wherein the square wave aspect reduces an energy storage requirement for the DC to DC conversion.
3. The method according to claim 2, wherein the reduced energy storage requirement reduces the size of the capacitors necessary for the IM2DC.
4. The method according to claim 1, wherein the square wave aspect increases the efficiency of the DC to DC conversion.
5. The method according to claim 1, wherein the increased efficiency decreases the total device rating (TDR) of the IM2DC.
6. The method according to claim 1, wherein the high frequency aspect reduces an inductance requirement for the DC to DC conversion.
7. The method according to claim 6, wherein the reduced inductance requirement reduces the size of inductors necessary for the IM2DC.
8. The method according to claim 6, wherein the high frequency aspect corresponds to a high equivalent switching frequency for the DC to DC conversion.
9. The method according to claim 1, wherein the IM2DC has a single-phase topology.
10. The method according to claim 1, wherein the IM2DC has a three-phase topology.
11. The method according to claim 1, wherein the IM2DC has a multi-phase topology.
12. The method according to claim 1, wherein the one or more cells are full-bridge cells.
13. The method according to claim 1, wherein the one or more cells are half-bridge cells.
14. The method according to claim 1, wherein phases of the triangular waveforms for the cells of an arm are separated by 2/N, wherein N is the number of cells in the arm.
15. The method according to claim 1, wherein the phases of the triangular waveforms for the cells of an arm are separated by /N, wherein N is the number of cells in the arm.
16. The method according to claim 1, further comprising: performing DC to DC conversion using the IM2DC in a HVDC/MVDC application.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) FIG. 1 is a circuit schematic of a single-phase IM2DC known in the prior art comprising of three two single-phase MMCs connected through a medium frequency transformer, wherein either FB or HB are cascaded in each arm.
(2) FIG. 2 is a circuit schematic of a three-phase IM2DC known in the prior art comprising of three two three-phase MMCs connected through medium frequency transformers, wherein either FB or HB are cascaded in each arm.
(3) FIG. 3 is a diagram illustrating the conventional modulation methods known in the prior art, including the phase-shifted sinusoidal modulation, two-level modulation, quasi-two-level modulation and triangular modulation.
(4) FIG. 4 is graphical illustration of the operation modes and corresponding HVS waveforms of a DC to DC converter as described herein when the cell number equals four with 2/N phase-shifted carriers for single-phase IM2DC.
(5) FIG. 5 is a graphical illustration of the HVS ac voltage and dc inductor voltage of a DC to DC converter as described herein with lower ac link dv/dt.
(6) FIG. 6A is a graphical illustration of the corresponding converter waveforms of a DC to DC converter as described herein with the same modulation waveform magnitudes between HVS and LVS.
(7) FIG. 6B illustrates an exploded view of the shaded area in FIG. 6A.
(8) FIG. 7 is a graphical illustration of the corresponding HVS waveforms of a DC to DC converter as described herein when the cell number equals two with /N phase-shifted carriers for single-phase IM2DC.
(9) FIG. 8 is a graphical illustration of the corresponding waveforms of a DC to DC converter as described herein when the cell number equals four for three-phase IM2DC.
DETAILED DESCRIPTION
(10) In various embodiments, described herein are modulation methods for IM2DC, including single-phase and three-phase topologies, FB and HB cells. The methods provided herein can result in both smaller dc inductors and cell capacitors with the same power ratings as compared to conventional modulation technologies. In addition, smaller TDR can be achieved with the high efficient power transferring capability of square waves.
(11) An exemplary embodiment is shown with reference to FIG. 4. The high voltage side (HVS) waveforms of a modulation strategy as well as the corresponding arm voltages and transformer voltage for the single-phase IM2DC are illustrated in FIG. 4, where four cells within one arm is selected as an example. A square waveform with 0.5 duty cycle is adopted as the modulation waveform, where magnitude M.sub.SQ and dc offset d are controllable. m.sub.a(b)ph and M.sub.a(b)nh of FIG. 4 are the modulation waveforms of phase a (b) upper arm and lower arm, respectively. N.sub.HV is the HVS cell number in one arm (4 in this example), C.sub.1C.sub.4 are carrier waveforms. m.sub.aph is the same as m.sub.bnh, which is 180 phase-shifted with the m.sub.anh and m.sub.bph. A phase-shifted angle 2/N.sub.HV, is applied among C.sub.1C.sub.4, which increases the equivalent switching frequency and benefits natural balancing. As shown in FIG. 4, when the square modulation waveform varies with different M.sub.SQ and d, the generated arm voltage v.sub.xyh (x=a, b; y=p, n) and ac voltage v.sub.ab changes accordingly, resulting in four different operation modes. Among these operation modes, FIG. 4(a) is considered as the desired mode with largest modulation index since v.sub.ab can be as high as dc bus voltage V.sub.dch, which achieves lowest converter TDR. In addition, the highest voltage ripple frequency and lowest ripple magnitude occur at the same time on the dc inductor voltage v.sub.Lah and v.sub.Lbh in this mode, which indicates the smallest inductor size can be achieved. When the modulation index becomes smaller as shown in FIG. 4(b)(d), the dc voltage utilization ratio becomes lower and the converter TDR increases. When the modulation waveform magnitude equals to approximately 0.5 as shown in FIG. (d), the 2-level ac link waveform is generated, which loses the advantages of multilevel converter.
(12) Next, an embodiment for reduced dv/dt is shown in FIG. 5. A staircase or trapezoidal modulation waveform instead of a square wave can be utilized to reduce the ac voltage dv/dt, FIG. 5(a)(d) demonstrates v.sub.ab with different staircase and trapezoidal modulation waveforms. When the staircase level increases, v.sub.ab has more levels and smaller dv/dt, smaller dc current ripples can be obtained as well due to higher equivalent ripple frequency of v.sub.Lah and v.sub.Lbh. FIG. 5 also indicates that 6-level staircase wave modulation already attains the same ac voltage level with that of trapezoidal wave modulation, which is adequate for reduced dv/dt performance.
(13) FIG. 6A depicts the key waveforms considering both HVS and LVS with the disclosed modulation method. The operation principle of LVS is similar to that of HVS, but with a phase shift angle to transfer the power. The magnitude of modulation waveforms in LVS equals to that of the HVS modulation waveform to ensure high efficiency. Similar to MMC, both dc bus current i.sub.dch and transformer current i.sub.ac flow though the cells, therefore the arm current contains both dc and ac components as shown in FIG. 6A using HVS phase a arm i.sub.aph and i.sub.anh as examples. Moreover, the small stair step angle with acceptable dv/dt are preferred, otherwise the dc voltage utilization may be sacrificed. It is worth mentioning that the magnitude of modulation waveform can vary in the LVS to regulate the LVS dc bus voltage, however, the converter reactive power increases so the power transferring efficiency will be lower. FIG. 6B presents the zoomed view of the shaded area in FIG. 6A, which illustrates the staircase pattern of ac link voltage with lower dv/dt than pure square wave.
(14) The phase-shifted angle can also be /N.sub.HV among the carriers in one phase. Consequently, it is possible to reduce the dc inductor further. As illustrated in FIG. 7, the cell number is selected to be two as an example. C.sub.a(b)phi and C.sub.a(b)nhi (i=1, 2) are the carrier waves for the ith cell of the upper arm and lower arm respectively in phase a(b) at HVS. A phase-shifted angle equaling to /N.sub.HV exists among all the carriers within each phases. A large modulation index is applied to guarantee highest dc voltage utilization ratio. FIG. 7 shows that the corresponding dc inductor voltages of phase a and phase b are 180 phase shifted. Consequently, the dc inductor current of phase a and phase b are also 180 phase shifted. Therefore, the dc inductor current ripples of two phases cancels each other when flowing together, resulting in the dc bus current with twice switching ripple frequency and smaller ripple current compared to the case of 2/N.sub.HV phase-shifted carriers. In addition, higher control bandwidth can be achieved as well with higher equivalent switching frequency. However, the dc inductor current ripples become larger which may have adverse impacts on reducing the dc inductor size.
(15) The embodiments described herein can be applied to the three-phase IM2DC topology as well utilizing the similar methods as previously described. The modulation waveforms and corresponding IM2DC key waveforms are illustrated in FIG. 8, where four cells in one arm with 2/N phase-shifted carriers as an example. The modulation waveforms of upper arms and lower arms are 180 phase-shifted with a dc offset. The modulation and carrier waveforms of three phases are 120 phase-shifted. Therefore, the phase voltages v.sub.x and v.sub.x (x=a, b, c) are 120 phase-shifted. A phase-shift angle is applied between the HVS and LVS modulation waveform to transfer power. A staircase transformer current i.sub.x is generated. The dc current ripple frequency is as high as 2N times of the switching frequency leading to a reduced dc inductor size. Similar to the single-phase case, staircase or trapezoidal modulation waveforms can be employed instead of pure square waveforms to achieve lower ac link dv/dt.
(16) Those skilled in the art will appreciate that the features described herein can be combined in various ways to form multiple variations of the disclosure. As a result, the invention is not limited to the specific examples described.
