MICROMECHANICAL STRUCTURE HAVING A COPPER CIRCUIT TRACE

Abstract

A micromechanical structure includes a fixing point, a silicon spring, and a movable part. The silicon spring is connected to the fixing point at a first end and to the movable part at a second end. At least one copper circuit trace is situated on the silicon spring and extends at least from the first end to the second end. The copper circuit trace has a layer structure including a plurality of contiguous copper layers.

Claims

1. A micromechanical structure comprising: a fixing point; a movable part; a silicon spring connected to the fixing point at a first end of the silicon spring and connected to the movable part at a second end of the silicon spring; and at least one copper circuit trace that is situated on the silicon spring, extends at least from the first end to the second end, and is formed as a layer structure including a plurality of contiguous copper layers.

2. The micromechanical structure of claim 1, wherein the at least one copper circuit trace has, for each of the copper layers of the respective trace, a respective maximum grain size determined by a layer thickness of the respective copper layer.

3. The micromechanical structure of claim 2, wherein the at least one copper circuit trace has a maximum grain size of d<1 m.

4. The micromechanical structure of claim 1, wherein the at least one copper circuit trace has a high level of twinned crystals.

5. The micromechanical structure of claim 1, wherein the at least one copper circuit trace includes at least two copper circuit traces situated on the silicon spring.

6. A method for manufacturing a micromechanical structure, the method comprising: providing a silicon wafer with a lower oxide layer on silicon wafer, a silicon layer situated above the lower oxide layer, and an upper oxide layer situated above the silicon layer; patterning a trench into the upper oxide layer; galvanically depositing a plurality of contiguous copper layers forming a copper circuit trace in the trench by depositing copper using a high current density and a low current density in an alternating manner; depositing a passivation layer over the copper circuit trace and the upper oxide layer; patterning a spring into the passivation layer, the upper oxide layer, and the silicon layer, stopping at the lower oxide layer; and removing the lower oxide underneath the patterned spring, thereby releasing the spring with the copper circuit trace being situated on the spring.

Description

BRIEF DESCRIPTION OF THE DRAWING

[0015] FIG. 1 schematically shows a micromechanical structure having a copper circuit trace, according to an example embodiment of the present invention.

[0016] FIG. 2 schematically shows a cross section of the micromechanical structure of FIG. 1, according to an example embodiment of the present invention.

[0017] FIG. 3 is a flowchart that illustrates a manufacturing process of a copper circuit trace made up of n+1 copper layers, according to an example embodiment of the present invention.

[0018] FIG. 4 is a flowchart that illustrates a method for manufacturing a micromechanical structure having a copper circuit trace, according to an example embodiment of the present invention.

[0019] FIG. 5 shows a first stage of the micromechanical structure having a copper circuit trace after deposition of the copper and prior to patterning the spring, according to an example embodiment of the present invention.

[0020] FIG. 6 is a representation of an SEM photograph of the cross section of a Cu circuit trace produced by a Damascene process at Robert Bosch GmbH.

[0021] FIG. 7 is a representation of an SEM photograph of the cross section of a Cu layer produced at Robert Bosch GmbH using an adapted electroplating recipe, according to an example embodiment of the present invention.

DETAILED DESCRIPTION

[0022] FIG. 1 schematically shows a micromechanical structure having a copper circuit trace, according to an example embodiment of the present invention. A micromechanical structure having a fixing point 30, a silicon spring 10, and a movable part 40 is depicted. Silicon spring 10 is connected to the fixing point at a first end 13 and to movable part 40 at a second end 14. In this manner, movable part 40 is suspended flexibly relative to fixing point 30 with the aid of silicon spring 10. Two copper circuit traces 20 are situated on silicon spring 10, the copper circuit traces extending at least from first end 13 to second end 14 and being made of fine-grained copper, for example, having grain sizes d<1 m. In this context, the copper circuit traces have a layer structure including a plurality of contiguous copper layers 21. To that end, FIG. 2 schematically shows a cross section of the micromechanical structure of the present invention, from FIG. 1. Copper circuit traces 20 are situated in grooves in an upper oxide layer 200 on the upper surface of silicon spring 10. A passivation layer 210 is situated above the copper circuit traces and the upper oxide layer.

[0023] An overall structure of spring+circuit trace, which behaves mechanically purely elastically and nevertheless provides a high electrical conductivity in the conductive material, is produced as described in the following.

[0024] The Cu for the copper circuit trace is deposited in a Damascene process. For this, the copper is introduced into a groove, provided beforehand, in the upper oxide layer on the silicon spring. In this instance, the copper is galvanically deposited. During the electroplating, modulation of the applied current causes the copper to be deposited in a layer structure having a plurality of superposed, contiguous copper layers 21. The thickness of the respective copper layer 21 substantially determines the maximum grain size of copper in this layer.

[0025] FIG. 3 schematically shows a manufacturing process of a copper circuit trace made up of n+1 copper layers. In a manufacturing step 300, copper is galvanically deposited at a high current, for example, at a current density>>15 mA/cm.sup.2. In a manufacturing step 310, copper is subsequently deposited at a low current, for example, at a current density<15 mA/cm.sup.2. This sequence is carried out n times. In a manufacturing step 320, copper is subsequently deposited at a high current, for example, at a current density>>15 mA/cm.sup.2. This method can be put at the beginning of a method for manufacturing a micromechanical device of the present invention.

[0026] FIG. 4 schematically shows a method for manufacturing a micromechanical structure having a copper circuit trace, according to an example embodiment of the present invention. In a step A, a silicon wafer 1 having a lower oxide layer 100 situated on it and a silicon layer 110 situated on the lower oxide layer is provided. In a step B, an upper oxide layer 200 is deposited on the upper surface of the wafer, that is, on silicon layer 110. In a step C, a copper circuit trace 20 is defined, using photolithography. In a step D, a trench is patterned into oxide layer 200, using, for example, dry-etching. Subsequently, the resist is removed, for example, using plasma ashing. In a step E, a suitable diffusion barrier and a Cu seed layer are deposited, for example, using cathode sputtering. In a step F, a copper circuit trace made up of n+1 copper layers is produced, using galvanic deposition as described with regard to FIG. 3. In a step G, copper is removed, for example, by CMP, until the copper only remains in the previously patterned trenches in upper oxide layer 200. In a step H, a passivation layer is deposited over copper circuit traces 20 and upper oxide layer 200. In a step I, a spring 10 is defined with the aid of photolithography. In a step K, using dry-etching, for example, spring 10 is patterned into passivation layer 210, upper oxide layer 200 and silicon layer 110, stopping on lower oxide layer 100. Subsequently, the photoresist is removed, for example, using plasma ashing. In a step L, spring 10 is released by removing the lower oxide 100 under it, for example, using gas-phase etching.

[0027] FIG. 5 shows a first stage of the micromechanical structure having a copper circuit trace, according to an example embodiment of the present invention, after deposition of the copper and prior to patterning the spring. A silicon wafer 1 having a lower oxide layer 100 situated on it is depicted. Over oxide layer 100, a silicon layer 110 and upper oxide layer 200 are positioned in this order. Upper oxide layer 200 includes grooves in which copper circuit traces 20 made up of thin copper layers 21 are galvanically deposited. Copper circuit traces 20 and upper oxide layer 200 are covered by a passivation layer 210. The dashed lines schematically indicate the boundary of the silicon spring 10 to be subsequently patterned out of silicon layer 110, upper oxide layer 200, and passivation layer 210. Thus, copper circuit traces 20 are situated in grooves in upper oxide layer 200, at the upper surface of future silicon spring 10.

[0028] The Damascene Cu circuit traces are constructed as highly fine-grained copper having, for example, grain sizes of d<1 m. Due to this, the yield point in the copper increases markedly in accordance with the Hall-Petch relationship (for example, according to Gottstein, Physikalische Grundlagen der Materialkunde (Physical Principles of Materials Science), 3r.sup.d Edition, Springer-Verlag, Berlin, Heidelberg, 2007, pp. 260 ff., formula (6.92b), as well as Table 6.5, from 74 MPa at d=5 m to 148 MPa at d=0.8 m), which means that operation in the purely elastic range is possible for many applications. However, the electrical conductivity is affected only negligibly by this. In this instance, the fine-grained structure of the copper is thermally and mechanically stable, which means that its advantages are even reliably available in the case of prolonged operation. This type of construction of the Cu traces only generates a low level of extra technical expense in the deposition step of the Cu itself, but no additional masking levels, layers or the like are necessary.

[0029] In addition, the fine-grained copper can be produced in a manner allowing many twinned crystals to form, which are effective for mechanical stabilization, but scarcely reduce the electrical conductivity.

[0030] The publications, Shen et al., Tensile properties of copper with nano-scale twins, Scripta Materialia 52 (2005) 989-994, and Wang et al., An electroplating method for copper plane twin boundary manufacturing, Thin Solid Films 544 (2013) 157-161, describe methods for producing, using electrochemical deposition, such fine-grained, full-surface copper layers, which are made up of a plurality of partial layers and have a high level of twins. They emphasize a further advantage of such layers, namely, the increased resistance to electromigration. In Shen et al., the higher yield point of full-surface, fine-grained copper layers made up of a plurality of partial layers is experimentally confirmed.

[0031] FIG. 6 is a representation of an SEM photograph of a cross section of a copper circuit trace produced by the Damascene process at Robert Bosch GmbH. The thickness of the Cu circuit trace is 3.8 m.

[0032] FIG. 7 is a representation of an SEM photograph of the cross section of a copper circuit trace produced at Robert Bosch GmbH using an adapted galvanic deposition recipe. The thickness of the Cu circuit trace is 3 m. In this context, copper circuit trace 20 has a layer structure including a plurality of contiguous copper layers 21. In this instance, the layer thickness of each individual copper layer 21 is approximately 1 m. One clearly recognizes the grain size of d<1 m, which is reduced in comparison with the specimen shown in FIG. 6. The grain size is evidently limited by the layer thickness of the respective copper layer 21.