Integrated Passive Device for RF Power Amplifier Package

Abstract

The present disclosure relates to a radio frequency (RF) power transistor package. It further relates to a mobile telecommunications base station comprising such an RF power transistor package, and to an integrated passive die suitable for use in an RF power amplifier package. In example embodiments, an in-package impedance network is used that is connected to an output of the RF power transistor arranged inside the package. This network comprises a first inductive element having a first and second terminal, the first terminal being electrically connected to the output of the RF transistor, a resonance unit electrically connected to the second terminal of the first inductive element, and a second capacitive element electrically connected in between the resonance unit and ground, where the first capacitive element is arranged in series with the second capacitive element.

Claims

1. A radio frequency (RF) power amplifier, comprising: a first semiconductor die, wherein the first semiconductor die comprises an RF power transistor that has an output capacitance (Cds) and is configured to amplify signals at an operational frequency; an impedance network comprising: a first inductive element (L1) having a first terminal and a second terminal, the first terminal being electrically connected to an output of the RF transistor; a resonance unit being electrically connected to the second terminal of L1; and a second capacitive element (C2) electrically connected in between the resonance unit and a ground terminal; wherein the resonance unit comprises (i) a second inductive element (L2) electrically connected in between C2 and L1 and (ii) a first capacitive element (C1) having a first terminal and a second terminal, the first terminal of C1 being electrically connected to the second terminal of L1; wherein the capacitance of C2 is larger than the capacitance of C1; wherein the second terminal of C1 is electrically connected to C2; wherein L1, C1, and L2 are chosen such that, at or close to the operational frequency: an impedance of L2 causes more RF current to flow through C1 than through L2; and an effective inductance formed by L1, the resonance unit, and C2 resonates with Cds; wherein the RF power transistor is configured to be fed using a feed inductance (Lfeed), and wherein C2 is configured to resonate with Lfeed at a first resonance frequency that is smaller than the operational frequency; wherein L2 is configured to resonate with C1 at a second resonance frequency, wherein the first resonance frequency is smaller than the second resonance frequency and wherein the second resonance frequency is smaller than the operational frequency; and wherein the resonance unit comprises a resistive element for damping signals oscillating at the first and second resonance frequencies.

2. The RF power amplifier of claim 1, wherein at least one of L1 or L2 comprises an integrated inductor or a bond wire.

3. The RF power amplifier of claim 1, wherein the resistive element is arranged in series with L2 or is integrated therewith.

4. The RF power amplifier of claim 1, wherein at least one of C1 or C2 comprises an integrated capacitor.

5. The RF power amplifier of claim 1, wherein: the first resonance frequency lies in the range of 5 to 20 MHz, the second resonance frequency lies in the range of 300 to 650 MHz, and the operational frequency lies in the range of 800 MHz to 3.5 GHz and above; the first semiconductor die comprises a Silicon die or a Gallium Nitride die; and the RF power transistor comprises at least one of a laterally diffused metal-oxide-semiconductor transistor or a field-effect transistor.

6. The RF power amplifier of claim 1, further comprising: a package, wherein the first semiconductor die and the impedance network are arranged in the package.

7. The RF power amplifier of claim 6, wherein C1 and C2 are integrated on the first semiconductor die, wherein the package comprises a flange and an output lead, and wherein the first die is mounted to the flange.

8. The RF power amplifier of claim 6, wherein C1 and C2 are integrated on a second semiconductor die arranged inside the package, wherein the package comprises a flange and an output lead, and wherein the first and second semiconductor dies are mounted to the flange.

9. The RF power amplifier of claim 6, wherein C1 comprises a first electrode, a second electrode, and a first dielectric arranged between the first and second electrodes of C1, wherein C2 comprises a first electrode, a second electrode, and a second dielectric arranged between the first and second electrodes of C2, wherein the first electrode of C1 is electrically coupled to L1, wherein the second electrode of C1 is electrically coupled to the first electrode of C2, and wherein the second electrode of C2 is electrically connected to the ground terminal.

10. The RF power amplifier of claim 9, wherein: C1 and C2 are integrated on a second semiconductor die arranged inside the package; the first and second semiconductor dies are elongated in a first direction; C2 comprises a deep trench capacitor with a plurality of trenches extending along the second semiconductor die, the second dielectric being arranged inside the plurality of trenches; a top electrode is arranged over the second dielectric; and a metal contact layer is arranged on the top electrode, wherein the metal contact layer comprises a plurality of slots along the first direction.

11. The RF power amplifier of claim 10, wherein C2 extends a first distance in the first direction, wherein the plurality of slots of the metal contact layer extend along a second distance in the first direction, and wherein the second distance is substantially equal to the first distance.

12. The RF power amplifier of claim 8, wherein the resistive element is integrated on the second semiconductor die, and wherein the resistive element is a thin film resistor.

13. The RF power amplifier of claim 8, wherein the first semiconductor die comprises an output bond pad assembly electrically connected to the output of the RF transistor, wherein the second semiconductor die comprises a first bond pad assembly electrically connected to C1, wherein the RF power amplifier package further comprises a first plurality of bond wires that electrically connect the output bond pad assembly of the first semiconductor die to the first bond pad assembly of the second semiconductor die, and wherein the first plurality of bond wires form at least part of L1.

14. The RF power amplifier of claim 13, further comprising a second plurality of bond wires electrically connecting the output bond pad assembly of the first semiconductor die to the output lead of the package.

15. The RF power amplifier of claim 13, wherein the second semiconductor die further comprises: a second bond pad assembly, and an integrated third capacitive element (C3) having a first terminal electrically connected to the second bond pad assembly and a second terminal electrically connected to the flange, the second semiconductor die, or C2.

16. The RF power amplifier of claim 15, further comprising: a third plurality of bond wires electrically connecting the second bond pad assembly of the second semiconductor die to the output lead of the package.

17. The RF power amplifier of claim 16, further comprising a third inductive element (L3) arranged in series between (i) the output lead of the package and (ii) the flange, the second semiconductor die, or C2, wherein the third plurality of bond wires form at least part of L3; wherein L3 and C3 are configured to provide an impedance match for the RF power transistor at the operational frequency, and wherein C3 comprises a deep trench capacitor or a metal-insulator-metal capacitor.

18. The RF power amplifier of claim 6, wherein the package further comprises a bias lead and a fourth plurality of bond wires extending from the bias lead to C1.

19. An integrated passive die for use in a radio frequency (RF) power amplifier comprising: a first semiconductor die, wherein the first semiconductor die comprises an RF power transistor that has an output capacitance (Cds) and is configured to amplify signals at an operational frequency; an impedance network comprising: a first inductive element (L1) having a first terminal and a second terminal, the first terminal being electrically connected to an output of the RF transistor; a resonance unit being electrically connected to the second terminal of L1; and a second capacitive element (C2) electrically connected in between the resonance unit and a ground terminal; wherein the resonance unit comprises (i) a second inductive element (L2) electrically connected in between C2 and L1 and (ii) a first capacitive element (C1) having a first terminal and a second terminal, the first terminal of C1 being electrically connected to the second terminal of L1; wherein the capacitance of C2 is larger than the capacitance of C1; wherein the second terminal of C1 is electrically connected to C2; wherein L1, C1, and L2 are chosen such that, at or close to the operational frequency,: an impedance of L2 causes more RF current to flow through C1 than through L2; and an effective inductance formed by L1, the resonance unit, and C2 resonates with Cds; wherein the RF power transistor is configured to be fed using a feed inductance (Lfeed), and wherein C2 is configured to resonate with Lfeed at a first resonance frequency that is smaller than the operational frequency; wherein L2 is configured to resonate with C1 at a second resonance frequency, wherein the first resonance frequency is smaller than the second resonance frequency and wherein the second resonance frequency is smaller than the operational frequency; and wherein the resonance unit comprises a resistive element for damping signals oscillating at the first and second resonance frequencies.

20. A mobile telecommunications base station comprising a radio frequency (RF) power amplifier, wherein the RF power amplifier of the mobile telecommunications base station comprises: a first semiconductor die, wherein the first semiconductor die comprises an RF power transistor that has an output capacitance (Cds) and is configured to amplify signals at an operational frequency; an impedance network comprising: a first inductive element (L1) having a first terminal and a second terminal, the first terminal being electrically connected to an output of the RF transistor; a resonance unit being electrically connected to the second terminal of L1; and a second capacitive element (C2) electrically connected in between the resonance unit and a ground terminal; wherein the resonance unit comprises (i) a second inductive element (L2) electrically connected in between C2 and L1 and (ii) a first capacitive element (C1) having a first terminal and a second terminal, the first terminal of C1 being electrically connected to the second terminal of L1; wherein the capacitance of C2 is larger than the capacitance of C1; wherein the second terminal of C1 is electrically connected to C2; wherein L1, C1, and L2 are chosen such that, at or close to the operational frequency,: an impedance of L2 causes more RF current to flow through C1 than through L2; and an effective inductance formed by L1, the resonance unit, and C2 resonates with Cds; wherein the RF power transistor is configured to be fed using a feed inductance (Lfeed), and wherein C2 is configured to resonate with Lfeed at a first resonance frequency that is smaller than the operational frequency; wherein L2 is configured to resonate with C1 at a second resonance frequency, wherein the first resonance frequency is smaller than the second resonance frequency and wherein the second resonance frequency is smaller than the operational frequency; and wherein the resonance unit comprises a resistive element for damping signals oscillating at the first and second resonance frequencies.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0041] FIG. 1A illustrates a circuit topology for an RF power amplifier, according to an example embodiment.

[0042] FIG. 1B illustrates an impedance as a function of frequency of the circuit topology depicted in FIG. 1A, according to an example embodiment.

[0043] FIG. 2A illustrates a circuit topology for an RF power amplifier, according to an example embodiment.

[0044] FIG. 2B illustrates an impedance as a function of frequency of the circuit topology depicted in FIG. 2A, according to an example embodiment.

[0045] FIG. 3A illustrates a circuit topology for an RF power amplifier, according to an example embodiment.

[0046] FIG. 3B illustrates an impedance as a function of frequency of the circuit topology depicted in FIG. 3A, according to an example embodiment.

[0047] FIG. 4A illustrates a circuit topology for an RF power amplifier, according to an example embodiment.

[0048] FIG. 4B illustrates a circuit topology for an RF power amplifier, according to an example embodiment.

[0049] FIG. 4C illustrates a circuit topology for an RF power amplifier, according to an example embodiment.

[0050] FIG. 4D illustrates a circuit topology for an RF power amplifier, according to an example embodiment.

[0051] FIG. 5A illustrates a circuit topology for an RF power amplifier, according to an example embodiment

[0052] FIG. 5B illustrates an arrangement of an RF power amplifier package, according to an example embodiment.

[0053] FIG. 6A illustrates a semiconductor die for use in the RF power amplifier package depicted in FIG. 5B, according to an example embodiment.

[0054] FIG. 6B illustrates a semiconductor die for use in the RF power amplifier package depicted in FIG. 5B, according to an example embodiment.

DETAILED DESCRIPTION

[0055] FIG. 3A illustrates a general topology in accordance with the present disclosure. When comparing this topology with the topology in FIG. 2A, it can be seen that C1 is no longer directly connected to ground but is instead connected to C2. This latter capacitor, being substantially larger than C1, may act as a ground at the operational frequency of the RF power transistor. In addition, a resistive element R is arranged in series with L2.

[0056] Similar to the topology of FIG. 2A, a first resonance can be observed in the impedance seen looking away from the FET illustrated in FIG. 3B, which can be attributed to the parallel resonance of C2 and Lfeed. At this resonance frequency, the impedance of the series connection of L2 and R may be substantially smaller than the impedance of C1. As such, the effective capacitance that is arranged in parallel to Lfeed may be roughly equal to C2. Moreover, the currents at this frequency may flow through R, causing damping of the resonance peak in the impedance.

[0057] A second resonance peak can be observed in FIG. 3B, which can be attributed to the parallel resonance of C1 and L2, similar to the resonance in the topology of FIG. 2A. Also, in this case, current may flow through R, causing damping of the resonance peak in the impedance.

[0058] At the operational frequency, L2 may substantially block the RF current, causing the larger part thereof to flow through C1 and C2. Consequently, the impact of the ohmic losses in R may be negligible at these frequencies. Moreover, at these frequencies, the effective capacitance to ground of the resonance unit may be substantially equal to C1, as C1 and C2 are arranged in series. L1 and C1 may be chosen such that, at or close the operational frequency, the resonance circuit acts as an inductance having a value substantially equal to L1. This effective inductance may resonate with Cds to mitigate the impact of Cds at the operational frequency. At this frequency, the RF power transistor may see only the desired impedance realized by the combination of the matching network, which is at least partially arranged outside the package, and the external load.

[0059] The description above provides a description of the functionality of the components Cds, L1, L2, R, C1, and C2. It is understood that the values for these components may depend on, inter alia, the desired operational frequency, the size of the RF power transistor and the type of this transistor, the desired impedance behavior of the impedance at the second order IMD frequencies, and the desired bandwidth of the RF power amplifier made using the RF power amplifier package. The disclosure is therefore not limited to a particular range of values of these components.

[0060] FIGS. 4A-4D show further topologies in accordance with the present disclosure. Here, an additional capacitor C4 can be identified that models the parasitic capacitance seen at the output lead of the package. Moreover, component C3 and L3 are added to perform an impedance matching inside the package at the operational frequency, for example to perform a downward impedance transformation for transforming the impedance at the output lead when looking at the external load to a lower value seen by the RF power transistor.

[0061] FIGS. 4A-4D differ in how C3 and L3 are connected. Depending on the desired functionality of L3, different implementations can be identified. For example, if L3 is intended solely for impedance matching, the following matching stages can be identified at the operational frequency:

[0062] For the FIG. 4A and 4B topology, a first stage may comprise a series inductance L4 and a shunt capacitance equal to C3, where C4 may be much smaller than C3, and C3 may be much smaller than C2.

[0063] For the FIG. 4C and 4D topology, a first stage may comprise a series inductance L3 and a shunt capacitance equal to C3, and a second stage may comprise a series inductance L4 and a shunt capacitor equal to C4.

[0064] Alternatively, L3 can be part of an impedance inverter, for instance when the RF power amplifier package is to be used in a Doherty amplifier, wherein the RF power amplifier package comprises an RF power transistor acting as a main amplifying stage and an RF power transistor acting as a peak amplifying stage. Referring to FIG. 4A, for example, an equivalent pi-network can be formed by the resonance network, Cds, L3, C3, and L4. These components may perform a 90 degrees phase shift, or multiples thereof, at the operational frequency. In such applications, the resonance unit may be designed such that, at the operational frequency, a residual capacitance exists to form the first shunt capacitor of the pi-network for the impedance inverter.

[0065] In FIGS. 4A and 4C, C3 is grounded directly. In practical implementations, C3 may be realized as a discrete capacitor that is mounted to the flange separately from the first and second dies. Alternatively, C3 may be integrated on the first or second die. In this latter case, C3 can be connected to the conducting substrate, which, in turn, can be connected to the flange. When C3 is integrated in the second die, it can be connected to C2, as illustrated in FIGS. 4B and 4D.

[0066] FIG. 5A illustrates an embodiment according to the present disclosure, wherein the feed line, modeled by Lfeed, is integrated in the package and connected to the second die, and more specifically to the first capacitor. This may allow for substantial reduction of the total size of the power amplifier and ease of use of the RF power transistor.

[0067] FIG. 5B illustrates an implementation of the embodiment of FIG. 5A. FIG. 5B shows a package comprising a flange 1, an output lead 2, and a bias lead 3. A pair of semiconductor dies 4 are mounted on the flange 1. On these semiconductor dies 4, RF power transistors 5 are arranged, which are only schematically illustrated. In this example, the RF power transistors 5 are formed as LDMOS transistors arranged on a highly doped substrate.

[0068] The gate input of one of the RF transistors 5 is connected to a bar-shaped bond pad assembly 6. A plurality of bond wires 7 are used to connect to the gate of the RF transistor 5.

[0069] The drain output of the RF transistor 5 is connected to a bar-shaped bond pad assembly 8. A plurality of bond wires 9, forming L4, connect the drain output to output lead 2. A second plurality of bond wires 10, forming L1, connect the drain output to a U-shaped bond pad assembly 11 that is arranged on a second die 18. This assembly is electrically connected to the common point of L2 and C1. A further plurality of bond wires 12, partially forming Lfeed, connects bias lead 3 to bond pad assembly 11. Bond wires 12 relay the bias to the other RF power transistor 5.

[0070] Bond wires 13, forming L3, connect output lead 2 to a bar-shaped bond pad assembly 14 that is electrically connected to a terminal of C3. The other terminal of C3 is connected to the top electrode of C2 (not illustrated). Bond wires 15, forming L2, connect bond pad assembly 11 to a bond pad 16 that is electrically connected to a thin film resistor R that is located at a buried position 17.

[0071] Die 18 may comprise a highly doped Silicon substrate on which C2 is distributed as a deep trench capacitor. The top electrode of C2 is connected to the bottom electrode of C1. The other electrode of C2 is formed by the highly doped substrate. The top electrode of C1 is connected to bond pad assembly 11.

[0072] The embodiment in FIG. 5B illustrates two separate dies 4, 18 on which the various components can be realized. However, the present disclosure does not exclude embodiments where only a single die is used on which both the active and passive components are integrated.

[0073] As can be seen in FIG. 5B, bond wires 9 carry the output current to output lead 2 across die 18. A return current may be associated with this current. This current is schematically illustrated in FIG. 6A. FIG. 6A illustrates the flange 1 on which the die 18 is arranged. FIG. 6A also shows the top electrode of C2, which, in this example, is formed as a 1 micrometer thick metal layer 19. The resistance associated with the metal layer 19 may be much higher than the resistance associated with flange 1. In some scenarios, unwanted losses may be introduced at the operational frequency. The embodiment shown in FIG. 6B may address such scenarios.

[0074] As shown in FIG. 6B, to direct the return current, slots 20 can be arranged in the metal layer 19 that extend perpendicular to the flow of the return current in FIG. 6A. Generally, C2 may be distributed over the entire die 18, thereby having an elongated structure extending in a first direction. Slots 20 may be arranged along this first direction and may extend over substantially the entire length of the metal layer 19. Using slots 20, the return current may be forced to flow through the flange 1, thereby reducing the losses at the operational frequency.

[0075] Although the present disclosure has been described using detailed embodiments thereof, it is understood that the present disclosure is not limited thereto, but that various modifications can be made to these embodiments without departing from the scope of the disclosure which is defined by the appended claims.