DC CURRENT CANCELLATION SCHEME FOR AN OPTICAL RECEIVER

Abstract

In high data rate receivers, comprising a photodetector (PD) and a transimpedance amplifier (TIA), a transmitted optical signal typically has poor extinction ratio, which translates into a small modulated current with a large DC current at the output of the PD. The large DC current saturates the TIA, which significantly degrades the gain and bandwidth performance. Accordingly, cancelling photo diode DC current in high data rate receivers is important for proper receiver operation. A DC current cancellation loop, comprising a low pass filter section and a trans-conductance cell (GM) are connected to the input of the TIA. PD DC current I.sub.DC is drawn from the input node of the TIA in the GM cell, such that the cancellation loop maintains the DC voltage value of the TIA input node to be the same as a reference voltage (V.sub.REF).

Claims

1. An optical receiver comprising: a first photodetector (PD) for converting a first input optical signal into a first PD current comprising a first AC component and a first DC component; a transimpendance amplifier (TIA) for converting the first AC component into a first voltage signal, the TIA comprising a first input; a signal path electrically connecting the TIA to the first PD in the absence of a capacitor therebetween; and a first DC cancellation loop connected to the signal path between the first PD and the TIA for cancelling the first DC component, the first DC cancellation loop comprising: a first input and a first output each connected to the first input of the TIA; a first trans-conductance cell capable of drawing in the first DC component, such that the first DC cancellation loop maintains a first DC voltage value of the first input of the TIA substantially the same as a first reference voltage V.sub.REF1, wherein V.sub.REF1 is equal to an actual TIA input voltage for a zero DC current condition; and a first low pass filter.

2. The optical receiver according to claim 1, further comprising a circuit for generating the first reference voltage.

3. The optical receiver according to claim 1, further comprising a replica TIA configured to provide the first reference voltage V.sub.REF1.

4. The optical receiver according to claim 1, wherein the first low pass filter comprises a first resistor and a first capacitor; and wherein the first capacitor is placed away from the signal path between the TIA and the first PD.

5. The optical receiver according to claim 4, wherein the first DC cancellation loop introduces a cutoff frequency in a transfer function of the TIA, wherein the cut-off frequency equals an open loop gain bandwidth (GBW) product; wherein [[GBW=G.sub.MR.sub.F/A.sub.o1/2R.sub.CC.sub.C]] $\mathrm{GBW}=\frac{G_M.Math.R_F}{A_O}.Math.\frac{1}{2.Math..Math..Math.R_C.Math.C_C};$ wherein G.sub.M is an AC trans-conductance of the first trans-conductance cell, R.sub.F is resistance of a TIA feedback resistor, A.sub.O is a TIA feed-forward amplifier DC gain, R.sub.C is a resistance of the first resistor, and C.sub.C is a capacitance of the first capacitor.

6. The optical receiver according to claim 4, wherein the first trans-conductance cell comprises a voltage amplifier, a bias current source, a differential pair (T.sub.1, T.sub.2) of transistors, and a current mirror; wherein the AC trans-conductance G.sub.M of the first trans-conductance cell is defined by:
[[G.sub.M=Ag.sub.mN.sub.1]]G.sub.M=A.Math.g.sub.m.Math.N wherein A is the gain of the voltage amplifier, g.sub.m is the trans-conductance of the differential pair (T.sub.1, T.sub.2), and N is a scaling factor of the current mirror and wherein N1.

7. The optical receiver according to claim 6, wherein the first capacitor comprises a miller capacitor disposed between the input and output of the voltage amplifier to boost the first capacitor's value by the gain A of the voltage amplifier.

8. The optical receiver according to claim 6, wherein N is between 4 and 40 enabling the trans-conductance cell to operate with a smaller bias current I.sub.B, to reduce power dissipation.

9. The optical receiver according to claim 1, wherein the first DC cancellation loop is configured to have an upper speed limit, which is equal or smaller than a lowest frequency component of the received optical signal, and a lower speed limit, which is equal or greater than a fastest variation of the DC component.

10. The optical receiver according to claim 1, further comprising: a second photodetector (PD) for converting a second input optical signal into a second PD current comprising a second AC component and a second DC component; wherein the TIA comprises a differential TIA for further converting the second AC component into a second voltage signal; and a second DC cancellation loop between the second PD and the TIA for cancelling the second DC component, the second DC cancellation loop comprising: a second input and a first second output, each DC connected to an input of the TIA; a second trans-conductance cell (G.sub.M), capable of drawing in the second DC component, such that the second DC cancellation loop maintains a second DC voltage value of the second input of the TIA the same as a second reference voltage V.sub.REF2), wherein V.sub.REF1 is defined by an actual TIA input voltage for zero DC current condition; and a second low pass filter.

11. The optical receiver according to claim 10, further comprising: an input port for inputting a combined optical signal; a polarization beam splitter for splitting combined optical signal into first and second polarized components; a local oscillator for generating first and second oscillator components; a first hybrid mixer for generating first and second phase differentiate optical signals from the first polarized component and the first oscillator component; a second hybrid mixer for generating third and fourth phase differentiated optical signals from the second polarized component and the second oscillator component; wherein the first and second input optical signals comprise the first and second phase differentiated optical signals.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The invention will be described in greater detail with reference to the accompanying drawings which represent preferred embodiments thereof, wherein:

[0018] FIG. 1 illustrates a schematic diagram of a conventional NRZ optical receiver;

[0019] FIG. 2 illustrates a schematic diagram of a conventional differential optical receiver;

[0020] FIG. 3 illustrates a schematic diagram of a fully differential optical receiver in accordance with an embodiment of the present invention;

[0021] FIG. 4 illustrates a photodetector and differential TIA structure of the optical receiver of FIG. 3;

[0022] FIG. 5 illustrates an embodiment of a transconductance cell in accordance with the present invention; and

[0023] FIG. 6 illustrates another embodiment of a photodetector and TIA structure of an optical receiver of the present invention.

DETAILED DESCRIPTION

[0024] While the present teachings are described in conjunction with various embodiments and examples, it is not intended that the present teachings be limited to such embodiments. On the contrary, the present teachings encompass various alternatives and equivalents, as will be appreciated by those of skill in the art.

[0025] FIG. 3 illustrates an embodiment of an electronic component in a packaged optical receiver 30 in accordance with an embodiment of the present invention. An input signal enters at a port 31. A small portion of the input optical signal, e.g. less than 5%, may be split off and sent to a monitor photodiode 32, which generates an electrical signal that may be used to monitor properties of the input optical signal, such as its power content. In other embodiments, the power of the input optical signal can be monitored using different hardware. The remainder of the input optical signal may be sent through a variable optical attenuator 33, which can adjust the signal intensity. A polarization beam splitter (PBS) 34 splits the remainder of the input optical signal into x-polarized (X-Pol) and y-polarized (Y-Pol) components. The X-Pol component is sent to a 90 hybrid mixer 36, and the Y-Pol component is sent to a 90 hybrid mixer 37. Simultaneously, a local oscillator 38 provides a signal that is split by a beam splitter 39, and components of which are sent to each of 90 hybrid mixers 36 and 37. The 90 hybrid mixers 36 and 37 are optical components that each generate two phase differentiated optical signals, the XI and XQ signals and the YI and YQ signals, respectively. Finally, each of the four phase differentiated signals are converted to electrical signals by respective optical receivers 40, including photodetectors 41 and transimpedance amplifiers (TIA) 42. The electrical signals are then provided at four respective output terminals, which may be single-sided signals referenced to a common ground or may be differential signals.

[0026] FIG. 4 illustrates an embodiment of the optical receiver 40 including an active AC coupling circuitry disposed between the photo diode (PD) 41 and the front-end differential TIA 42. An analog DC cancellation loop 45a and 45b is located prior to each input of the TIA 42, and draws the photo diode DC current I.sub.DC, whereby only the AC signal I.sub.AC is coupled to the TIA 42. Two different analog cancellation loops 45a and 45b are used at both TIA inputs. Each cancellation loop 45a and 45b comprises a low pass filter section 46a and 46b, e.g. comprised of a cancellation resistor R.sub.C and a cancellation capacitor C.sub.C, and a trans-conductance cell (GM), such that the input and output of each cancellation loop 45a and 45b are connected to the input of the TIA input 42, i.e. both the input and output of the loops 45a and 45b are between the PD 41 and the TIA 42, as shown in FIG. 4. Photo diode DC current I.sub.DC is drawn from the input node of the TIA 42 in the G.sub.M cell, such that the analog loops 45a and 45b maintain the DC voltage value of the TIA input node to be the same as a reference voltage (V.sub.REF). This reference voltage V.sub.REF represent the actual TIA input node voltage for a zero DC current condition, which means that on average there is no current flowing into each of the differential TIA inputs. The term zero DC current means very little current, e.g. less than 100 uA or, ideally, less than a value that would significantly impact other TIA performance characteristics, such as linearity and bandwidth. Accordingly, the DC cancellation loops 45a and 45b greatly preserve the linearity of the TIA 42 and the optical receiver 40, because if the DC current is not canceled, it would flow into the TIA 42 and change the bias point, output signal common mode, and may even completely saturate the TIA 42, rendering it useless.

[0027] A method of generating V.sub.REF includes using a replica TIA 47, also shown in FIG. 4. The replica TIA 47 includes floating inputs and outputs and substantially the same structure as the main TIA 42, in order to generate a correct V.sub.REF voltage, corresponding to a zero DC input current condition. Using a replica TIA 47 provides a simple way to track the main TIA 42 across process, voltage and temperature (PVT) variations, and to automatically generate a correct V.sub.REF in all cases. The trade-off of using the replica TIA 47 is additional power dissipation. In order to minimize the additional power dissipation from the replica TIA 47, it may be scaled down. For example, the replica TIA 47 may use a fraction, e.g. , of the bias current of the main TIA 42, flowing through resistors RF that are 4 larger than the resistors in the main TIA 42. Accordingly, the same V.sub.REF voltage is generated, while burning only of the power of the main TIA 42. Scaling will reduce the quality of the PVT tracking of the replica TIA 47, so the scaling factor has to be selected carefully, to achieve the perfect balance between PVT tracking and power dissipation. It should be noted that V.sub.REF may be generated in a variety of other ways, without using a replica TIA. For example, a custom analog circuit may be constructed to simultaneously achieve the goals of correct V.sub.REF generation, with PVT tracking, and minimum power dissipation.

[0028] There are two important specifications that are advantageous from the DC cancellation loops 45a and 45b that define their loop gain-bandwidth product (GBW). First, the cancellation loops 45a or 45b should not affect or attenuate the received high speed signal. Second, the loops 45a or 45b should track any variation in the photo diode DC current I.sub.DC and completely cancel it. This implies that the speed of the analog cancellation loops 45a and 45b are bonded by two main upper and lower limits, which are the lowest frequency component of the received data (upper limit) and the fastest variation of the photo diode DC current I.sub.DC (lower limit). The gain-bandwidth product of this analog loop 45a or 45b is calculated as,

[00002]$\begin{array}{cc}\mathrm{GBW}=\frac{G_M{R}_F}{A_O}.Math.\frac{1}{2.Math..Math..Math.R_C.Math.C_C};& \left(5\right)\end{array}$

[0029] where R.sub.F is the TIA feedback resistor and A.sub.O is the TIA feed-forward amplifier DC gain. The closed loop response of the loops 45a or 45b introduces a cutoff frequency in the TIA transfer function which equals the open loop GBW product (FC=GBW). The proposed architecture has several advantages over prior art topologies which are:

[0030] 1) more convenient in realizing the low pass filter section 46a and 46b (R.sub.C, C.sub.C) than prior art, and

[0031] 2) suitable for fully differential TIA topologies unlike prior art.

[0032] The actual realization of the R-C section of the low pass filters 46a and 46b is more convenient in the proposed architecture than implementing passive AC coupling circuitry at the TIA input as in prior art because of two reasons: 1) there is no upper limit on the maximum value of the resistor R.sub.C as no DC current flows in it, and 2) C.sub.C parasitic capacitance doesn't harm the TIA bandwidth as it is placed away from the RF signal path between the GM cell input to the ground.

[0033] Furthermore, the proposed architecture is more suitable for fully differential front-end TIA architecture than the prior art. In fully differential TIAs 42, each output depends on both inputs due to the high common mode rejection of the fully differential TIA 42. Assuming an ideal differential amplifier A.sub.O employed in the TIA 42 (common mode gain=0, differential mode gain=), TIA output voltages (V.sub.OUTP, V.sub.OUIN) are expressed as,

[00003]$\begin{array}{cc}{V}_{\mathrm{OUTP}}=-\frac{R_F}{2}.Math.\left(I_P-I_N\right),& 6.Math.a\\ V_{\mathrm{OUTN}}=\frac{R_F}{2}.Math.\left(I_P-I_N\right),& 6.Math.b\end{array}$

[0034] where I.sub.P and I.sub.N are the input positive and negative currents of the differential TIA 42, respectively. Equation (6) implies that both V.sub.OUTP and V.sub.OUTN depend on I.sub.P and I.sub.N with the same weight and opposite effect. Thus, the prior art cannot be employed with a fully differential TIA because the two cancellation loops 45a and 45b will be strongly coupled and affected by each other. However, in the pseudo differential topology of the present invention, each output V.sub.OUTP and V.sub.OUTN (positive or negative) depends only on the corresponding input current I.sub.AC which makes the two cancellation loops 45a and 45b decoupled and the cancellation performed correctly. Accordingly, the proposed AC coupling scheme offers better isolation between the DC cancellation loops 45a and 45b, in particular with the fully differential TIA 42, because the sensing operation is performed at the input of the TIA 42.

[0035] One way to implement the trans-conductance (G.sub.M) cell with the loop pass filter 45a and 45b R-C section for a single-ended TIA is illustrated in FIG. 5 for the proposed active AC coupling circuitry 40. The trans-conductance cell G.sub.M draws a current (I.sub.OUT) proportional to the DC component of the differential input (V.sub.INPV.sub.INN). The GM cell comprises a voltage amplifier 51 followed by a differential pair (T.sub.1, T.sub.2) of transistors. A current steering is performed linearly in the differential pair T1 and T2 using the differential input DC voltage (V.sub.INPV.sub.INN) such that the output current equals I.sub.B/2*N at VINP=VINN and its maximum value is I.sub.B*N. The AC trans-conductance of the proposed GM cell is expressed as,

G.sub.N=Ag.sub.mN.sub.1

[0036] where A is the gain of the amplifier 51 and g.sub.m is the trans-conductance of the differential pair (T.sub.1, T.sub.2) each transistor having a resistor R connected thereto. N is a scaling factor for the output emitter-degenerated current mirror 52, where the output bipolar transistor 55 is made N longer and the degeneration resistor 56 is N times smaller. N may or may not be an integer. The scaling factor N enables the trans-conductance cell to operate with a smaller bias current from bias current source I.sub.B, and thereby to reduce power dissipation. The bias current source I.sub.B is connected to both of the transistors T.sub.1 and T.sub.2 of the differential pair. The output I.sub.OUT is connected to the second transistor T.sub.2 via an output transistor 55 and the output resistor 56 R/N.

[0037] Accordingly, to determine the value for N, the first step is to determine the value for I.sub.OUT or V.sub.REF, based on system requirements, i.e. how much DC current I.sub.DC needs to be cancelled. For example, if I.sub.OUT is 4 mA, it is undesirable to burn another 4 mA in the bias current I.sub.B. Accordingly, a scaling factor of, e.g. pick N=40, is selected, whereby IB=I.sub.OUT/N=100 uA, which adds only a small number to the overall power dissipation. In practice, N should not be too large, but typically does not have to be, because at some point, it does not make sense to push N to much higher values, as the goal of reducing power dissipation has typically already been achieved. Accordingly, N may be in the range from N=1 to N=1000, preferably N=4 to N=40, but it can be any another number, equal or greater than 1, N>1. Formally, there is no reason why N cannot be less than 1, but may be wasteful.

[0038] The capacitor C.sub.C of the R.sub.C loop pass filter section 46a and 46b may be implemented using a miller capacitor between the input and output of the voltage amplifier 51 to boost its value by the voltage amplifier gain, which helps in reducing the size of the implemented R-C section 46a and 46b. The loop pass filter cutoff frequency is expressed as,

[00004]$f_c-\frac{1}{A}\frac{1}{2.Math..Math..Math.R_c.Math.C_c}.$

[0039] There are several reasons why a fully differential TIA front end is better than the most commonly used single-ended. First, the fully differential TIA front end has an excellent CMRR (common mode rejection ratio). Coherent receivers often have challenging CMRR requirements, and a fully differential TIA easily meets and exceeds most CMRR specs. Second, fully differential TIA front ends have better power supply and ground noise rejection. Third, the output of a fully differential TIA is fully compatible with the differential amplifier stages, so there is no need to convert the signal from single-ended to differential.

[0040] However, the present invention may be used in non-coherent systems, since large DC currents can result from poor extinction ratio of the optical signal or if APDs are used there could be a very significant dark current.

[0041] With reference to FIG. 6, an optical receiver front-end is composed of a photo diode (PD) 61 followed by a trans-impedance amplifier (TIA) 62 and main amplifiers (MAs) 63. The PD 61 receives a transmitted optical signal 64 and generates a current 66 proportional to the received optical power of the received optical signal 64. The ratio between PD output current 6 to the input optical power of the optical signal 64 is the photo diode responsivity (R). The TIA 62 converts the PD current 66 to voltage, which is and then amplified by MAs 63 to the desired signal level.

[0042] An active AC coupling circuitry is disposed between the photo diode (PD) 61 and the TIA 62. An analog DC cancellation loop 67 is located prior to each input of the TIA 62, and draws the photo diode DC current I.sub.DC, whereby only the AC signal I.sub.AC is coupled to the TIA 62. The cancellation loop 67 comprises a trans-conductance (GM) cell 68, and a low pass filter section 69, e.g. comprised of a cancellation resistor R.sub.C and a cancellation capacitor C.sub.C. The input and output of the cancellation loop 67 is connected to the input of the TIA 62, i.e. both the input and output of the loop 67 are between the PD 61 and the TIA 62, as shown in FIG. 6. Photo diode DC current I.sub.DC is drawn from the input node of the TIA 62 in the GM cell 68, such that the analog loop 67 maintains the DC voltage value of the TIA input node to be the same as a reference voltage (V.sub.REF). This reference voltage V.sub.REF is an input node voltage of a replica TIA, which represent the actual TIA input node voltage for a zero DC current condition.

[0043] The foregoing description of one or more embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.