Polymorphic playback system with switching oscillation prevention
10313790 ยท 2019-06-04
Assignee
Inventors
Cpc classification
H03G3/3005
ELECTRICITY
H04R3/02
ELECTRICITY
International classification
Abstract
A polymorphic playback system in which one or more parameters of a signal path of the polymorphic playback system are varied based on one or more characteristics of a playback signal processed by the signal path may include a control subsystem configured to detect an out-of-band noise profile of the playback signal and set one or more playback signal magnitude thresholds for switching between polymorphic modes of the polymorphic playback system based on the out-of-band noise profile, wherein the polymorphic modes comprise at least a first polymorphic mode in which one or more first parameters are applied to the signal path and a second polymorphic mode in which one or more second parameters are applied to the signal path.
Claims
1. A polymorphic playback system wherein one or more parameters of a signal path of the polymorphic playback system are varied based on one or more characteristics of a playback signal processed by the signal path, comprising a control subsystem configured to: detect an out-of-band noise profile of the playback signal; and set one or more playback signal magnitude thresholds for switching between polymorphic modes of the polymorphic playback system based on the out-of-band noise profile, wherein the polymorphic modes comprise at least a first polymorphic mode in which one or more first parameters are applied to the signal path and a second polymorphic mode in which one or more second parameters are applied to the signal path.
2. The system of claim 1, wherein the control subsystem is configured to detect the out-of-band noise profile by filtering to extract an out-of-band noise characterization from the playback signal.
3. The system of claim 1, wherein the control subsystem is configured to detect the out-of-band noise profile by analyzing statistics associated with the playback signal.
4. The system of claim 3, wherein the statistics are indicative of a frequency of occurrence of the playback signal crossing the one or more playback signal magnitude thresholds.
5. The system of claim 1, wherein the setting of the one or more playback signal magnitude thresholds minimizes switching between the polymorphic modes due to out-of-band noise.
6. The system of claim 1, wherein the setting of the one or more playback signal magnitude thresholds comprises setting a range of hysteresis between a first threshold for switching from a first polymorphic mode to a second polymorphic mode, and a second threshold for switching from the second polymorphic mode to the first polymorphic mode such that the range of hysteresis increases for higher levels of out-of-band noise and decreases for lower levels of out-of-band noise.
7. A method for use in a polymorphic playback system wherein one or more parameters of a signal path of the polymorphic playback system are varied based on one or more characteristics of a playback signal processed by the signal path, comprising: detecting an out-of-band noise profile of the playback signal; and setting one or more playback signal magnitude thresholds for switching between polymorphic modes of the polymorphic playback system based on the out-of-band noise profile, wherein the polymorphic modes comprise at least a first polymorphic mode in which one or more first parameters are applied to the signal path and a second polymorphic mode in which one or more second parameters are applied to the signal path.
8. The method of claim 7, wherein a control subsystem is configured to detect the out-of-band noise profile by filtering to extract an out-of-band noise characterization from the playback signal.
9. The method of claim 7, wherein a control subsystem is configured to detect the out-of-band noise profile by analyzing statistics associated with the playback signal.
10. The method of claim 9, wherein the statistics are indicative of a frequency of occurrence of the playback signal crossing the one or more playback signal magnitude thresholds.
11. The method of claim 7, wherein the setting of the one or more playback signal magnitude thresholds minimizes switching between the polymorphic modes due to out-of-band noise.
12. The method of claim 7, wherein the setting of the one or more playback signal magnitude thresholds comprises setting a range of hysteresis between a first threshold for switching from a first polymorphic mode to a second polymorphic mode, and a second threshold for switching from the second polymorphic mode to the first polymorphic mode such that the range of hysteresis increases for higher levels of out-of-band noise and decreases for lower levels of out-of-band noise.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein:
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DETAILED DESCRIPTION
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(12) Example audio IC 9B of
(13) DAC 14 may supply analog input signal V.sub.IN to an amplifier 16B which may amplify or attenuate analog input signal V.sub.IN in conformity with a selectable analog gain k/x to provide an audio output signal V.sub.OUT, which may operate a speaker, headphone transducer, a line level signal output, and/or other suitable output Amplifier 16B may be referred to herein as an analog path portion of the signal path from the input node for digital audio input signal DIG_IN to the output node for output voltage signal V.sub.OUT depicted in
(14) As shown in
(15) As an example of the dynamic range enhancement functionality of audio IC 9B, when digital audio input signal DIG_IN is at or near zero decibels (0 dB) relative to the full-scale voltage of the digital audio input signal, control subsystem 20 may select a first digital gain (e.g., x.sub.1) for the selectable digital gain and a first analog gain (e.g., k/x.sub.1) for the selectable analog gain. However, if the magnitude of digital audio input signal DIG_IN is below a particular predetermined threshold magnitude relative to the full-scale voltage of digital audio input signal DIG_IN (e.g., 20 dB), control subsystem 20 may select a second digital gain (e.g., x.sub.2) greater than the first digital gain (e.g., x.sub.2>x.sub.1) for the selectable digital gain and a second analog gain (e.g., k/x.sub.2) lesser than the first analog gain (e.g., k/x.sub.2<k/x.sub.1) for the selectable analog gain. In each case, the cumulative path gain (e.g., k) of the selectable digital gain and the selectable analog gain may be substantially constant (e.g., the same within manufacturing and/or operating tolerances of audio IC 9B). In some embodiments, k may be approximately equal to 1, such that the cumulative path gain is a unity gain. Such modification of digital gain and analog gain may increase the dynamic range of audio IC 9B compared to approaches in which the digital gain and analog gain are static, as it may reduce the noise injected into audio output signal V.sub.OUT, which noise may be a generally monotonically increasing function of the analog gain of amplifier 16B. While such noise may be negligible for higher magnitude audio signals (e.g., at or near 0 dB relative to full-scale voltage), the presence of such noise may become noticeable for lower magnitude audio signals (e.g., at or near 20 dB or lower relative to full-scale voltage). By applying a smaller analog gain at amplifier 16B for smaller signal magnitudes, the amount of noise injected into audio output signal V.sub.OUT may be reduced, while the signal level of audio output signal V.sub.OUT may be maintained in accordance with the digital audio input signal DIG_IN through application of a digital gain to gain element 12 inversely proportional to the analog gain.
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(17) As shown in
(18) First stage 22 may include any suitable analog front end circuit for conditioning analog input signal V.sub.IN for use by final output stage 24. For example, first stage 22 may include one or more analog integrators 32 cascaded in series, as shown in
(19) Final output stage 24 may include any suitable driving circuit for driving audio output signal V.sub.OUT as a function of intermediate signal V.sub.INT (thus, also making audio output signal V.sub.OUT a function of analog input signal V.sub.IN) wherein final output stage 24 is switchable among a plurality of modes including at least a first mode in which final output stage 24 generates audio output signal V.sub.OUT as a modulated output signal which is a function of intermediate signal V.sub.INT and a second mode in which final output stage 24 generates audio output signal V.sub.OUT as an unmodulated output signal which is a function of intermediate signal V.sub.INT. To carry out this functionality, final output stage 24 may include a class-D audio output stage 42 which may be enabled in the first mode (and disabled in the second mode) to generate audio output signal V.sub.OUT as a modulated output signal which is a function of intermediate signal V.sub.INT and a class-AB audio output stage 44 which may be enabled in the second mode (and disabled in the first mode) to generate audio output signal V.sub.OUT as an unmodulated output signal which is a function of intermediate signal V.sub.INT.
(20) Class-D audio amplifier 42 may comprise any suitable system, device, or apparatus configured to amplify intermediate signal V.sub.INT and convert intermediate signal V.sub.INT into a series of pulses by pulse width modulation, pulse density modulation, or another method of modulation, such that intermediate signal V.sub.INT is converted into a modulated signal in which a characteristic of the pulses of the modulated signal (e.g., pulse widths, pulse density, etc.) is a function of the magnitude of intermediate signal V.sub.INT. After amplification by class-D audio amplifier 42, its output pulse train may be converted back to an unmodulated analog signal by passing through a passive low-pass filter, wherein such low-pass filter may be inherent in output circuitry of class-D audio amplifier 42 or a load driven by final output stage 24. As shown in
(21) Class-AB audio amplifier 44 may comprise any suitable system, device, or apparatus configured to amplify intermediate signal V.sub.INT with a linear gain and convert intermediate signal V.sub.INT into an unmodulated audio output signal V.sub.OUT. As shown in
(22) In some embodiments, a signal gain (e.g., V.sub.OUT/V.sub.INT) of final output stage 24 in the first mode may be approximately equal to the signal gain of final output stage 24 in the second mode. In these and other embodiments, an offset (e.g., direct current offset) of final output stage 24 in the first mode may be approximately equal to the offset of final output stage 24 in the second mode.
(23) Signal feedback network 26 may include any suitable feedback network for feeding back a signal indicative of audio output signal V.sub.OUT to the amplifier input of amplifier 18. For example, as shown in
(24) Control subsystem 28 may include any suitable system, device, or apparatus configured to receive information indicative of audio output signal V.sub.OUT, intermediate signal V.sub.INT, and/or other operational characteristics of amplifier 18, and based at least thereon, control operation of one or more components of amplifier 18. For example, control subsystem 28 may be configured to, based on a characteristic of analog input signal V.sub.IN (e.g., which may be determined from receiving and analyzing intermediate signal V.sub.INT and/or audio output signal V.sub.OUT), switch between the first mode and the second mode of final output stage 24. Such characteristic may include one or more of a frequency of analog input signal V.sub.IN, an amplitude of analog input signal V.sub.IN, a signal-to-noise ratio of analog input signal V.sub.IN, a noise floor of analog input signal V.sub.IN, or another noise characteristic of analog input signal V.sub.IN. For example, in some embodiments, control subsystem 28 may be configured to switch final output stage 24 from the first mode to the second mode when an amplitude of analog input signal V.sub.IN decreases below a threshold amplitude, and may be configured to switch final output stage 24 from the second mode to the first mode when an amplitude of analog input signal V.sub.IN increases above the same threshold amplitude or another threshold amplitude. In some embodiments, to reduce audio artifacts associated with switching between modes, control subsystem 28 may also be configured to switch between modes only when the amplitude of audio output signal V.sub.OUT is approximately zero (e.g., when a modulated signal generated by class-D audio amplifier 42 is at its minimum voltage in its generated pulse train).
(25) In addition, control subsystem 28 may also be configured to perform calibration of final output stage 24. For example, control subsystem 28 may receive and analyze intermediate signal V.sub.INT and audio output signal V.sub.OUT to determine a gain of class-D audio amplifier 42 (e.g., the signal gain of final output stage 24 in the first mode) and a gain of class-AB audio amplifier 44 (e.g., the signal gain of final output stage 24 in the second mode), and based thereon, modify the gain of class-D audio amplifier 42 and/or the gain of class-AB audio amplifier 44 in order to calibrate the signal gain of final output stage 24 in the second mode to match the signal gain of final output stage 24 in the first mode. As another example, control subsystem 28 may receive and analyze intermediate signal V.sub.INT and/or audio output signal V.sub.OUT to determine an offset (e.g., direct current offset) of class-D audio amplifier 42 (e.g., the offset of final output stage 24 in the first mode) and an offset of class-AB audio amplifier 44 (e.g., the offset of final output stage 24 in the second mode), and based thereon, modify the offset of class-D audio amplifier 42 and/or the offset of class-AB audio amplifier 44 in order to calibrate the offset of final output stage 24 in the second mode to match the offset of final output stage 24 in the first mode.
(26) In these and other embodiments, control subsystem 28 may also be configured to control characteristics of first stage 22 (e.g., integrators 32) and/or signal feedback network 26. Control subsystem 28 may maintain such characteristics and structure of first stage 22 and signal feedback network 26 as static when switching between the first mode and the second mode of final output stage 24 and when switching between the second mode and the first mode. Maintaining the characteristics and structure of first stage 22 and signal feedback network 26 as static when switching between modes allows the modes to share the same analog front end and feedback network, thus reducing or minimizing the likelihood of mismatched signal gain and offset between the modes, and thus reducing or minimizing audio artifacts caused by switching between modes. However, after control subsystem 28 has switched final output stage 24 to the second mode (e.g., amplifier output driven by class-AB amplifier 44), control subsystem 28 may modify characteristics of first stage 22 and/or signal feedback network 26 in order to decrease a noise floor of amplifier 18. For example, in some embodiments, control subsystem 28 may modify characteristics of integrators 32 (e.g., resistances and/or capacitances of filters internal to integrators 32) and/or other components of first stage 22 in order to decrease a noise floor of amplifier 18 when final output stage 24 operates in the second mode. As another example, in these and other embodiments, control subsystem 28 may modify characteristics of signal feedback network 26 (e.g., resistances of variable feedback resistors 48) in order to decrease a noise floor of amplifier 18 when final output stage 24 operates in the second mode. When making such modification, control subsystem 28 may, before switching final output stage 24 from the second mode to the first mode, return such characteristics to their unmodified states.
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(28) An ADC 58 may comprise any suitable system, device, or apparatus configured to convert an analog audio signal received at its input, to a digital signal representative of analog audio input signal ANALOG_IN. ADC 58 may itself include one or more components (e.g., delta-sigma modulator, decimator, etc.) for carrying out the functionality of ADC 58.
(29) A multiplexer 60 may receive a respective digital audio signal from each of audio processing paths 54, and may select one of the digital audio signals as the digital audio output signal DIGITAL_OUT based on a control signal generated by and communicated from a control subsystem 64.
(30) Driver 62 may receive the digital audio output signal DIGITAL_OUT output by ADC 58 and may comprise any suitable system, device, or apparatus configured to condition such digital signal (e.g., encoding into Audio Engineering Society/European Broadcasting Union (AES/EBU), Sony/Philips Digital Interface Format (S/PDIF)), in the process generating digital audio output signal DIGITAL_OUT for transmission over a bus to a digital audio processor. In
(31) Control subsystem 64 may comprise any suitable system, device, or apparatus for selecting one of the digital audio signals output by the various audio processing paths 54 as digital audio output signal DIGITAL_OUT. In some embodiments, control subsystem 64 may make such selection based on a magnitude of analog audio input signal ANALOG_IN or a signal derivative thereof. For example, control subsystem 64 may include an overload detector that may determine whether or not a signal derivative of analog audio input signal ANALOG_IN (e.g., an analog signal output by AFE 56a) is likely to cause clipping or other distortion of digital audio output signal DIGITAL_OUT if a particular audio processing path (e.g., audio processing path 54a) is selected. If clipping or other distortion of digital audio output signal DIGITAL_OUT is likely if the particular audio processing path (e.g., audio processing path 54a) is selected, control subsystem 64 may generate a control signal so that another audio processing path (e.g., audio processing path 54b) is selected. To further illustrate, in some embodiments, audio processing path 54a may be a path adapted for low amplitudes of analog audio input signal ANALOG_IN and may thus have a high signal gain, while audio processing path 54b may be a path adapted for higher amplitudes of analog audio input signal ANALOG_IN and may thus have a lower signal gain. Thus, if analog audio input signal ANALOG_IN or a derivative thereof is greater than a threshold value indicative of a condition whereby digital audio output signal DIGITAL_OUT may experience clipping or other distortion if audio processing path 54a is selected, control subsystem 64 may detect such condition and generate a control signal to select the digital audio signal generated by audio processing path 54b as digital audio output signal DIGITAL_OUT.
(32) As another example, control subsystem 64 may include a level detector that may detect an amplitude of analog audio input signal ANALOG_IN or a signal derivative thereof (e.g., a signal generated within ADC 58b). Responsive to the amplitude level detected by the level detector, control subsystem 64 may generate the control signal communicated to multiplexer 60. To illustrate, as analog audio input signal ANALOG_IN decreases from a relatively high amplitude to a lower amplitude, it may cross a threshold amplitude level whereby control subsystem 64 may change the selection of digital audio output signal DIGITAL_OUT from the digital audio signal generated by audio processing path 54b (which may be adapted for higher amplitudes of analog audio input signal ANALOG_IN) to the digital audio signal generated by audio processing path 54a (which may be adapted for lower amplitudes of analog audio input signal ANALOG_IN). In some embodiments, a threshold amplitude level whereby control subsystem 64 may change the selection of digital audio output signal DIGITAL_OUT from the digital audio signal generated by audio processing path 54b to the digital audio signal generated by audio processing path 54a may be lower than another threshold amplitude level whereby control subsystem 64 may change the selection of digital audio output signal DIGITAL_OUT from the digital audio signal generated by audio processing path 54a to the digital audio signal generated by audio processing path 54b, in order to provide for hysteresis so that multiplexer 60 does not repeatedly switch between the paths.
(33) Each of the various systems described above with respect to
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(35) Threshold control subsystem 73A may be configured to detect an out-of-band noise profile of the input signal by using a noise characterization subsystem 74A which may filter the input signal using high-latency filter 76 that performs more robust filtering than filter 72, and then, using combiner 78, subtracting the input signal as filtered by filter 76 from the input signal as filtered by filter 72 to generate a resulting signal which is an indication of the amount of out-of-band noise present in the filtered signal received by polymorphic plant 82. Based on this amount of out-of-band noise, a threshold calculation block 80A may calculate thresholds. For example, threshold calculation block 80A may increase or decrease relevant thresholds based on the out-of-band noise present. As another example, a range of hysteresis between a first threshold for switching from a first polymorphic mode to a second polymorphic mode, and a second threshold for switching from the second polymorphic mode to the first polymorphic mode, may increase for higher levels of out-of-band noise and decrease for lower levels of out-of-band noise.
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(37) Threshold control subsystem 73B may be configured to detect an out-of-band noise profile of the input signal by using a noise characterization subsystem 74B which may detect an out-of-band noise profile by analyzing statistics associated with the playback signal. In some embodiments, such statistics may be indicative of a frequency of occurrence of the playback signal crossing the one or more playback signal magnitude thresholds. To illustrate, increment block 84 and decrement block 86 may cause a numeric value maintained by a counter 88 to increase each time polymorphic plant 82 switches between polymorphic modes, and compare with comparator 90 the output of counter 88 to a limit to determine if the frequency of switching between polymorphic modes is greater than the relevant limit. Frequent switching between polymorphic modes may indicate a high level of out-of-bound noise, and thus, the output of comparator 90 may be an indication of the amount of out-of-band noise present in the filtered signal received by polymorphic plant 82. Based on the signal generated by comparator 90, a threshold calculation block 80B may calculate thresholds. For example, threshold calculation block 80B may increase or decrease relevant thresholds based on the out-of-band noise present. As another example, a range of hysteresis between a first threshold for switching from a first polymorphic mode to a second polymorphic mode, and a second threshold for switching from the second polymorphic mode to the first polymorphic mode, may increase for higher levels of out-of-band noise and decrease for lower levels of out-of-band noise.
(38) For the purposes of clarity and exposition,
(39) Using the systems and methods described above, the setting of the one or more playback signal magnitude thresholds may minimize switching (e.g., oscillation) between the polymorphic modes due to out-of-band noise.
(40) As used herein, when two or more elements are referred to as coupled to one another, such term indicates that such two or more elements are in electronic communication or mechanical communication, as applicable, whether connected indirectly or directly, with or without intervening elements.
(41) This disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Moreover, reference in the appended claims to an apparatus or system or a component of an apparatus or system being adapted to, arranged to, capable of, configured to, enabled to, operable to, or operative to perform a particular function encompasses that apparatus, system, or component, whether or not it or that particular function is activated, turned on, or unlocked, as long as that apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative. Accordingly, modifications, additions, or omissions may be made to the systems, apparatuses, and methods described herein without departing from the scope of the disclosure. For example, the components of the systems and apparatuses may be integrated or separated. Moreover, the operations of the systems and apparatuses disclosed herein may be performed by more, fewer, or other components and the methods described may include more, fewer, or other steps. Additionally, steps may be performed in any suitable order. As used in this document, each refers to each member of a set or each member of a subset of a set.
(42) Although exemplary embodiments are illustrated in the figures and described below, the principles of the present disclosure may be implemented using any number of techniques, whether currently known or not. The present disclosure should in no way be limited to the exemplary implementations and techniques illustrated in the drawings and described above.
(43) Unless otherwise specifically noted, articles depicted in the drawings are not necessarily drawn to scale.
(44) All examples and conditional language recited herein are intended for pedagogical objects to aid the reader in understanding the disclosure and the concepts contributed by the inventor to furthering the art, and are construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present disclosure have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the disclosure.
(45) Although specific advantages have been enumerated above, various embodiments may include some, none, or all of the enumerated advantages. Additionally, other technical advantages may become readily apparent to one of ordinary skill in the art after review of the foregoing figures and description.
(46) To aid the Patent Office and any readers of any patent issued on this application in interpreting the claims appended hereto, applicants wish to note that they do not intend any of the appended claims or claim elements to invoke 35 U.S.C. 112(f) unless the words means for or step for are explicitly used in the particular claim.