Binary reflectometry system for analyzing faults in a transmission line

Abstract

A reflectometry system for analyzing faults in a transmission line, a reference signal being generated, in an initial step, and injected in the transmission line, the system includes a device (CPL) for acquiring the analog signal back-propagated in the transmission line, an equalization circuit (EGA) configured for equalizing the amplitudes obtained on the reflectogram for the peaks of the injected signal after its point of injection into the transmission line and of the signal reflected on the end of the transmission line, a binarization device (B) for converting the back-propagated analog signal into a signal digitized over two quantization levels, a correlator (COR) configured for correlating the digitized signal with the reference signal in order to produce a time-domain reflectogram, a module for analyzing the time-domain reflectogram in order to identify the presence of faults in the transmission line.

Claims

1. A reflectometry system for analyzing faults in a transmission line, a binarized reference signal being generated, in an initial step, and injected into the transmission line, the system comprising: an acquisition device (CPL) for acquiring a back-propagated analog signal in the transmission line, a binarization device (B) for quantizing said back-propagated analog signal into a signal digitized over two quantization levels, a correlator (COR) configured for correlating the digitized signal with the binarized reference signal in order to produce a time-domain reflectogram, a module for analyzing the time-domain reflectogram in order to identify a presence of faults in the transmission line, wherein the correlator (COR) comprises at least one logic circuit implementing an Exclusive NOR logic gate (XNOR); and wherein the correlator (COR) comprises several Exclusive NOR logic gates each arranged for receiving on their inputs a sample of the digitized signal and a sample of the reference signal, a summer (SOM) for summing outputs of the Exclusive NOR logic gates, a multiplier for multiplying an output of the summer (SOM) by two and an adder (ADD) for adding a predetermined number to a result from the summer (SOM).

2. The reflectometry system as claimed in claim 1, wherein the binarization device (B) is a logic circuit of the flip-flop or comparator type.

3. The reflectometry system as claimed in claim 1, comprising: a generator (GEN) of the binarized reference signal, an injection device (CPL) for injecting the binarized reference signal into the transmission line.

4. The reflectometry system as claimed in claim 3, wherein the generator (GEN) and the injection device (CPL) are implemented in the form of a programmable digital circuit having at least one digital output pin able to be connected to the transmission line.

5. The reflectometry system as claimed in claim 4, comprising a device for matching the impedance of the digital output pin to the impedance of the transmission line.

6. The reflectometry system as claimed in claim 3, furthermore comprising at least one equalizer disposed between the acquisition device (CPL) and a point of connection between said system and the transmission line, each equalizer being configured for equalizing the amplitudes obtained on the time-domain reflectogram for the respective peaks of the injected signal after its point of injection into the transmission line and of the signal reflected on the end of the transmission line.

7. The reflectometry system as claimed in claim 6, wherein an equalizer is formed by a voltage divider bridge comprising at least one resistor R.sub.P.

8. The reflectometry system as claimed in claim 7, wherein an equalizer comprises two resistors R.sub.S, R.sub.P arranged as a resistor bridge.

9. The reflectometry system as claimed in claim 7, wherein the values of the resistor R.sub.P or of the resistors R.sub.S, R.sub.P are determined based on a set of impedances characterizing said system and the transmission line.

10. The reflectometry system as claimed in claim 1, wherein the reference signal is a binarized pseudo-random signal.

11. The reflectometry system as claimed in claim 1 wherein the correlator (COR) comprises a counter arranged for counting the number of values at 1 at the output of the Exclusive NOR logic gate, the correlator being configured for calculating the intercorrelation between the digitized signal and the reference signal using this number.

12. The reflectometry system as claimed in claim 1, furthermore comprising a white noise generator disposed between the acquisition device (CPL) and the binarization device (B).

13. The reflectometry system as claimed in claim 1, furthermore comprising a time derivative or differentiation device disposed upstream of the binarization device (B).

14. A reflectometry system for analyzing faults in a transmission line, a binarized reference signal being generated, in an initial step, and injected into the transmission line, the system comprising: an acquisition device (CPL) for acquiring a back-propagated analog signal in the transmission line, a binarization device (B) for quantizing said back-propagated analog signal into a signal digitized strictly over two quantization levels, a correlator (COR) configured for correlating the digitized signal with the binarized reference signal in order to produce a time-domain reflectogram, a module for analyzing the time-domain reflectogram in order to identify a presence of faults in the transmission line, wherein the correlator (COR) comprises at least one logic circuit implementing an Exclusive NOR logic gate (XNOR); wherein the correlator (COR) comprises at least one logic circuit implementing an Exclusive OR logic gate (XOR); and wherein the correlator (COR) is configured for incrementally calculating a time-domain reflectogram by means of the following steps: receive, at a current time i+dK, a measurement of the signal after its propagation in the transmission line, said measurement comprising a number dK of samples, determine a reflectogram R.sub.i+dK at the current time i+dK, starting from a preceding reflectogram R.sub.i calculated at a preceding time i, by carrying out the following operations for each value of the reflectogram: add to the preceding reflectogram R.sub.i, a sum of the Exclusive OR operations between a number dK of samples of the measured signals at the preceding time i and a number dK of corresponding samples of the reference signals injected into the transmission line at an injection time i′−dK, add to the preceding reflectogram R.sub.i, a sum of the Exclusive NOR operations between a number dK of samples measured at the current time i+dK and a number dK of corresponding samples of the reference signals injected into the transmission line at an injection time i′.

15. The reflectometry system as claimed in claim 14, wherein the correlator (COR) comprises a first shift register (BUF.sub.1) for receiving the reference signal, the first shift register being respectively connected to a first input of the Exclusive OR logic gate (XOR) and to a first input of the Exclusive NOR logic gate (XNOR), a second shift register (BUF.sub.2) for receiving the digitized signal, the second shift register being respectively connected to a second input of the Exclusive OR logic gate (XOR) and to a second input of the Exclusive NOR logic gate (XNOR), a register (BUF3) for saving the results of the calculation of a time-domain reflectogram, a first adder (ADD.sub.1) arranged for adding a result produced at the output of the Exclusive OR logic gate (XOR) to a current value R(i) of the time-domain reflectogram, and a second adder (ADD.sub.2) arranged for adding a result produced at the output of the Exclusive NOR logic gate (XNOR) to a current value R(i) of the time-domain reflectogram.

16. A reflectometry system for analyzing faults in a transmission line, a binarized reference signal being generated, in an initial step, and injected into the transmission line, the system comprising: an acquisition device (CPL) for acquiring a back-propagated analog signal in the transmission line, a binarization device (B) for quantizing said back-propagated analog signal into a signal digitized strictly over two quantization levels, a correlator (COR) configured for correlating the digitized signal with the binarized reference signal in order to produce a time-domain reflectogram, a module for analyzing the time-domain reflectogram in order to identify a presence of faults in the transmission line, a time derivative or differentiation device disposed upstream of the binarization device (B), and a digital time derivative or differentiation device applied to the reference signal before the correlation with the digitized signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other features and advantages of the present invention will become more clearly apparent upon reading the description that follows in relation with the appended drawings, which show:

(2) FIG. 1, a diagram of a reflectometry system according to the prior art,

(3) FIG. 1bis, one example of a reflectogram obtained with the reflectometry system in FIG. 1,

(4) FIG. 2, a diagram of a reflectometry system according to a first embodiment of the invention,

(5) FIG. 3, two diagrams illustrating a quantization operation for a digital signal,

(6) FIG. 4, two diagrams illustrating a reflectogram respectively obtained with a reflectometry system of the prior art and a reflectometry system according to the first embodiment of the invention,

(7) FIG. 5, a diagram of a correlator according to a first variant embodiment of the invention,

(8) FIG. 6, a flow diagram detailing the steps for implementing an optimized method for calculating a reflectogram,

(9) FIG. 7, a diagram illustrating a comparison of the injected signal at a point of a cable and of the signal measured at a point of a cable at two successive times,

(10) FIG. 8, a diagram of a correlator according to a second variant embodiment of the invention,

(11) FIG. 9, a diagram of a reflectometry system according to a second embodiment of the invention,

(12) FIG. 10, two diagrams illustrating a reflectogram obtained respectively with a reflectometry system of the prior art and a reflectometry system according to the second embodiment of the invention,

(13) FIG. 11, a diagram of a reflectometry system according to a third embodiment of the invention,

(14) FIG. 12, a diagram of one example of a differentiating circuit,

(15) FIG. 13, two diagrams illustrating a reflectogram respectively obtained with a reflectometry system of the prior art and a reflectometry system according to the third embodiment of the invention,

(16) FIG. 14, two time-domain reflectograms illustrating a problem solved by a fourth embodiment of the invention,

(17) FIG. 15, a diagram of a reflectometry system according to a fourth embodiment of the invention,

(18) FIG. 16, a diagram of one example of an equalizer device,

(19) FIG. 17, a diagram illustrating the determination of the values of the resistors of an equalizer device according to a variant of the fourth embodiment of the invention,

(20) FIG. 18, two time-domain reflectograms illustrating the results obtained by virtue of the fourth embodiment of the invention.

DETAILED DESCRIPTION

(21) FIG. 1 shows a diagram of a system 100 for analyzing faults in a transmission line L, such as a cable, according to a usual method of time-domain reflectometry of the prior art. Such a system principally comprises a generator GEN of a reference digital signal. The reference digital signal generated is converted into analog via a digital-analog converter DAC, then is injected into a point of the transmission line L by means of a directional coupler CPL or any other device allowing a signal to be injected into a line. The signal propagates along the line and is reflected on the singularities that it comprises. In the absence of a fault on the line, the signal is reflected on the end of the line if the termination of the line is not matched. In the presence of a fault on the line, the signal is reflected on the impedance discontinuity caused by the fault. The reflected signal is back-propagated up to a measurement point, which may be common to the point of injection or different. The back-propagated signal is captured via the directional coupler CPL then converted into digital by an analog-digital converter ADC. A correlation COR is subsequently carried out between the digital signal thus obtained and a copy of the digital signal generated prior to injection in order to produce a time-domain reflectogram R(t) corresponding to the intercorrelation between the two signals.

(22) As is known in the field of diagnostic methods using time-domain reflectometry, the position d.sub.DF of a fault on the cable L, in other words its distance to the point of injection of the signal, may be directly obtained from the measurement, on the calculated time-domain reflectogram R(t), of the time t.sub.DF between the first amplitude peak measured on the reflectogram and the amplitude peak corresponding to the signature of the fault, based on the knowledge of a value of speed of propagation of signals in the line.

(23) FIG. 1bis shows one example of a reflectogram R(n) obtained by means of the system in FIG. 1, on which a first amplitude peak is observed at an abscissa N and a second amplitude peak at an abscissa N+M. The first amplitude peak corresponds to the reflection of the signal at the point of injection into the cable, whereas the second peak corresponds to the reflection of the signal on an impedance discontinuity caused by a fault. The point of abscissa N is generally taken as time reference and is brought back to the abscissa 0 by subtraction of N.

(24) Various known methods may be envisioned for determining the position d.sub.DF of the fault. A first method consists in applying the relationship associating distance and time: d.sub.DF=V.sub.g.Math.t.sub.DF/2 where V.sub.g is the speed of propagation of the signal in the cable. Another possible method consists in applying a relationship of proportionality of the type d.sub.DF/t.sub.DF=L.sub.c/t.sub.0 where L.sub.c is the length of the cable and t.sub.0 is the time, measured on the reflectogram, between the amplitude peak corresponding to the impedance discontinuity at the point of injection and the amplitude peak corresponding to the reflection of the signal on the end of the cable. In order to reduce the level of the measurement noise, an optional average calculation MOY may be performed before or after the correlation COR. The two locations of the average calculation are equivalent from an arithmetic standpoint.

(25) An analysis device (not shown in FIG. 1) is responsible for analyzing the reflectogram R(t) in order to deduce from this information on the presence and/or location of faults together with the associated electrical characteristics of the faults.

(26) Without straying from the framework of the invention, the emission and receiver parts of the system described in FIG. 1 may be implemented in the same device or in two separate devices. The emission part of the system comprises the signal generator, the digital-analog converter and the device for injecting the signal into a cable. The receiver part of the system comprises the device for measuring the signal back-propagated in the cable and the digital processing modules comprising the average and intercorrelation calculation.

(27) FIG. 2 describes a reflectometry system according to a first embodiment of the invention.

(28) The system 200 comprises a generator GEN of the reference signal used. According to a first variant embodiment, the generator GEN is designed to directly generate a binary signal, for example a pseudo-random signal of the CTDR type. According to another variant embodiment, the generator GEN is designed to generate a digital signal quantized over several bits and furthermore comprises a mechanism for binarizing the digital signal generated. This binarization is an operation for transforming the digital signal into a series of binary values taking the values 0 or 1 or taking the values −1 or 1. The binarization is carried out such that any positive or zero value of the signal is transformed into a value equal to 1 and any negative value of the signal is transformed into a value equal to −1.

(29) The generator GEN is, for example, implemented in the form of a programmable digital system, such as a processor or a reconfigurable circuit of the FPGA type. The generator GEN comprises at least one digital output pin to which a coupler CPL (or any other equivalent means) is connected which is able to inject the binary output signal from the generator GEN into the cable L.

(30) The binary signal generated is delivered onto the digital output pin in the form of an analog signal for which the binary value 1 is delivered by a maximum voltage VCC and the binary value 0 (or −1) is delivered by a minimum voltage −VCC. The digital pin of the generator GEN is capable of delivering the voltages VCC and −VCC.

(31) Advantageously, an impedance matching device is positioned between the output pin of the generator and the coupler CPL in order to match the output impedance of the generator with that of the cable L.

(32) In one variant embodiment, if the digital pin cannot supply such voltages, notably the negative voltage −VCC, an additional component or circuit is disposed downstream of the output pin. This component is, for example, a Schmitt trigger whose high and low thresholds are fixed at a voltage equal to a value in the range between 0 and the maximum voltage VCC, for example VCC/2, and the power supply levels are fixed at the maximum VCC and minimum −VCC voltage values.

(33) In another variant embodiment, the additional circuit is composed of a transformer, whose primary comprises N turns and whose secondary comprises 2N turns, and of a capacitor disposed upstream of the primary.

(34) In yet another variant embodiment, the additional circuit is composed of a logic inverter between the voltages VCC and −VCC, together with two resistors arranged as a voltage divider between the minimum voltage −VCC and the digital input of the circuit.

(35) The additional component must comprise a device for matching its input impedance to the impedance of the digital output pin of the generator.

(36) FIG. 3 respectively shows a chaotic pseudo-random signal such as generated (on the upper diagram) and the same signal after the binarization operation (lower diagram).

(37) The signal back-propagated in the cable L is captured, in other words acquired or measured, by means of the coupler CPL (which may be identical or different from the coupler used for the injection of the signal) or any other means for measuring or acquiring the signal. This signal is analog. The binarization operation may be carried out directly by the digital component used COR, by connecting a digital input of the component (potential equipped with an impedance matching system) to the coupler CPL, or by means of an additional component or circuit inserted between the coupler CPL and the digital component COR. This circuit is a thresholding device of the flip-flop with threshold type, or a comparator B which allows the measured analog signal to be converted into a binary digital signal. The correlator COR subsequently carries out the intercorrelation calculation between the received signal and the signal injected into the cable.

(38) The use of a binary or binarized signal in place of a non-binary digital signal offers several advantages.

(39) In the first place, the system according to the invention such as described in FIG. 2 does not require any analog-digital converter nor digital-analog converter. This type of component is costly, consumes a lot of power and its use limits the speed of acquisition of the signal. Indeed, the higher the speed of acquisition or of conversion of the analog signal into a digital signal, the greater the number of samples per second which provides better results for the fault detection but leads to a higher cost for the component.

(40) Furthermore, by virtue of the invention, the size of memory needed is also reduced. The number of bits used for sampling an analog signal is generally greater than 8 bits, which leads to a very large storage capacity being required. The greater the sampling dynamic range, the better are the performance characteristics in terms of detection for faults of low amplitude. By virtue of the invention, only one bit per sample is required which allows the size of memory to be reduced by a factor equal to at least 8. Lossless digital compression methods would allow this gain in memory space to be further improved.

(41) Finally, the frequency of acquisition of the signal is increased by virtue of the invention as it is no longer limited to the sampling frequency of the analog-digital converter. Indeed, the frequency of acquisition of the signal for the system described in FIG. 2 is that of the thresholding device B which is close or equal to the frequency of the digital component GEN.

(42) Another advantage of the invention is that, despite the loss of information in the measured signal owing to the decrease in the number of quantization bits, the reflectogram produced by the calculation of intercorrelation of the measured signal and of the generated signal is comparable to that which would be obtained with a method according to the prior art as is illustrated in FIG. 4.

(43) This FIG. 4 shows two reflectograms obtained for a line of length equal to 20 meters comprising four regularly spaced soft faults of increasing amplitudes.

(44) The upper diagram corresponds to a reflectogram obtained with a system according to the prior art comprising a digital-analog converter and an analog-digital converter. The lower diagram corresponds to a reflectogram obtained with a system according to the invention. The faults are correctly identifiable by equivalent amplitude peaks on the two diagrams.

(45) FIG. 5 shows a diagram of one example of a correlator COR according to one embodiment of the invention.

(46) The fact that the values of the signals used by the system according to the invention are binary allows an acceleration of the calculation of the intercorrelation between the injected binarized signal S.sub.c and the measured binarized signal S. Indeed, the intercorrelation at a given moment in time represented by an index i may be expressed in the following form:

(47) $\left(S_c*S\right)\left(i\right)=\underset{j=i}{\overset{K}{.Math.}}S\left(j\right)S_c\left(j-i+1\right),i=1\mathrm{.Math.}K$

(48) Since the values of the signals S.sub.c and S are equal to 1 or −1, the preceding calculation may be simplified in the following manner:

(49) $S\left(k\right)S_c\left(j\right)=\{\begin{array}{c}1\mathrm{si}{S}_c\left(j\right)=S\left(k\right)\\ -1\mathrm{si}{S}_c\left(j\right)\ne S\left(k\right)\end{array}$

(50) Thus, the products S(k)S.sub.c(j) may be calculated by means of an “Exclusive NOR”, also referred to as XNOR, logic gate and the value of index i of the intercorrelation product may be calculated by summing the outputs of the XNOR function bit by bit.

(51) Another way of performing this sum consists in counting the number of times where the respective bits of the signals S.sub.c and S are equal (in other words where the output of the XNOR function is equal to 1).

(52) $\underset{j=i}{\overset{K}{.Math.}}S\left(j\right)S_c\left(j-i+1\right)=\mathrm{card}\left(E_i\right)-\mathrm{card}\left(E_{-i}\right)$

(53) In the preceding formula, Card(E) denotes the number of elements of a set E and the sets E.sub.i, E.sub.−i are defined by:
E.sub.i={j≥i,S.sub.c(j)=S(j−i+1)}
E.sub.−i={j≥l,S.sub.c(j)≠S(j−i+1)}

(54) Furthermore, if the number of signal samples is equal to K−i+1, then card(E.sub.i)+card(E.sub.−i)=K−i+1.

(55) Thus, the intercorrelation of index i is obtained by means of the following calculation:
Σ.sub.j=i.sup.KS(j)S.sub.c(j−i+1)=2*card(E.sub.i)−(K−i+1)  (1)

(56) Consequently, the correlator COR may be formed from one or more XNOR logic gate(s). Each logic gate XNOR receives the respective signals S and S.sub.c on its two inputs. The outputs of the XNOR logic gates are summed by means of a summer SOM. The summer SOM may be replaced by a counter designed to count the number of 1s at the output of the XNOR logic gates, this number corresponding to the number of values in the set E.sub.i.

(57) According to the embodiment described in FIG. 5, the result produced at the output of the summer SOM is shifted by one bit toward the left in order to carry out a multiplication by two. An adder ADD is subsequently used for adding the term K−i+1 to this result.

(58) Lastly, the correlator COR comprises a register BUF for saving the values of the reflectogram R thus calculated.

(59) Without straying from the framework of the invention, the correlator described in FIG. 5 may be arranged differently in order to fulfill the same function. For example, it may comprise only one XNOR logic gate and a counter in place of the summer SOM. The operation for multiplication by 2 may also be carried out by means of a multiplier.

(60) The correlator COR described in FIG. 5 operates with binary signal samples taking the values 0 or 1.

(61) The correlator thus designed allows an intercorrelation calculation to be performed more simply and faster because it does not require any multiplication or Fourier transform.

(62) Another aspect of the invention is now described that relates to the use of binary or binarized reflectometry signals such as previously described with a correlator implementing the method for calculating a reflectogram described in the French patent application from the applicant filed under the number FR1662396 on 14 Dec. 2016. This aforementioned application is incorporated by reference in the present application.

(63) The patent application FR1662396 relates to a method for calculating a reflectogram allowing the number of operations to be implemented to be better distributed in order to render the calculation more efficient.

(64) FIG. 6 shows schematically the main steps of the method for calculating a reflectogram such as described in the patent application FR1662396.

(65) The method begins with an initialization step 300 which comprises the following sub-steps: Generation and injection in the cable of first K samples of the reference signal, Measurement of K samples of the signal propagated in the cable, Initial calculation of the reflectogram R.sub.0 based on the intercorrelation between the K samples of the injected signal and the K samples of the measured signal.

(66) The initialization step 300 may also be made optional. In this case, the reflectogram R.sub.0 is reset to 0, then the following steps of the method are directly executed. It is then necessary to wait to have measured K samples of the signal propagated in the cable in order to obtain a complete reflectogram but with the advantage of a gain in calculation time at the start of the method.

(67) The number K is a parameter of the method and corresponds to the length (in number of samples) of the intercorrelation carried out between the reference signal and the measured signal for calculating the reflectogram.

(68) The measurement of the signal may be carried out simultaneously with the injection of the signal into the cable or may be carried out with an initial time delay.

(69) In the case of a reflectometry device for which the measurement device is distinct from the device for injecting the signal, the measurement device comprises a generator of the reference signal whose role is to generate a copy of the reference signal injected into the cable by the injection device. This copy is used for calculating the reflectogram.

(70) The initialization step 300 produces a first, initial, reflectogram denoted R.sub.0.

(71) The method continues with the iterative execution of the steps 301,302,303.

(72) The two steps 301,302 of the method consist in iteratively generating and injecting 301 into the cable dK samples of the reference signal then in measuring 302 dK samples of the signal propagated in the cable. The number dK is a parameter of the invention and is preferably chosen to be much lower than the value of K. The value of dK is equal to at least 1.

(73) The steps 301 and 302 are executed iteratively, in other words, at each time i, dK signal samples are injected into the cable and dK back-propagated signal samples are measured. The injection and the measurement of the signal are continuously carried out for the whole duration of the analysis of the cable.

(74) At each time i, corresponding to one iteration, the last K samples of the injected signal and the last K samples of the measured signal are saved in a buffer or a local memory with a view to performing an intercorrelation calculation over a period corresponding to the last K samples. It is recalled that the value of dK is assumed to be much lower than the value K. It is assumed that the measured signal has been previously digitized in order to conserve digital samples.

(75) FIG. 7 illustrates a representation of the buffer containing the last K samples of the reference signal, on the one hand, and of the measured signal, on the other, at two successive times i and i+dK. Between these two successive times, a number dK of new signal samples are injected into the cable and the same number dK of new signal samples are measured.

(76) The upper part of FIG. 7 shows the buffer S.sub.c,i containing the samples of the reference signal saved at the time i and the buffer S.sub.c,i+dK containing the samples of the reference signal saved at the following time i+dK.

(77) The oldest dK samples of the buffer S.sub.c,i (denoted ECH-A in FIG. 7) are eliminated from the buffer S.sub.c,i+dK at the following time i+dK. The most recent K−dK samples of the buffer S.sub.c,i (denoted ECH-C in FIG. 7) are shifted in the buffer S.sub.c,i+dK to the following time i+dK. Finally, the buffer S.sub.c,i+dK contains dK new samples (denoted ECH-N in FIG. 7) at the following time i+dK.

(78) In the same way, the lower part of FIG. 7 shows the buffer S.sub.i containing the samples of the measured signal, saved at the time i, and the buffer S.sub.i+dK containing the samples of the measured signal, saved at the following time i+dK.

(79) FIG. 7 allows it to be observed that, at two successive times i and i+dK, the buffer containing the last K samples of the reference signal exhibit K−dK identical values. Similarly, at two successive times i and i+dK, the buffer containing the last K samples of the measured signal also exhibits K−dK identical values.

(80) A value R.sub.i(n) of the reflectogram R.sub.i at the time i corresponds to the intercorrelation between the samples of the buffer S.sub.c,i containing the last K samples of the reference signal and the samples of the buffer S.sub.i containing the last K samples of the measured signal. This calculation is given by the relation (2) herein below.
R.sub.i(n)=(S.sub.c*S).sub.i(n)=Σ.sub.j=1.sup.K−n+1S.sub.c,i(j).Math.S.sub.i(n+j−1)  (2)

(81) The index n varies over all of the time domain values for which the reflectogram R.sub.i is calculated. The equation (2) therefore yields one value of the reflectogram R.sub.i for one time domain value of index n.

(82) In order to generate a complete reflectogram, the equation (2) has to be executed by varying the index n over the whole of the time interval corresponding to the duration of the reflectogram. Thus, the index n varies from 1 to K.

(83) The value of index n of the reflectogram R.sub.i calculated at the time i may be decomposed into two sums, starting from the equation (2), which becomes the equation (3):
R.sub.i(n)=Σ.sub.j=1.sup.dKS.sub.c,i(j).Math.S.sub.i(n+j−1)+Σ.sub.j=dK+1.sup.K−n+1S.sub.c,i(j).Math.S.sub.i(n+j−1)  (3)

(84) In the same way, the value of index n of the reflectogram R.sub.i+dK calculated at the time i+dK may be decomposed into two sums such as illustrated by the equation (4):
R.sub.i+dK(n)=Σ.sub.j=1.sup.K−n−dK+1S.sub.c,i+dK(j).Math.S.sub.i+dK(n+j−1)+Σ.sub.j=K−n−dK+2.sup.K−n+1S.sub.c,i+dK(j).Math.S.sub.i+dK(n+j−1)  (4)

(85) According to the illustration in FIG. 7, it is known that the values ECH_C of the samples of the reference signal S.sub.c stored at the time i+dK, going from the indices 1 to K−dK, are identical to the values of the samples of the reference signal S.sub.c stored at the time i, going from the indices dK+1 to K. The same conclusion may be applied to the measured signal S.

(86) From these observations and from the equations (3) and (4) may be deduced the recurrence relationship (5) between a value of the reflectogram calculated at the time i and the same value of index n of the reflectogram calculated at the following time i+dK:

(87) $\begin{array}{cc}{R}_{i+\mathrm{dk}}\left(n\right)=R_i\left(n\right)-\underset{j=1}{\overset{\mathrm{dK}}{.Math.}}{S}_{c,i}\left(j\right).Math.S_i\left(n+j-1\right)+\underset{j=K-n-\mathrm{dK}+2}{\overset{K-n+1}{.Math.}}{S}_{c,i+\mathrm{dk}}\left(j\right).Math.S_{i+\mathrm{dK}}\left(n+j-1\right)& \left(5\right)\end{array}$

(88) Thus, the values of the reflectogram at a time i+dK are determined starting from the values of the reflectogram at a preceding time i at the step 303 of the method.

(89) The step 303 thus consists in subtracting, from the preceding reflectogram R.sub.i, the products of correlation between the dK samples of the measured signals at the preceding time i and a number dK of corresponding samples of the reference signals injected into the transmission line at the time i, then in adding to the preceding reflectogram R.sub.i the products of correlation between the dK new samples measured to the current time i+dK and a number dK of corresponding samples of the reference signals injected into the transmission line at the current time i+dK.

(90) Thus, the calculation of the current reflectogram carried out at the step 303 comprises a substantially reduced number of operations to be carried out. A minimum number of operations is reached for a value of dK equal to 1 sample.

(91) The formulae (2) to (5) are given by considering that the time of injection of new samples of the reference signal into the cable and the time of measurement of new samples of the signal propagated in the cable are identical and correspond to the index i. With no loss of generality, the time of injection i′ and the time of measurement i may be different, the equations (2) to (5) may then be rewritten by replacing i with i′ in the expressions for the measured signal S. The injection of the signal and its measurement must however be synchronized and operate at an identical sampling cadence.

(92) The steps 301,302,303 are iterated for a period corresponding to the duration of analysis of the cable.

(93) The step 303 is executed for all the values of a reflectogram. Thus, the calculation expressed by the formula (5) is executed in parallel for n values of a reflectogram, corresponding to n successive time indices.

(94) One particular embodiment of the invention relates to the case where the number dK of samples injected then measured at each time i is equal to 1. This scenario is that for which the number of operations needed at each iteration for calculating a reflectogram is lowest.

(95) For this particular embodiment, the step 303 for calculation of the reflectogram may be simplified starting from the equation (5) in the following manner.

(96) At the current time i, the product S(n)*S.sub.c(1) is subtracted from each indexed value n of the reflectogram R.sub.i(n), then the samples in the two buffers S and S.sub.c are shifted by a value and the new sample of the injected reference signal is recorded in the buffer S.sub.c and the new sample of the measured signal is recorded in the buffer S. Finally, the product S(K)*S.sub.c(K+1−n) is added to each indexed value n of the reflectogram R.sub.i(n).

(97) Using binary or binarized signals, the method for calculating a reflectogram described hereinabove may be further optimized, according to the invention, in order to decrease the number of operations to be carried out.

(98) Indeed, again taking the example hereinabove given for dK=1, subtracting the product S(n)*S.sub.c(1) corresponds, for binary signals, to adding the result of an Exclusive OR or XOR operation applied to the values S(n) and S.sub.c(1).

(99) In addition, adding the product S(K)*S.sub.c(K+1−n) corresponds, for binary signals, to adding the result of an Exclusive NOR or XNOR operation on the values S(K) and S.sub.c(K+1−n).

(100) Thus, this method of incremental calculation of the reflectogram may only be implemented, for binary signals, using XOR and XNOR logic gates.

(101) FIG. 8 shows a diagram of a correlator COR according to a second variant embodiment of the invention, this correlator implementing the aforementioned incremental calculation. Such a correlator COR comprises at least one logic gate XOR and one logic gate XNOR, together with two shift registers BUF.sub.1,BUF.sub.2. The first shift register BUF.sub.1 is designed to receive the samples of the binary signal S generated by the component GEN. The second shift register BUF.sub.2 is designed to receive the samples of the binary signal S.sub.c obtained at the output of the thresholding device B. The correlator COR also comprises two adders ADD.sub.1, ADD.sub.2 and a third register BUF.sub.3 for saving the calculated values R(i) of the reflectogram. The logic gate XOR and the first adder ADD.sub.1 are configured for adding to the current value R(i) the result of the Exclusive OR operation applied to the samples S(n) and S.sub.c(1). The logic gate XNOR and the second adder ADD.sub.2 are configured for adding to the current value R(i) the result of the Exclusive NOR operation applied to the samples S(K) and S(K+1−n). In this second embodiment of the correlator COR, the samples of the binary signals S and S.sub.c take the values +1 or −1. Consequently, all the components of the correlator COR, in particular the logic gates XOR and XNOR operate in +1/−1 logic mode rather than in 1/0 logic mode.

(102) In the case where 1/0 binary logic is used rather than 1/−1 binary logic, the incremental reasoning described hereinabove is applied to the equation (1):

(103) $\underset{j=i}{\overset{K}{.Math.}}S\left(j\right)S_c\left(j-i+1\right)=2*\mathrm{card}\left(E_i\right)-\left(K-i+1\right)$

(104) At the current time i, the result of an Exclusive OR operation XOR on the values S(1) and S.sub.c(n) shifted by one bit to the left (so as to multiply it by 2) is subtracted from each indexed value n of the reflectogram R.sub.i(n).

(105) Subsequently, the samples in the two shift registers S and S.sub.c are shifted by a value and the new sample of the reference injected signal is recorded in the shift register S.sub.c and the new sample of the measured signal in the shift register S.

(106) The shift operation may be eliminated by implementing a technique similar to that of circular registers, in which the index of the oldest samples replaced by the samples measured at the current time is incremented or decremented in a circular manner (modulo the size of the register).

(107) Lastly, the result of an Exclusive OR XOR operation on the values S(K−n+1) and S.sub.c(K) shifted by one bit to the left is added to each indexed value n of the reflectogram R.sub.i(n).

(108) Those skilled in the art will readily be able to adapt the device in FIG. 8, described for a 1/−1 binary logic, to an incremental calculation in 1/0 binary logic such as described hereinabove, notably by this time using two XOR logic gates rather than one XOR logic gate and one XNOR logic gate as described in FIG. 8.

(109) The invention is applicable to any type of reflectometry signals but more particularly to pseudo-random signals such as chaotic signals CTDR. This is because the pseudo-random nature of these signals avoids the degradation of the quality of the intercorrelation of the measured signal with the injected signal when the signal is binary or binarized.

(110) This advantage is important in the field of the detection and localization of faults on a cable because the identification of the faults is linked to the identification of amplitude peaks in the result of the intercorrelation.

(111) FIG. 9 describes a second embodiment of a reflectometry system according to the invention.

(112) The system in FIG. 9 comprises the same elements as that described in FIG. 2 but furthermore comprises an analog white noise generator 901, disposed between the coupler CPL and the binarization device B of the analog signal. The analog white noise generated by the generator 901 is, for example, a Gaussian additive white noise. It is added to the analog signal measured by the coupler CPL.

(113) One advantage of the system described in FIG. 9 is that the addition of white noise to the analog measured signal allows, on the final reflectogram, the peaks of low amplitude corresponding to soft faults to be better highlighted. Indeed, the peaks of low amplitude may sometimes be masked by nearby peaks of higher amplitude. The addition of white noise allows, on average, these peaks of low amplitude to be better highlighted. The amplitude of the added white noise is, preferably, equal to at least the average amplitude of the signal. Advantageously, the amplitude of the added white noise is around two to three times higher than the average amplitude of the signal.

(114) FIG. 10 shows two reflectograms obtained for a line of length equal to 20 meters comprising a soft fault of low amplitude in the middle of the cable.

(115) The left-hand diagram corresponds to a reflectogram obtained with a system according to the prior art comprising a digital-analog converter and an analog-digital converter. The right-hand diagram corresponds to a reflectogram obtained with a system according to the second embodiment described in FIG. 9.

(116) FIG. 11 describes a third embodiment of a reflectometry system according to the invention.

(117) The system in FIG. 11 comprises the same elements as the system described in FIG. 2 but furthermore comprises a differentiator circuit 902 disposed between the output of the cable and the binarization device B.

(118) A differentiator circuit is configured for performing a time derivative operation on the analog signal measured by the coupler CPL. A differentiator circuit is configured for determining the difference between the value of the signal at a time t and its value at a preceding time t−1.

(119) The addition of a time derivative or differentiation operation prior to the binarization operation also allows the amplitude peaks to be better highlighted in the final reflectogram. In this case, the amplitude peaks are bipolar as is identified in FIG. 13.

(120) FIG. 13 shows two reflectograms obtained for a line of length equal to 20 meters comprising a soft fault of low amplitude in the middle of the cable.

(121) The upper diagram corresponds to a reflectogram obtained with a system according to the prior art comprising a digital-analog converter and an analog-digital converter. The lower diagram corresponds to a reflectogram obtained with a system according to the third embodiment described in FIG. 11.

(122) The system in FIG. 11 may or may not comprise a white noise generator 901 disposed upstream of the circuit 902.

(123) FIG. 12 shows schematically one example of a differentiator circuit 902 designed to carry out a time derivative operation.

(124) Such a circuit 902 comprises two capacitors C.sub.1, C.sub.2 and three resistors R.sub.1, R.sub.2, R.sub.3 arranged in the manner shown in FIG. 12. It also comprises a ground GND and a power supply VCC. Furthermore, it comprises a comparator COMP whose output S is directly connected to the circuit implementing the binarization operation. The input of the circuit 902 is directly connected to the cable L by means of a coupler CPL (not shown in FIG. 12).

(125) The circuit 902 may be implemented by any other embodiment allowing a time derivative or differentiation function of an analog signal to be carried out, for example by means of a sample-and-hold circuit and of an analog memory.

(126) According to one variant of the third embodiment of the invention described hereinabove, a time derivative or differentiation operation is applied to the binary signal generated prior to carrying out the intercorrelation with the binarized signal at the output of the binarization device B. This operation may be carried out by the correlator COR or by a digital circuit 903 designed to calculate the derivative or the term to term difference of the output signal from the generator GEN inserted between the generator GEN and the correlator COR. The circuit 903 and the correlator COR are, for example, implemented on one and the same integrated circuit or FPGA circuit. This variant notably offers the advantage of obtaining monopolar amplitude peaks, in the reflectogram, rather than bipolar as is the case if the derivative or differentiation operation is only applied to the measured signal.

(127) A fourth embodiment of the invention is now described which is more particularly aimed at improving the detection capacity for soft faults generating, in the reflectogram, signatures of very low amplitude.

(128) FIG. 14 shows, on a timing diagram, two examples of reflectograms obtained for a cable of length equal to 30 meters and exhibiting a surface soft fault at 15 meters. The assumption is made that the amplitude of the first peak corresponding to the point of injection of the signal and the amplitude of the last peak corresponding to the end of the cable are equal. The first reflectogram Ref.sub.1 is obtained with a system according to the invention. The second reflectogram Ref.sub.2 is obtained with a system according to the prior art for which the measured signal is not binarized.

(129) The amplitude of the peak of the reflectogram corresponding to the soft fault situated at 15 meters is of the order of 0.1. It may be seen that this peak is buried in the secondary lobes of the reflectogram Ref.sub.2 in the case where the measured signal is not binarized. It is therefore not possible to detect this peak in a reliable manner with a system according to the prior art.

(130) In contrast, on the reflectogram Ref.sub.1 obtained with the invention, it can be seen that the peak corresponding to the soft fault is amplified. This phenomenon is linked to the binarization of the measured signal. This is because the values of the reflected signal close to 0 are amplified to the values +1 or −1 after binarization.

(131) The signal injected into the cable is reflected at the end of the cable that is initially assumed to have no fault. The back-propagated signal which is measured may be considered as the sum of the injected signal and of the same signal delayed by a delay equal to the time for the return journey of the signal between the point of injection and the measurement point going via the end of the cable. When the injected signal is binary, it takes the values 1 or −1. Thus, the measured signal, after back-propagation, takes the values 2, −2 or 0 (omitting, for the sake of simplicity, the amplification or attenuation due to the mismatch at the point of injection and at the termination of the cable). In reality, the measured signal takes the value 0 in around 50% of cases. It is subsequently considered that a soft fault is present and that it generates a reflection of the signal of low amplitude, for example equal to 0.1. The values at 0 in the measured signal then become 0.1 or −0.1. After binarization, these values become 1 or −1. Thus, the binarization allows the signature of a soft fault to be amplified generating a reflection of the signal of low amplitude.

(132) However, this phenomenon depends greatly on the equality of the amplitudes of the signal transmitted after the point of injection and of the signal reflected at the end of the cable. More generally, it is observed that it is possible to detect a soft fault which generates a reflection of the signal of amplitude greater than or equal to the difference in the amplitudes of the signal transmitted after the point of injection and of the signal reflected at the end of the cable. In other words, the closer are these two amplitudes, the greater the possibility of detecting soft faults generating low amplitudes in the reflectogram calculated after correlation.

(133) Thus, in order to improve the precision of the detection of soft faults of low amplitude, the reflectometry system according to the invention should be modified by adding a device whose function is to optimize the equalizing of the amplitudes of the signal transmitted after the point of injection and of the signal reflected at the end of the cable.

(134) For this purpose, FIG. 15 describes a fourth embodiment of a reflectometry system according to the invention.

(135) The system in FIG. 15 comprises the same elements as the system described in FIG. 11 (the elements 901,902,903 are optional) but furthermore comprises an equalizer 904 configured for equalizing the amplitudes of the signal transmitted after the point of injection into the cable and of the signal reflected at the end of the cable.

(136) FIG. 16 shows schematically one embodiment of the equalizer 904. It is composed of a voltage divider bridge or resistor bridge comprising two resistors R.sub.P and R.sub.S disposed upstream of the connection of the reflectometry system to the cable. For example, the equalizer 904 is a two-port network which is connected, on the one hand, to the cable and, on the other, directly to the tracks of the printed circuit on which the system according to the invention is implemented. FIG. 16, shows schematically the emission part E of the system which essentially comprises the generator GEN and a track or connection of impedance Z.sub.1 which connects this part of the system to the cable. The receiver part R of the system comprises the binarization device B and the correlator COR. It is also connected via a track or connection of impedance Z.sub.2 to the cable. The connection of the tracks to the cable may be made by means of a coupler CPL (not shown). The cable has a characteristic impedance Z.sub.c. The load at the end of the cable has an impedance Z.sub.L and the receiver part R of the system has an impedance Z.sub.R. The impedances Z.sub.1, Z.sub.2 and Z.sub.R are fabrication parameters of the system. The impedances Z.sub.c and Z.sub.L depend on the cable to be tested.

(137) The values of the resistors R.sub.P and R.sub.S are determined in such a manner as to equalize the amplitudes of the signal at the point of injection and at the point of reflection. In one variant, the resistor R.sub.S is eliminated.

(138) The values of the resistors R.sub.P and R.sub.S are determined empirically, either using charts or automatically. They depend on the parameters of the cable (impedance, attenuation, dispersion, speed of propagation) and are controllable.

(139) For example, the values of the resistors R.sub.P and R.sub.S may be determined empirically by means of the following relationships. In the following part, it is assumed that the point of injection of the signal and the measurement point of the signal are identical. First of all, on the one hand, the amplitude A of the signal at the point of injection (called “amplitude of the injection peak”) may be determined, and the amplitude B of the signal reflected on the load at the end of the cable (called “amplitude of the cable end peak”) using the following relationships:

(140) $A=\frac{T_1{T}_R}{1-R_0{R}_R}B=A\frac{R_L{T}_2{T}_R}{1-R_0{R}_R}$ T.sub.1 is the coefficient of transmission of the signal, at the point of injection, between the generator and the cable, T.sub.R is the coefficient of transmission of the signal, at the point of injection/measurement, between the generator and the receiver part R of the system, T.sub.2 is the coefficient of transmission of the back-propagated signal, at the point of injection, of the cable toward the receiver part R of the system, R.sub.R is the coefficient of reflection of the signal on the receiver part R of the system, R.sub.L is the coefficient of reflection of the signal on the load at the end of the cable, R.sub.0 is the coefficient of reflection of the signal coming from the receiver part R of the system, on the measurement point.

(141) Those skilled in the art will know how to adapt the preceding equations to other more or less complex configurations of the system, notably configurations for which the cable has several branches and junctions with several loads at the ends. Other parameters of the system may also be taken into account in the equations, in particular the parameters linked to the attenuation of the signal in the cable.

(142) When the equalizer 904 is inserted into the system, the preceding relationships may be modified so as to end up with:

(143) $A=\frac{2Z_R}{Z_1+Z_R+Y_P{Z}_R{Z}_1}B=A\frac{Y_P{Z}_R{Z}_1\left(R_{p1+}{R}_{p2}\right)}{Z_1+Z_R+Y_P{Z}_R{Z}_1}$ Z.sub.R is the impedance of the receiver part R of the system, Z.sub.1 is the impedance of the track which connects the emission part E of the system to the equalizer 904, Z.sub.2 is the impedance of the track which connects the receiver part R of the system to the equalizer 904, Y.sub.P, R.sub.P1 and R.sub.P2 are intermediate variables which depend on coefficients A.sub.ps, B.sub.ps, C.sub.ps, D.sub.ps, which themselves depend on the resistors R.sub.s and R.sub.p of the equalizer 904.

(144) Thus, the condition for the amplitudes A and B to be equal is given by the relationship:

(145) $\begin{array}{cc}{Y}_P\left(R_{p1}+R_{p2}-1\right)=\frac{Z_R+Z_1}{Z_R{Z}_1}& \left(1\right)\end{array}$

(146) Using the equation (1), by fixing the various parameters of the system, the values of the resistors R.sub.s and R.sub.p of the equalizer 904 may be accordingly deduced.

(147) FIG. 17 illustrates, on a diagram, one example of a method for determining the values of the resistors R.sub.s and R.sub.p of the equalizer 904 using charts. For this example, the values of the impedances of the system are fixed at the values Z.sub.1=100 Ohms, Z.sub.2=1000 Ohms and Z.sub.R=1000 Ohms. The curve 910 represents the value of the resistor R.sub.P as a function of the impedance Z.sub.C of the cable considering that the cable is terminated by a short-circuit. The curve 911 shows the value of the resistor R.sub.S as a function of the impedance Z.sub.C of the cable. The curve 912 shows the equal value of the amplitudes of the two peaks as a function of the impedance Z.sub.C of the cable.

(148) Using the diagram in FIG. 17, the optimum values of the resistors R.sub.s and R.sub.p may thus be determined from the value of the impedance Z.sub.C of the cable.

(149) Tolerance ranges around the optimum values of the resistors R.sub.s and R.sub.p may be envisioned in order to broaden the strict equality of the amplitudes of the two peaks to minimal differences between the two amplitudes. These tolerance ranges are notably determined as a function of the minimum amplitude of a peak corresponding to a soft fault that it is desired to be able to detect.

(150) FIG. 18 illustrates the results obtained with the fourth embodiment of the invention. The reflectogram 920 is obtained without the equalizer 904 and exhibits two different amplitude peaks. The reflectogram 921 is obtained for the same cable by introducing the equalizer 904 with resistors Rs=0.75 Ohms and Rp=907.86 Ohms and exhibits two identical amplitude peaks.

(151) Advantageously, the resistors of the equalizer 904 are programmable in order to adapt the system to the type of cable being tested.

(152) The values of the resistors R.sub.s and R.sub.p may also be obtained automatically, in a phase for calibration of the system, by measuring the amplitudes of the two peaks of the reflectogram and by progressively adjusting the values of the resistors according to a closed-loop operation.

(153) The determination of the values of the resistors R.sub.s and R.sub.p may also be made semi-analytically by calculating empirically a range of possible values for the resistors R.sub.s and R.sub.p as a function of the parameters of the system then by adjusting these values by analysis of the reflectogram, similarly to the calibration phase above-mentioned.

(154) Without straying from the framework of the invention, the voltage divider bridge may be replaced by any equivalent device capable of performing the same equalization function.

(155) In another variant embodiment, several equalizers may be used instead of a single equalizer 904.

(156) The equalizer or equalizers may also be disposed between the tracks of the printed circuit connecting the transmission line to the injection or measurement device.

REFERENCES

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