METHOD FOR MANUFACTURING MICRO-LEDS

Abstract

Method for manufacturing micro-LEDs comprising the following steps: i) providing a stack comprising at least one strongly n-doped GaN layer (104), an n-doped GaN layer (105), quantum wells (106) and a p-doped GaN layer (107), ii) porosifying the GaN layer (104), to obtain a porosified GaN layer (104), iii) forming mesas in the stack, iv) covering the porosified GaN layer (104) with a second electrode (301) or with an encapsulation layer (302), the second electrode (301) or the encapsulation layer (302) being in direct contact with the porosified GaN layer (104). step ii) being carried out so that the optical index of the porosified GaN layer (104) does not vary by more than 10% with respect to the optical index of the second electrode (301) and/or with respect to the optical index of the encapsulation layer (302).

Claims

1. A method for manufacturing micro-LEDs comprising at least the following steps: i) providing a stack comprising at least one strongly n-doped GaN layer, an n-doped GaN layer, quantum wells and a p-doped GaN layer and a first electrode, ii) porosifying the strongly n-doped GaN layer, whereby a porosified GaN layer is obtained, iii) forming mesas in the stack, iv) covering the porosified GaN layer with a second electrode formed by a conductive transparent oxide layer, the second electrode being in direct contact with the porosified GaN layer, then, preferably, covering the second electrode with an encapsulation layer, or depositing a second electrode over a lateral face of the porosified GaN layer or over a lateral face of the n-doped GaN layer and covering the porosified GaN layer with an encapsulation layer, the encapsulation layer being in direct contact with the porosified GaN layer, steps ii) and iii) could be carried out in the order ii) and iii) or in the order iii) and ii), step ii) being carried out so that the optical index of the porosified GaN layer does not vary by more than 10% with respect to the optical index of the second electrode and/or with respect to the optical index of the encapsulation layer.

2. The method according to claim 1, wherein the conductive transparent oxide layer is an indium-tin oxide layer and/or in that the encapsulation layer is made of SiN, SiO.sub.2 or SiON.

3. The method according to claim 1, wherein the pore volumetric concentration in the porosified GaN layer is determined based on the following formula:
n.sub.eff=?{square root over ((1?p).Math.n.sub.GaN.sup.2+p.Math.n.sub.air.sup.2)} with p the pore volumetric concentration, n.sub.GaN the optical index of GaN and n.sub.air the optical index of air.

4. The method according to claim 1, wherein step i) is carried out according to the following steps a) to c): a) providing an initial stack comprising a support layer, possibly a buffer layer made of (Al,Ga)N, a non-intentionally doped GaN layer, the strongly n-doped GaN layer, the n-doped GaN layer, the quantum wells, the p-doped GaN layer and the first electrode, b) transferring the initial stack onto a support substrate covered with a metal layer, c) removing the support layer, where appropriate the buffer layer made of (Al,Ga)N, the non-intentionally doped GaN layer, for example by thinning, whereby a substrate of interest comprising the support substrate, the first electrode, the p-doped GaN layer, the GaN/InGaN quantum wells, the n-doped GaN layer and the strongly n-doped GaN layer is obtained.

5. The method according to claim 4, wherein, before step ii), the method comprises a step during which the doping level of the strongly n-doped GaN layer is locally reduced, for example by implantation of helium or hydrogen ions, so as to have a first portion of the strongly n-doped GaN layer (104) having a first conductivity and a second portion having a second conductivity, the first electrical conductivity being higher at least by a ten factor than the second electrical conductivity, whereby: the second portion is not porosified during step ii), the porosified GaN layer of the mesas obtained in step iii) comprises a non-porosified portion and a porosified portion, the non-porosified portion being preferably at the centre of the porosified portion.

6. The method according to claim 4, wherein: the method comprises an additional step between step i) and step ii) during which the strongly n-doped GaN layer and a portion of the n-doped GaN layer are etched to form a pre-structure of mesas, during step ii), the central portion of the strongly n-doped GaN layer is not porosified, for example by stopping the porosification step before total porosification of the strongly doped GaN layer, whereby the GaN layer of the mesas obtained in step iii) comprises a non-porosified central portion and a porosified boundary, step iii) is carried out by etching the other portion of the n-doped GaN layer, the quantum wells, the p-doped GaN layer, the first electrode and a portion of the support substrate.

7. The method according to claim 1, wherein the method comprises the following successive steps: i) providing a stack comprising a support layer, a non-intentionally doped GaN layer, a strongly n-doped GaN layer, an n-doped GaN layer, quantum wells and a p-doped GaN layer and a first electrode, iii) forming mesas in the stack, by etching the first electrode, the p-doped GaN layer, the quantum wells, the n-doped GaN layer, the strongly n-doped GaN layer and a portion of the non-intentionally doped GaN layer, implementing step ii), whereby a porosified GaN layer is obtained, transferring the obtained stack onto a support substrate covered with a metal layer, removing the support layer, the non-intentionally doped GaN layer, for example by thinning whereby a substrate of interest comprising the support substrate, the first electrode, the p-doped GaN layer, the GaN/InGaN quantum wells, the n-doped GaN layer and the strongly n-doped GaN layer is obtained, implementing step iv).

8. A micro-LED structure comprising a stack, the stack comprising at least one porosified strongly n-doped GaN layer, an n-doped GaN layer, quantum wells and a p-doped GaN layer, a first electrode, mesas being formed in the stack, the porosified GaN layer being covered and in direct contact with a second electrode formed by a conductive transparent oxide layer, the second electrode being preferably covered with an encapsulation layer, or a second electrode being arranged over a lateral face of the porosified GaN layer or over a lateral face of the n-doped GaN layer, the porosified GaN layer being covered and in direct contact with an encapsulation layer, in any case, the optical index of the porosified GaN layer not varying by more than 10% with respect to the optical index of the second electrode and/or with respect to the optical index of the encapsulation layer.

9. The structure according to claim 8, wherein the porosified GaN layer of the mesas comprises a non-porosified central portion and a porosified boundary.

10. The structure according to claim 9, wherein the central portion is weakly doped.

11. The structure according to claim 9, wherein the central portion is strongly doped.

12. The structure according to claim 8, wherein the porosified GaN layer has a thickness comprised between 100 and 500 nm, preferably between 300 and 500 nm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0086] The present invention will be better understood upon reading the description of embodiments given for merely indicative and non-limiting purposes with reference to the appended drawings, wherein:

[0087] FIGS. 1A to 1F schematically show different steps of a method for manufacturing micro-LEDs according to a particular embodiment of the invention;

[0088] FIGS. 2A to 2G schematically show different steps of a method for manufacturing micro-LEDs according to another particular embodiment of the invention;

[0089] FIGS. 3A to 3G schematically show different steps of a method for manufacturing micro-LEDs according to another particular embodiment of the invention;

[0090] FIGS. 4A to 4J schematically show different steps of a method for manufacturing micro-LEDs according to another particular embodiment of the invention;

[0091] FIG. 5A schematically shows, in section, a micro-LED structure according to a comparative example;

[0092] FIG. 5B is a graph representing the luminance of the structure of FIG. 5A as a function of the thickness of the GaN layer;

[0093] FIG. 6A schematically shows, in section, a micro-LED structure according to a particular embodiment of the invention;

[0094] FIG. 6B is a graph representing the luminance of the structure of FIG. 6A as a function of the thickness of the GaN layer;

[0095] FIG. 7A schematically shows, in section, a micro-LED structure according to another comparative example;

[0096] FIG. 7B is a graph representing the luminance of the structure of FIG. 7A as a function of the thickness of the GaN layer;

[0097] FIG. 8A schematically shows, in section, a micro-LED structure according to another particular embodiment of the invention;

[0098] FIG. 8B is a graph representing the luminance of the structure of FIG. 8A as a function of the thickness of the GaN layer;

[0099] FIG. 9 is a graph representing the luminance as a function of the emission angle, according to a particular embodiment of the invention;

[0100] FIG. 10 is a graph representing the EQE according to the total thickness of GaN;

DETAILED DISCLOSURE OF PARTICULAR EMBODIMENTS

[0101] The different parts shown in the figures are not necessarily plotted according to a uniform scale, to make the figures more readable.

[0102] The different possibilities (variants and embodiments) should be understood as not being mutually exclusive and can be combined with one another.

[0103] Furthermore, in the description hereinafter, terms that depend on the orientation, such as top, bottom, etc., of a structure apply while considering that the structure is oriented as illustrated in the figures.

[0104] Although this is in no way limiting, the invention finds applications in particular in the field of monochromatic micro-displays or colour micro-displays, and more particularly for LED manufacturing. However, it could be used in the photovoltaic or water electrolysis (water splitting) field since, firstly, InGaN absorbs throughout the visible spectrum and, secondly, its valence and conduction bands are around the water stability domain, the thermodynamic condition necessary for the water decomposition reaction. The invention may also be interesting for the manufacture of lasers emitting at long wavelengths.

[0105] The invention is described more particularly for monolithic-type integration by complete transfer of the layers, i.e. the porosification step is carried out after transfer (FIGS. 1A to 1F, 2A to 2G and 3A to 3G).

[0106] However, it is also possible to carry out the porosification step on the growth substrate, manufacture the LED then perform a flip-chip type assembly or hybrid bonding on a substrate comprising an ASIC-type integrated circuit (Application-Specific Integrated Circuit). The porosification step is carried out after transfer, which allows achieving a relief during the growth (FIGS. 4A to 4J).

[0107] The method is particularly interesting for manufacturing structures comprising porosified (Al,In,Ga)N/(Al,In,Ga)N mesas having in particular a pitch of less than 30 ?m.

[0108] By (Al,In,Ga)N, it should be understood AlN, AlGaN, InGaN or GaN. Next, reference is made more particularly to porous GaN, but it is possible to have, for example, porous InGaN or AlGaN.

[0109] We will describe in more detail the micro-LED manufacturing method with reference to the appended FIGS. 1A-1F, 2A-2G and 3A-3G.

[0110] The micro-LED manufacturing method comprises the following steps: [0111] a) providing a first stack 100 comprising (FIGS. 1A, 2A, 3A): [0112] a base substrate 101, [0113] possibly a buffer layer 102, for example made of AlGaN, [0114] a layer 103 made of non-intentionally doped GaN (nid GaN), [0115] a strongly n-doped GaN layer 104 (n.sup.+-GaN), having a first electrical conductivity, [0116] an n-doped GaN layer 105 (n-GaN), [0117] quantum wells 106 made of Gan/InGaN, [0118] a p-doped GaN layer 107 (p-GaN), [0119] a first electrode 108 (or lower electrode), preferably metallic, [0120] b) transferring the first stack 100 onto a support substrate 201, covered with an electrically-conductive layer 202, preferably a metal layer (FIGS. 1B, 2B, 3B), the metal layer 202 interconnected with the first electrode 108 during transfer, preferably carried out by metal-metal bonding, [0121] c) removing the base substrate 101, then removing the buffer layer 102 where appropriate and the layer 103 made of nid-GaN, for example by thinning, whereby a substrate of interest comprising the support substrate 201, the lower electrode 202, the p-doped GaN layer 107, the quantum wells 106 made of GaN/InGaN, the n-doped GaN layer 105, the strongly n-doped GaN layer 104 is obtained (FIGS. 1C, 2C, 3C), [0122] d) partially or totally porosifying the strongly n-doped GaN layer 104, whereby a porosified GaN layer 104 is obtained (FIGS. 1D, 2E, 3E), [0123] e) forming mesas in the substrate of interest, the mesas comprising the porosified GaN layer 104, the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode 108 and a portion of the support substrate 201 (FIGS. 1E, 2F, 3F).

[0124] According to a first alternative, the method may further comprise the following steps: [0125] f) covering the mesas (i.e. covering the upper face of the porosified layer 104) with a second electrode 301 (or upper electrode) formed for example by a conductive transparent oxide layer, preferably an indium-tin oxide layer (FIGS. 1F, 2G, 3G), [0126] g) possibly, depositing an encapsulation layer 302 over the second electrode 301, [0127] h) possibly, depositing an anti-reflective layer 303 over the encapsulation layer 302.

[0128] According to another alternative, the method may further comprise the following steps: [0129] f) forming a second electrode 301 (or upper electrode) for example a conductive transparent oxide layer, or an aluminium layer over a lateral face of the mesas (i.e. over a lateral face of the porosified layer 104 and/or over a lateral face of the layer 105), [0130] g) covering the mesas (i.e. covering the upper face of the porosified layer 104) with an encapsulation layer 302, [0131] h) possibly, depositing an anti-reflective layer 303 over the encapsulation layer 302.

[0132] Thus, the contact of the second electrode 301 may be made on the upper face of the porosified GaN layer 104, on the lateral face of the porosified GaN layer 104 or on the lateral face of the doped GaN layer 105.

[0133] The upper face of the porosified GaN layer 104 is in direct contact with the upper electrode 301 made of a conductive transparent oxide or in direct contact with the encapsulation layer 302. By in direct contact, it should be understood that there is no intermediate layer between the aforementioned layers.

[0134] The first stack provided in step a) comprises a base substrate 101 having, for example, a thickness ranging from 250 ?m to 2 mm. The thickness depends on the nature of the base substrate 101 and on its dimensions. For example, for a base substrate made of sapphire with a 2-inch diameter, the thickness may be 350 ?m. For a support layer made of sapphire with a 6-inch diameter, the thickness may be 1.3 mm. For a support layer made of silicon with a 200-mm diameter, the thickness may be 1 mm.

[0135] In the case of a base substrate 101 made of silicon, a buffer layer made of (Al,Ga)N is advantageously interposed between the substrate 101 and the nid-GaN layer 103. It consists of a buffer layer for growth.

[0136] The nid-GaN layer 103 is a non-intentionally doped (nid) layer in order not to be porosified. By non-intentionally doped GaN, it should be understood a concentration lower than 5?10.sup.17 at/cm.sup.3. For example, the layer 103 made of nid-GaN has a thickness ranging from 500 nm to 5 ?m. Advantageously, its thickness is between 1 and 4 ?m to absorb the stresses related to the lattice mismatch between the GaN and the underlying layers.

[0137] The strongly n-doped GaN layer 104 is deposited over the nid-GaN layer. By strongly doped GaN, it should be understood a concentration higher than 6?10.sup.18 at/cm.sup.3, preferably at least 8?10.sup.18 at/cm.sup.3, and possibly higher than 10.sup.19 at/cm.sup.3. It has a thickness comprised between 100 nm and 500 nm, preferably between 200 nm and 500 nm and even more preferably between 300 nm and 500 nm. This layer allows absorbing the TTVs due to the manufacturing process of the micro-LEDs. This layer is porosified during step d).

[0138] The strongly n-doped GaN layer 104 comprises two main faces (an upper face and a lower face) parallel or substantially parallel to one another and a lateral face.

[0139] The doped GaN layer 105 is formed over the strongly doped GaN layer 104. By doped GaN, it should be understood a concentration higher than 10.sup.18 at/cm.sup.3, preferably between 1?10.sup.18 at/cm.sup.3 and 5?10.sup.18 at/cm.sup.3. For example, the layer made of GaN has a thickness ranging from 100 nm to 1 ?m. It must be sufficiently electrically conductive to be able to achieve a resumption of contact on this layer during the electrochemical anodising step. This electrically-conductive layer is electrically connected to the voltage or current generator. Advantageously, the quality of the material of the upper layer is ensured. The minimum thickness varies according to the doping level.

[0140] The n-doped GaN layer 105 comprises two main faces (an upper face and a lower face) parallel or substantially parallel to one another and a lateral face.

[0141] Next, an n-type doping is described, but it could consist of a p-type doping. The dopings could be inverted.

[0142] For example, the quantum wells 106 are GaN/InGaN wells.

[0143] For example, the p-doped layer 107 has a thickness comprised between 100 nm and 200 nm. For example, it may have a doping level of 1?10.sup.19.Math.cm.sup.?3 and possibly of at least 1?10.sup.20.Math.cm.sup.?3 in the case of an Mg doping.

[0144] The aforementioned different GaN layers as well as the quantum wells 106 are formed by epitaxy.

[0145] The first stack 100 may be a more complex stack and may contain, for example, one or more of the following elements: an AlGaN electron-blocking layer (EBL), a multilayer with different dopings to make porous mesas, etc.

[0146] During step b), the first stack (p side) is transferred onto a second stack comprising a support substrate 201 and a lower electrode 202 (or first electrode). The first electrode 108 is deposited over the first stack and then the whole is transferred onto the support substrate 201 covered with the metal layer 202.

[0147] Preferably, the support substrate 201 is a substrate comprising an ASIC-type integrated circuit, (Application-Specific Integrated Circuit). The ASIC circuit may comprise electronic components (transistor(s), capacitor(s), resistors, etc.) enabling the individual control/power supply of each micro-LED according to the colour expected for the pixel. The electronic components are made directly in the volume (or bulk) of the substrate.

[0148] The support substrate 201 may also be an array substrate of thin-film transistors (TFT), in particular to obtain larger direct-view displays.

[0149] Preferably, the substrate 201 is a silicon wafer.

[0150] The lower electrode 202 (or first electrode) covers the support substrate. It could also be made of ITO. For example, the lower electrode 202 is made of aluminium or silver. For example, it may have a thickness comprised between 40 and 200 nm.

[0151] During step c), the base substrate 101, the buffer layer 102 where appropriate, and the nid-GaN layer 103 are removed. For example, the base substrate 101 is removed by laser (also referred to as lift-off technique). The buffer layer 102 and the nid-GaN layer 103 may be removed by thinning. Thinning may be terminated at the nid layer 103/strongly doped GaN layer 104 interface. Preferably, thinning is terminated in the strongly doped GaN layer 104.

[0152] During step d), the strongly doped GaN layer 104 is partially or totally porosified. The higher the doping level, the greater the porosification at fixed potential will be. The choice is done according to the targeted optical index.

[0153] During step d), the structure and a counter-electrode (CE) are electrically connected to a voltage or current generator. The structure serves as a working electrode (WE). Next, it will be referred to as voltage generator, but it could consist of a current generator allowing applying a current between the device and the counter-electrode.

[0154] Contact is achieved on an electrically-conductive layer of the structure, preferably, on the doped GaN layer 105.

[0155] The counter-electrode is made of an electrically-conductive material, for example a metal such as platinum.

[0156] During step d), the electrodes are immersed in an electrolyte, also called electrolytic bath or electrolytic solution. The electrolyte may be acidic or basic. For example, the electrolyte is oxalic acid. It may also consist of KOH, HF, HNO.sub.3, NaNO.sub.3, or H.sub.2SO.sub.4 or a mixture thereof.

[0157] For example, the applied voltage may be comprised between 1 and 30V. Preferably, it is between 5 and 18V (for example between 5 and 15V), and even more preferably between 6 and 12V, for example between 8 and 10V. The voltage is selected according to the doping level of the different layers and the targeted porosity level. For example, it is applied for a duration ranging from a few seconds to several hours. Porosification is complete when there is no longer any current of the imposed potential. At this point, the entire doped structure has been porosified and the electrochemical reaction stops.

[0158] The electrochemical anodising step may be carried out under ultraviolet (UV) light.

[0159] Upon completion of the porosification step, the porosity level of the porosified GaN layer 104 is at least 10%. Preferably, it ranges from 10% to 80%, and even more preferably from 30% to 70%.

[0160] The largest dimension (the height) of the pores may vary from a few nanometres to a few micrometres. The smallest dimension (the diameter) may vary from a few nanometres to a hundred nanometres, in particular from 30 to 70 nm.

[0161] The obtained porosification (porosity level and pore size) depends on the doping of the layer and the parameters of the method (voltage applied, duration, nature and concentration of the electrolyte, chemical post-treatment or annealing).

[0162] The anodisation of the GaN layer 104 may be total. According to some variants described in more detail later on, the anodisation may be partial. In other words, one or more area(s) 110 of the strongly doped GaN layer are not porosified during step d). Each non-porosified area extends from the first main face to the second main face to form an electrical conduction path through the GaN layer. For example, the electrical conduction path may be in the form of a channel or a tube.

[0163] Thus, the electrical conduction is improved by selecting the position of the non-porosified areas. In addition, it is possible to act on the relief.

[0164] During step e), the mesas are formed. For example, structuring of the stack is carried out by photolithography.

[0165] Mesas, also referred to as elevations, are raised elements. They are obtained, for example, by etching a continuous layer or a plurality of stacked continuous layers, so as to leave only a certain number of raised portions of this layer or these layers. Etching is typically a plasma etching (or dry etching) process. The raised portions can be used to define pixels.

[0166] Preferably, the sidewalls of the mesas are perpendicular to this stack of layers.

[0167] For example, the surface of the mesas may be circular, hexagonal, square or rectangular.

[0168] The largest dimension of the surface of the mesas ranges from 500 nm to 500 ?m, preferably from 1 to 10 ?m and even more preferably from 3 to 5 ?m. For example, the largest dimension of a circular surface is the diameter.

[0169] The thickness (or depth) of the mesas corresponds to the dimension of the mesa perpendicular to the underlying stack. The depth of the mesas ranges from 0.5 to 1 ?m, preferably from 0.3 to 2 ?m.

[0170] The spacing between two consecutive mesas ranges from 50 nm to 20 ?m.

[0171] During step f), a second electrode 301 is deposited over the porosified layer 104 (i.e. over the upper face of the porosified layer 104). The second electrode is a conductive transparent oxide layer. It may consist of an indium-tin oxide layer (ITO), aluminium-doped zinc oxide (AZO), gallium zinc oxide (GZO) or SnO.sub.2. This layer covers the mesas. The conductive transparent oxide layer serves as an upper electrode or cathode.

[0172] After step f), it is possible to implement a step g) of depositing an encapsulation layer 302 over the conductive transparent oxide layer 301. For example, the encapsulation layer 302 is a layer made of SiN, SiO.sub.2 or SiON. It could also consist of a multilayer.

[0173] Structuring of the encapsulation layer 302 by micro-lenses may also be carried out.

[0174] It is also possible to deposit an anti-reflector 303 (i.e. an anti-reflective layer) over the encapsulation layer 302 (step h)).

[0175] Advantageously, the method comprises between step e) and step f), a step during which a planarising material or stack 304 is deposited between the mesas. The material or the stack may be conductive or insulator. Preferably, it includes copper. For example, the material is deposited by electrochemical deposition (ECD). Advantageously, a step of chemical-mechanical polishing (CMP) of the deposited material 304 is carried out.

[0176] We will now describe two variants for which the core of the strongly doped GaN layer of the pixels is not porosified. For example, the core represents 5% to 25% of the volume of the layer.

[0177] According to an advantageous variant, shown in FIGS. 2A to 2G, the method comprises the following steps: [0178] a) providing a first stack 100 comprising a base substrate 101, possibly a buffer layer 102 made of AlGaN, a layer 103 made of nid-GaN, a strongly n-doped GaN layer 104, an n-doped GaN layer 105, quantum wells 106 made of Gan/InGaN and a p-doped GaN layer 107 (FIG. 2A), [0179] b) transferring the first stack 100 onto a second stack comprising a support substrate 201 covered with a metal layer 202 (FIG. 2B), [0180] c) removing the base substrate 101, then removing the buffer layer 102 where appropriate, and the layer 103 made of nid-GaN for example by thinning, whereby a substrate of interest comprising a support substrate 201, the lower electrode 202, the p-doped GaN layer 107, quantum wells 106 made of GaN/InGaN, an n-doped GaN layer 105, a strongly n-doped GaN layer 104 is obtained (FIG. 2C), [0181] locally modifying the doping level of the layer 104 to form areas 110 having an electrical conductivity lower than the first electrical conductivity, for example by means of an ion implantation, the GaN n++ layer 104 is thus locally un-doped and the areas 110 with a lower conductivity will not be porosified during step d) (FIG. 2D), [0182] d) porosifying the strongly n-doped GaN layer 104, whereby a porosified layer 104 is obtained locally comprising areas 110 that are barely or not porosified (FIG. 2E), [0183] e) forming mesas in the substrate of interest, by etching the second portion of the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode 202 and a portion of the support substrate 201, the mesas thus comprising the porosified GaN layer 104 locally having non-porosified areas 110, the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode 202 and a portion of the support substrate 201 (FIG. 2F), [0184] preferably implementing a step of filling (with a material 304 or a material stack)/planarisation between the mesas, [0185] f) covering the mesas by an upper electrode 301 formed by a conductive transparent oxide layer (FIG. 2G), [0186] g) possibly, depositing an encapsulation layer 302 over a conductive transparent oxide layer and, advantageously, an anti-reflective layer 303.

[0187] For example, the local decrease in the doping level of the strongly doped GaN layer 104 is achieved by implanting helium or hydrogen. The ion implantation step allows reducing the conductivity, deactivating the dopants initially in presence.

[0188] After the porosification step, it is possible to carry out a thermal annealing step to increase the conductivity of the area 110.

[0189] According to another advantageous variant, shown in FIGS. 3A to 3G, the method comprises the following steps: [0190] a) providing a first stack 100 comprising a base substrate 101, possibly a buffer layer 102 made of AlGaN 102, a nid-GaN layer 103, a strongly n-doped GaN layer 104, an n-doped GaN layer 105, quantum wells 106 made of Gan/InGaN and a p-doped GaN layer 107 (FIG. 3A), [0191] b) transferring the first stack 100 onto a second stack comprising a support substrate 201 and a metal layer 202 (FIG. 3B), [0192] c) removing the base substrate 101, then, where appropriate, the buffer layer 102 and the GaN nid layer 103, for example by thinning, whereby a substrate of interest comprising a support substrate 201, the upper electrode 202, the p-doped GaN layer 107, quantum wells 106 made of GaN/InGaN, an n-doped GaN layer 105, a strongly doped GaN layer 104 is obtained (FIG. 3C), [0193] etching the GaN n++ layer 104 and a portion of the GaN n layer 105 to form pre-pixels stopping in a first portion of the n-GaN layer 105, the pre-pixel comprising the GaN n++ layer 104 and a portion of the GaN n layer 105 (FIG. 3D), [0194] d) porosifying the periphery of the strongly n-doped GaN layer 104 (the electrochemical porosification starting by the contour of the pixels, the porosification process is stopped before the core is porosified), the non-etched second portion of the n-GaN layer 105 allowing conducting the current for the electrochemical porosification step (FIG. 3E), whereby a partially porosified GaN layer 104 is obtained, [0195] e) forming mesas in the substrate of interest starting from the pre-pixels, by etching the second portion of the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode 202 and a portion of the support substrate 201, the mesas thus comprising the strongly doped and partially porosified GaN layer 104, the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the first electrode 108 and a portion of the support substrate 201 (FIG. 3F), [0196] preferably implementing a step of filling (with a material 304 or a material stack)/planarisation between the mesas, [0197] f) covering the mesas with an upper electrode 301 formed by a conductive transparent oxide layer, [0198] g) possibly, depositing an encapsulation layer 302 over a conductive transparent oxide layer and, advantageously, an anti-reflective layer 303.

[0199] We have previously described variants implementing a porosification step after transfer (integration with monolithic bonding of the epitaxy).

[0200] We will not describe in more detail a variant where the porosification step is implemented before the transfer step (so-called flip-chip integration).

[0201] According to this other advantageous variant, shown in FIGS. 4A to 4J, the method may comprise the following steps: [0202] i) providing a stack comprising a support layer 101, a non-intentionally doped GaN layer 103, a strongly n-doped GaN layer 104, an n-doped GaN layer 105, quantum wells 106 and a p-doped GaN layer 107, a first electrode 108 (FIG. 4A), [0203] iii) forming mesas in the stack, by etching the first electrode 108, the p-doped GaN layer 107, the quantum wells 106), the n-doped GaN layer 105, the strongly n-doped GaN layer 104 and a portion of the non-intentionally doped GaN layer 103 (FIG. 4B), [0204] ii) selectively porosifying the strongly n-doped GaN layer 104, whereby a porosified GaN layer 104 is obtained (FIG. 4C), [0205] preferably depositing a passivation dielectric layer 401 (FIG. 4D), [0206] etching and planarising the upper surface of the stack to shape the first electrode 108, and preferably fill the inter-mesas space with an electrically-conductive and heat-conductive element (FIG. 4E), [0207] preparing metal pads 402 for hybrid bonding or flipping chips (flip chip) (FIG. 4F), [0208] transferring the obtained stack onto a support substrate 201, for example an ASIC-type one, also comprising metal pads (FIG. 4G), [0209] removing the support layer 101, the non-intentionally doped GaN layer 103, for example by thinning, whereby a substrate of interest comprising the support substrate 201, the first electrode 108, the p-doped GaN layer 107, the quantum wells 106 made of GaN/InGaN, the n-doped GaN layer 105 and the porosified strongly n-doped GaN layer 104 is obtained (FIG. 4H), [0210] iv) covering the porosified GaN layer 104 with a second electrode 301 formed by a conductive transparent oxide layer, preferably an indium-tin oxide layer, the second electrode 301 being in direct contact with the porosified GaN layer 104 (FIG. 4I), [0211] depositing an encapsulation layer 302 over the second electrode (FIG. 4J).

[0212] The characteristics of the different layers, of the different elements described for this variant where the porosification step is implemented before the transfer step may be identical to the characteristics of the different layers, of the different elements described for the variant where the porosification step is implemented after the transfer step.

[0213] The obtained micro-LED structure comprises: [0214] a substrate of interest in which mesas are formed, [0215] the substrate of interest comprising a support substrate 201, a lower electrode 202, a p-doped GaN layer 107, quantum wells 106 made of GaN/InGaN, an n-doped GaN layer 105, a totally or partially porosified GaN layer 104, [0216] the mesas comprising the porosified GaN layer 104, the doped GaN layer 105, the quantum wells 106, the p-doped GaN layer 107, the lower electrode (or anode) 202 and a portion of the support substrate 201, [0217] an upper electrode 301 (or cathode) formed by a conductive transparent oxide layer, preferably an indium-tin oxide layer, covering the mesas, [0218] possibly, with an encapsulation layer 302 and an anti-reflective layer 303.

[0219] As mentioned before, the GaN layer 104 of the mesas may be totally porosified or partially porosified.

[0220] Advantageously, the GaN layer 104 of the mesas comprises a non-porosified central portion 110 and a porosified boundary.

[0221] The central portion may be weakly doped or strongly doped.

[0222] The approach is particularly interesting: [0223] for structures whose GaN layer is covered and in contact with a transparent electrode then with an encapsulation layer (GaN having an optical index close to that of the transparent electrode) [0224] for structures where the contact of the electrode is a lateral contact and where the GaN layer is covered and in contact with the encapsulation layer (the GaN having an optical index close to that of the encapsulation layer).

[0225] In any case, the uniformity of the emission in the encapsulation is found in the air thanks to a structuring that breaks the cavity effect, namely by addition of an anti-reflective layer which enables the light emitted in the encapsulation layer, in particular made of SiN, to pass directly into the air without interacting again with the stack of the structure.

Comparative Examples and Illustrative and Non-Limiting Examples of Different Embodiments

Example 1: Comparative Example with a LED Structure Covered with ITO and SiN

[0226] In this first illustrative example, the studied LED stack successively comprises (FIG. 5A): an aluminium layer 202, a p-doped layer 107, quantum wells 106, an n-doped GaN layer 105 with an optical index 2.4, a conductive transparent oxide layer 301 made of ITO with an optical index 1.91 and an encapsulation layer 302 made of SiN with an optical index 1.95.

[0227] The simulation of the luminance at 0? (in the axis perpendicular to the plane of the structure) in the SiN according to the n-GaN thickness (FIG. 5B) shows that the luminance very strongly depends on the variations of the GaN thickness.

Example 2: Illustrative Example with a LED Structure Covered with ITO and with SiN

[0228] In this example, the studied LED stack successively comprises (FIG. 6A): an aluminium layer 202, a p-doped layer 107, quantum wells 106, an n-doped GaN layer 105 with an optical index 2.4, a porous GaN layer 104 with an optical index 1.9, a conductive transparent oxide layer 301 made of ITO with an optical index 1.91 and an encapsulation layer 302 made of SiN with an optical index 1.95. In comparison with the previous example, a porous GaN layer has been added. The non-porosified GaN thickness is selected so as to be at a maximum extraction.

[0229] The simulation of the luminance at 0? in SiN according to the porous GaN thickness (FIG. 6B) confirms that the luminance is much more robust to the GaN thickness variations than with the structure of the comparative example 1 (i.e. almost independent of the porous GaN thickness with a value close to the maximum of the case of Example 1).

Example 3: Comparative Example with a LED Structure Covered with ITO, SiN and SiO.SUB.2

[0230] In this first illustrative example, the studied LED stack successively comprises (FIG. 7A): an aluminium layer 202, a p-doped layer 107, quantum wells 106, an n-doped GaN layer 105 with an optical index 2.4, a conductive transparent oxide layer 301 made of ITO with an optical index 1.91, an encapsulation layer 302 made of SiN with an optical index 1.95, an anti-reflective layer 303 made of SiO.sub.2.

[0231] The simulation of the luminance at 0? in air, located above the layer 303, according to the n-GaN thickness (FIG. 7B) shows that the luminance depends very strongly on the variations of the GaN thickness.

Example 4: Illustrative Example with a LED Structure Covered with ITO, SiN and SiO.SUB.2

[0232] In this example, the studied LED stack successively comprises (FIG. 8A): an aluminium layer 202, a p-doped layer 107, quantum wells 106, an n-doped GaN layer 105 with an optical index 2.4, a porous GaN layer 104 with an optical index 1.9, a conductive transparent oxide layer 301 made of ITO with an optical index 1.91, an encapsulation layer 302 made of SiN with an optical index 1.95, an anti-reflective layer 303 made of SiO.sub.2.

[0233] The non-porosified GaN thickness is selected so as to be at a maximum extraction.

[0234] The simulation of the luminance at 0? in the air, located above the layer 303, according to the porous GaN thickness (FIG. 8B) confirms that the luminance is much more robust to GaN thickness variations than with the structure of the comparative example 3, i.e. almost independent of the porous GaN thickness.

[0235] In addition, the simulation of the luminance in air according to the observation angle for different porous GaN thicknesses (FIG. 9) shows that the luminance in air is barely affected by the porous GaN thickness even at angles different from 0?.

[0236] The 2D simulation of the external quantum efficiency or EQE (in air) of a micro-LED having mesas with a size of about 1 ?m according to the GaN thickness has also been studied (FIG. 10). The micro-LED is not covered with an encapsulation layer. It should be noted that this simulation represents the overall EQA (between 0 and 90?).

[0237] It is interesting to note that the smaller the GaN thicknesses, the higher the EQE will be and the greater the oscillations according to the GaN thickness will be. The oscillation effects might be even greater as the angular space will be reduced, for example if the considered emission is between 0 and 18.5? in the axis perpendicular to the plane of the structure.