CONTROL DEVICE AND METHOD FOR A SWITCHING VOLTAGE REGULATOR, AND SWITCHING VOLTAGE REGULATOR

Abstract

A control device for a switching voltage regulator of the buck-boost type having a switching circuit. The control device is configured to perform a current-control of the switching circuit and is formed by a filter and a loop control circuit. The filter is configured to be coupled to a resistive element of the switching circuit and to provide a filtered signal starting from a measurement signal indicative of a current flowing through the resistive element. The loop control circuit is configured to generate one or more switching control signals to drive the switching circuit, as a function of the filtered signal. The filter is configured to receive a filter control signal indicative of an actual operating mode of the switching voltage regulator. The filter is variable as a function of the filter control signal.

Claims

1. A control device for a buck-boost switching voltage regulator comprising a switching circuit, the control device configured to perform a current-control of the switching circuit, the control device comprising: a filter configured to be coupled to a resistive element of the switching circuit and to provide a filtered signal starting from a measurement signal indicative of a current flowing through the resistive element; and a loop control circuit configured to generate one or more switching control signals to drive the switching circuit, as a function of the filtered signal; wherein the filter is further configured to receive a filter control signal indicative of an actual operating mode of the buck-boost switching voltage regulator, and wherein the filter is variable as a function of the filter control signal.

2. The control device according to claim 1, wherein the filter has a time constant that is variable as a function of the filter control signal.

3. The control device according to claim 1, wherein the filter is a low-pass filter.

4. The control device according to claim 1, wherein the filter is configured to have a first time constant when the buck-boost switching voltage regulator is in a buck operating mode, and a second time constant when the buck-boost switching voltage regulator is in a boost operating mode, wherein the second time constant is greater than the first time constant.

5. The control device according to claim 1, wherein the filter control signal is one of the switching control signals.

6. The control device according to claim 1, wherein the filter comprises at least one resistive element having a resistance that is variable as a function of the filter control signal.

7. The control device according to claim 6, wherein the resistive element comprises a parallel circuit including a resistor and a switch, wherein the switch is controlled by the filter control signal.

8. The control device according to claim 6, wherein the filter control signal is a first filter control signal, wherein the filter is further configured to receive a second filter control signal indicative of the actual operating mode of the buck-boost switching voltage regulator and different from the first filter control signal, wherein the resistive element of the filter comprises a parallel circuit having a first branch and a second branch, each branch comprising a respective resistor and a respective switch connected to each other in series, and wherein the switch of the first branch is controlled by the first filter control signal, and the switch of the second branch is controlled by the second filter control signal.

9. The control device according to claim 1, wherein the filter comprises at least one capacitive element having a capacitance that is variable as a function of the filter control signal.

10. The control device according to claim 1, further configured to perform a peak-type current-control when the buck-boost switching voltage regulator is in a boost operating mode, and to perform a valley-type current-control when the buck-boost switching voltage regulator is in a buck operating mode.

11. The control device according to claim 1, wherein the loop control circuit comprises: a feedback circuit configured to generate a control signal as a function of a difference between an output voltage and a reference voltage; a pulse width modulation (PWM) modulator configured to receive the filtered signal and the control signal and, in response, generate a modulated signal; and a driving logic circuit configured to provide the switching control signals as a function of the modulated signal.

12. A buck-boost switching voltage regulator comprising: a control device configured to perform a current-control of a switching circuit, the control device comprising: a filter coupled to a resistive element of the switching circuit and configured to provide a filtered signal starting from a measurement signal indicative of a current flowing through the resistive element; and a loop control circuit configured to generate one or more switching control signals to drive the switching circuit, as a function of the filtered signal; wherein the filter is further configured to receive a filter control signal indicative of an actual operating mode of the buck-boost switching voltage regulator, and wherein the filter is variable as a function of the filter control signal; and the switching circuit, comprising: a first half-bridge comprising a first switch and a second switch coupled in series between an input node and a common reference potential node; a second half-bridge comprising a third switch and a fourth switch coupled in series between an output node and the common reference potential node; an inductor being coupled between intermediate nodes of the first and the second half-bridges; and the resistive element, wherein the first, second, third, and fourth switches are controlled respectively by first, second, third, and fourth switching control signals generated by the loop control circuit.

13. The buck-boost switching voltage regulator according to claim 12, wherein the filter comprises electrical elements integrated in the control device.

14. The buck-boost switching voltage regulator according to claim 12, wherein the filter comprises discrete electrical elements.

15. A control method for a buck-boost switching voltage regulator comprising a switching circuit and a control device configured to perform a current-control of the switching circuit, the control method comprising: filtering, by a filter of the control device, as a function of an actual operating mode of the buck-boost switching voltage regulator, a measurement signal indicative of a current that flows through a resistive element of the switching circuit, thereby generating a filtered signal; and generating, by a loop control circuit of the control device, one or more switching control signals to drive the switching circuit, as a function of the filtered signal.

16. The control method according to claim 15, further comprising receiving, by the filter, a filter control signal indicative of the actual operating mode of the buck-boost switching voltage regulator.

17. The control method according to claim 16, wherein the filter has a time constant that is variable as a function of the filter control signal.

18. The control method according to claim 16, wherein the filter control signal is one of the switching control signals.

19. The control method according to claim 16, wherein the filter comprises at least one resistive element having a resistance that is variable as a function of the filter control signal.

20. The control method according to claim 16, wherein the filter comprises at least one capacitive element having a capacitance that is variable as a function of the filter control signal.

21. The control method according to claim 15, wherein the filter is a low-pass filter.

22. The control method according to claim 15, further comprising: utilizing, by the filter, a first time constant in response to the buck-boost switching voltage regulator being in a buck operating mode; or utilizing, by the filter, a second time constant in response to the buck-boost switching voltage regulator being in a boost operating mode, the second time constant being greater than the first time constant.

23. The control method according to claim 15, further comprising: performing a peak-type current-control in response to the buck-boost switching voltage regulator being in a boost operating mode; or performing a valley-type current-control in response to the buck-boost switching voltage regulator being in a buck operating mode.

24. The control method according to claim 15, further comprising: generating, by a feedback circuit of the loop control circuit, a control signal as a function of a difference between an output voltage and a reference voltage; receiving, by a pulse width modulation (PWM) modulator of the loop control circuit, the filtered signal and the control signal; generating, by the PWM modulator, a modulated signal; and providing, by a driving logic circuit of the loop control circuit, the switching control signals as a function of the modulated signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0027] For a better understanding of the present invention, some embodiments thereof are now described, purely by way of non-limiting example, with reference to the attached drawings, wherein:

[0028] FIG. 1 shows a circuit diagram of a switching voltage regulator;

[0029] FIG. 2 shows a block diagram of a switching voltage regulator comprising a filter;

[0030] FIG. 3 shows a detailed circuit diagram of a portion of the voltage regulator of FIG. 2 including the filter according to an embodiment; and

[0031] FIGS. 4-8 show circuit diagrams of the filter of FIG. 2 according to different embodiments.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0032] FIG. 2 shows a block diagram of a switching voltage regulator 50, hereinafter also simply referred to as regulator 50, comprising a switching circuit 53 and a control device 55, which are mutually coupled.

[0033] The regulator 50 has an input node 51 from which it receives an input voltage V.sub.IN, a reference node 52 from which it receives a nominal or reference voltage V.sub.REF, and an output node 54 to which it provides an output voltage V.sub.OUT. A load 58 is coupled to the output node 54 of the regulator 50.

[0034] In detail, the regulator 50 is a DC-DC converter of the buck-boost type, configured to generate the output voltage V.sub.OUT, starting from the input voltage V.sub.IN, so that the output voltage V.sub.OUT is equal to the reference voltage V.sub.REF, which may be chosen by a user as a function of the specific application.

[0035] The switching circuit 53 and the control device 55 may be integrated in a same die or formed in different dies.

[0036] The switching circuit 53, shown in detail in FIG. 3, is here a four-switch non-inverting circuit, in particular configured to operate in buck, boost or buck-boost (or transition) mode, depending on whether the input voltage V.sub.IN is respectively higher, lower than or approximately equal with respect to the output voltage V.sub.OUT (or to the reference voltage V.sub.REF).

[0037] In detail, the switching circuit 53 is formed by a first half-bridge 64 and by a second half-bridge 65.

[0038] The first half-bridge 64 is formed by a first high-side switch 68 and a first low-side switch 69, here two N-MOS transistors, coupled in series between the input node 51 and a common node 72.

[0039] In detail, the first high-side switch 68 is coupled between the input node 51 and an intermediate node 74 of the first half-bridge 64 and the first low-side switch 69 is coupled between the intermediate node 74 of the first half-bridge 64 and the common node 72.

[0040] The input node 51 is at the input voltage V.sub.IN with respect to a reference potential line (ground) 78.

[0041] The common node 72 is coupled to ground 78 through a resistive element, here a shunt resistor 80, having resistance R.sub.S.

[0042] The second half-bridge 65 is formed by a second high-side switch 82 and by a second low-side switch 83, also here two N-MOS transistors, coupled in series between the output node 54 and the common node 72.

[0043] In detail, the second high-side switch 82 is coupled between the output node 54 and an intermediate node 85 of the second half-bridge 65 and the second low-side switch 83 is coupled between the intermediate node 85 of the second half-bridge 65 and the common node 72.

[0044] The output node 54 provides the output voltage V.sub.OUT, with respect to ground 78.

[0045] The switching circuit 53 also comprises an inductor 87 having inductance L and coupled between the intermediate node 74 of the first half-bridge 64 and the intermediate node 85 of the second half-bridge 65.

[0046] The first high-side switch 68, the first low-side switch 69, the second high-side switch 82, and the second low-side switch 83 are each controlled by a respective switch control signal H1, L1, H2, L2.

[0047] The switching circuit 53 also comprises an output capacitor 84 having capacitance C.sub.OUT, coupled between the output node 54 and the ground 78.

[0048] The control device 55 is configured to perform a current-control of the switching circuit 53.

[0049] The control device 55 is coupled to the output node 54 and the reference node 52.

[0050] Furthermore, the control device 55 is coupled to the shunt resistor 80 so as to detect a measurement or shunt voltage V.sub.S indicative of the inductor current flowing, in use, through the shunt resistor 80.

[0051] With reference to FIG. 2, the control device 55 comprises a filter 90, described in detail below, which receives the shunt voltage V.sub.S and generates a filtered signal, here a filtered voltage V.sub.F; and a loop control circuit, comprising a feedback circuit 92, a PWM modulator 94, and a driving logic circuit 96, which provides the switch control signals H1, L1, H2, L2 as a function of the filtered signal V.sub.F, so that the output voltage V.sub.OUT is kept equal to the reference voltage V.sub.REF.

[0052] In detail, the feedback circuit 92 is coupled to the output node 54 and to the reference node 52 and generates a control signal, here a control voltage V.sub.C.

[0053] The PWM modulator 94 receives the control voltage V.sub.C and the filtered voltage V.sub.F and provides in response a PWM modulated signal.

[0054] The driving logic circuit 96 provides the switch control signals H1, L1, H2, L2 starting from the PWM modulated signal.

[0055] In the embodiment shown, the control device 55 also comprises a mode determination module 98 which receives the input voltage V.sub.IN and the output voltage V.sub.OUT and provides in response a mode signal MOD which indicates whether the regulator 50 is in the buck, boost or buck-boost operating mode.

[0056] For example, the mode determination module 98 may compare the difference between the input voltage V.sub.IN and the output voltage V.sub.OUT with a first threshold V.sub.th1 and a second threshold V.sub.th2.

[0057] For example, if V.sub.IN<V.sub.OUT?V.sub.th1then the regulator 50 is in boost mode. If V.sub.IN>V.sub.OUT+V.sub.th2then the regulator 50 is in buck mode. If V.sub.OUT?V.sub.th1<V.sub.IN<V.sub.OUT+V.sub.th2 then the regulator 50 is in buck-boost or transition mode.

[0058] The feedback circuit 92, the PWM modulator 94 and the driving logic circuit 96 may receive the mode signal MOD, such that the respective operation is a function of the operating mode of the regulator 50, in a per se known manner.

[0059] The feedback circuit 92 detects an error signal indicative of a difference between the output voltage V.sub.OUT and the reference voltage V.sub.REF and provides in response the control voltage V.sub.C.

[0060] For example, the feedback circuit 92 may comprise an error amplifier, such as an operational transconductance amplifier (OTA) which receives and amplifies the error signal, and a filtering network coupled to the output of the OTA.

[0061] According to an embodiment, the control voltage V.sub.C may be indicative of further current-control parameters, for example offset, slope, etc., of a per se known type, as a function of the specific control mode of the regulator 50, for example peak or valley current-control.

[0062] The PWM modulator 94 compares the filtered voltage V.sub.F, indicative of the current flowing in the switching circuit 53, with the control voltage V.sub.C, indicative of the difference between the output voltage V.sub.OUT and the reference voltage V.sub.REF, and provides in response the PWM modulated signal.

[0063] The PWM modulated signal has a fixed period and a duty-cycle which is variable at each cycle (or period) of the PWM modulated signal.

[0064] In detail, in each cycle of the PWM modulated signal, the PWM modulated signal has a first semi-period of duration T.sub.ON and a second semi-period of duration T.sub.OFF which define an ON-phase and, respectively, an OFF-phase of the regulator 50. In the ON-phase, the current flowing through the inductor 87 has an increasing trend over time. In the OFF-phase, the current flowing through the inductor 87 has a decreasing trend over time.

[0065] The PWM modulator 94 modifies, in use, the duty cycle of the PWM modulated signal as a function of the comparison between the filtered voltage V.sub.F and the control voltage V.sub.C.

[0066] The driving logic circuit 96 provides, in a per se known manner, the switch control signals H1, L1, H2, L2 starting from the PWM modulated signal, as a function of the actual operating mode of the regulator 50.

[0067] In practice, the feedback circuit 92, the PWM modulator 94 and the driving logic circuit 96 form a closed loop control circuit.

[0068] With reference to FIGS. 2 and 3, the filter 90 receives a filter control signal which is indicative of the actual operating mode of the regulator 50; in particular here the filter 90 receives the switch control signal L1 which controls the first low-side switch 69.

[0069] The filter 90 is therefore a filter variable as a function of the actual operating mode of the regulator 50.

[0070] In detail, the filter 90 is a low-pass filter having a time constant variable as a function of the actual operating mode of the regulator 50.

[0071] The filter 90 comprises a first input node coupled to a terminal of the shunt resistor 80, here coinciding with the common node 72 and therefore indicated by the same reference number; a second input node coupled to a second terminal of the shunt resistor 80, here coinciding with the ground 78 and therefore indicated by the same reference number; and a first and a second output node 100, 101 having the filtered voltage V.sub.F dropping therebetween.

[0072] In this embodiment, the filter 90 comprises a first resistive element 102 coupled between the first input node 72 and the first output node 100 of the filter 90; a second resistive element 103 coupled between the second input node 78 and the second output node 101 of the filter 90; and a capacitive element, here a capacitor 104, having a capacitance C.sub.F and coupled between the first and the second output nodes 100, 101 of the filter 90.

[0073] The capacitance C.sub.F may be chosen as a function of the specific application.

[0074] The capacitance C.sub.F may be, for example, on the order of a few nF if the capacitor 104 is of discrete type or of a few tens of pF if the capacitor 104 is integrated in the control device 55.

[0075] The first resistive element 102 has a variable resistance as a function of the switch control signal L1.

[0076] The first resistive element 102 is a parallel circuit comprising a resistor 108 having resistance R.sub.F and a switch 109, here an NMOS transistor having an on-state resistance R.sub.ds,ON, lower than the resistance R.sub.F.

[0077] The resistances R.sub.F and R.sub.ds,ON may be chosen as a function of the specific application.

[0078] For example, the resistance R.sub.F may be on the order of a few Ohms and the on-state resistance R.sub.ds,ON may be of a few fractions of an Ohm, if the resistor 108 and the switch 109 are of discrete type.

[0079] For example, the resistance R.sub.F may be on the order of a few kOhms, if the resistor 108 is integrated into the control device 55.

[0080] The use of higher values of the resistance R.sub.F and lower values of the capacitance C.sub.F in the case where the capacitor 104 and the resistor 108 are integrated in the control device 55, with respect to the case where the capacitor 104 and the resistor 108 are discrete elements, allows to obtain a low die area occupancy of the filter 90.

[0081] The second resistive element 103 has a resistance variable as a function of the signal L1.

[0082] The second resistive element 103 is a parallel circuit comprising a resistor 110 having resistance R.sub.F and a switch 111, here an NMOS transistor, having an on-state resistance R.sub.ds,ON lower than the resistance R.sub.F.

[0083] The switches 109, 111 are controlled by the switch control signal L1.

[0084] What has been described above for the resistor 108 and the switch 109 may also be applied to the resistor 110 and the switch 111.

[0085] In particular, in this embodiment, the first and the second resistive elements 102, 103 are equal to each other; however, they may be different from each other according to the specific application.

[0086] In use, when the regulator 50 is in the boost mode, the driving logic circuit 96 provides the switch control signal H1 so as to keep the first high-side switch 68 closed (i.e., so as to keep the corresponding transistor 68 on, thus allowing a flow of current), and the switch control signal L1 so as to keep the first low-side switch 69 open (i.e., so as to keep the corresponding transistor 69 off, thus blocking a flow of current).

[0087] At the same time, in the boost mode, the driving logic circuit 96 provides the switch signals H2, L2 so as to control the alternating opening of the second high-side switch 82 and of the second low-side switch 83.

[0088] In detail, in each cycle of the PWM modulated signal, in the ON-phase of the boost mode, a current (indicated by a dotted arrow I.sub.L3 in FIG. 3) may flow through the first high-side switch 68, the inductor 87, the second low-side switch 83 and the shunt resistor 80. In the OFF-phase, a current (indicated by a dashed arrow I.sub.L1 in FIG. 3) may flow through the first high-side switch 68, the inductor 87 and the second high-side switch 82.

[0089] In the boost mode, the switch control signal L1 keeps open, in addition to the first low-side switch 69, also the switches 109, 111 of the filter 90 both in the ON-phase and in the OFF-phase.

[0090] Consequently, the resistance of the first and the second resistive elements 102, 103 is given by the values of resistance R.sub.F of the resistors 108, 110.

[0091] The filter 90 therefore has, in the boost mode, a time constant ?.sub.bo which is a function of the resistance R.sub.F and the capacitance C.sub.F; in particular, in the embodiment shown, the time constant ?.sub.bo is given by 2.Math.C.sub.F.Math.R.sub.F since the filter 90 is a differential filter.

[0092] When the regulator 50 is in the buck mode, the driving logic circuit 96 provides the switch control signal H2 so as to keep the second high-side switch 82 closed, and the switch control signal L2 so as to keep the second low-side switch 83 open.

[0093] The driving logic circuit 96 provides the switch signals H1, L1 so as to control the alternating opening of the first high-side switch 68 and the first low-side switch 69.

[0094] In detail, in each cycle of the PWM modulated signal, in the ON-phase of the buck mode, a current (indicated by the dashed arrow I.sub.L1 in FIG. 3) may flow through the first high-side switch 68, the inductor 87 and the second high-side switch 82. In the OFF-phase, a current (indicated by a dash-dot arrow I.sub.L2 in FIG. 3) may flow through the second high-side switch 82, the inductor 87, the first low-side switch 69 and the shunt resistor 80.

[0095] In practice, in the OFF-phase of the buck mode, when the inductor current I.sub.L2 flows through the shunt resistor 80, the switch control signal L1 keeps the switches 109, 111 of the filter 90 closed.

[0096] Consequently, the resistance of the first and the second resistive elements 102, 103 is given by the resistance R.sub.ds,ON of the switches 109, 111.

[0097] The resistance R.sub.ds,onis lower than the resistance R.sub.F.

[0098] Consequently, in buck mode, the filter 90 has a time constant ?.sub.bu given by 2.Math.C.sub.F.Math.R.sub.ds,on, and therefore lower than the time constant ?.sub.bo of the boost mode.

[0099] In the buck-boost or transition mode, the driving logic circuit 96 controls the switches H1, L1, H2, L2 so as to alternate the current paths indicated in FIG. 3 by the arrows I.sub.L1, I.sub.L2, I.sub.L3, in a per se known manner.

[0100] In practice, the control device 55 alternates a period of the PWM modulated signal wherein the regulator 50 is in the boost mode to a subsequent period of the PWM modulated signal wherein the regulator 50 is in the buck mode.

[0101] In practice, the filter 90 is a filter, here of differential type, having a variable time constant which depends on the capacitance C.sub.F and on the resistance R.sub.F or R.sub.ds,on, as a function of the value of the switch control signal L1.

[0102] In addition to what has been discussed above for the values C.sub.F, R.sub.F and R.sub.ds,on, these may be chosen during the design step as a function of the specific values of the time constants ?.sub.bo, ?.sub.bu desired.

[0103] For example, the values C.sub.F, R.sub.F and R.sub.ds,on may be chosen so that the time constants ?.sub.bo, ?.sub.bu are lower than a blanking time of the regulator 50, wherein the blanking time is chosen as a function of the on and/or off transients of the switches 68, 69, 82, 83. In particular, the values C.sub.F, R.sub.F and R.sub.ds,on may be chosen so that the blanking time is greater than or equal to, for example, 3.Math.?.sub.bo and 3.Math.?.sub.bu (or 4.Math.?.sub.bo and 4.Math.?.sub.bu).

[0104] The Applicant has observed that the possibility of automatically adjusting the time constant of the filter 90 as a function of the actual operating mode of the regulator 50 allows to obtain optimal operation of the regulator 50 in any operating condition, for example independently of the input voltage V.sub.IN and of the load current flowing through the load 58.

[0105] In fact, the filter 90 causes any noise in the shunt voltage V.sub.S to be suitably filtered in any operating mode of the regulator 50. In practice, the filter 90 reduces the effects of this noise on the filtered voltage V.sub.F.

[0106] Since the loop control circuit formed by the feedback circuit 92, the PWM modulator 94 and the driving logic circuit 96 generates the switching control signals H1, L1, H2, L2 as a function of the filtered signal V.sub.F, the noise of the shunt voltage V.sub.S does not affect the control of the switching circuit 53.

[0107] This allows to avoid, or in any case to reduce, the generation of subharmonics or other deviations of the inductor current.

[0108] The filter 90 therefore allows an improved operation of the regulator 50.

[0109] Furthermore, the possibility of modifying the time constant of the filter 90 as a function the actual operating mode of the regulator 50 allows to compensate for any parasitic capacitances or inductances of the regulator 50.

[0110] In particular, the Applicant has observed that the fact that the filter 90 may have, in the boost mode, a greater time constant than in the buck mode allows to adequately filter the noise in the shunt voltage V.sub.S and therefore to reduce and/or eliminate the generation of subharmonics in the inductor current both in boost mode and in the buck mode, even in the presence of high values, for example even higher than 20 A, of the load current.

[0111] In fact, the Applicant has observed that the inductor current may reach, in the boost mode, higher values than in the buck mode, for example if compared in case of equal load 58.

[0112] High values of the inductor current accentuate the effects of any parasitic capacitances and/or inductances of the switching circuit 53, for example formed by the shunt resistor 80 and/or by the current paths between the switches 69, 83 and the ground 78. Consequently, the shunt voltage V.sub.S may be subject to higher noise values in boost mode than in the buck mode.

[0113] A high time constant in boost mode allows to filter out this greater noise.

[0114] At the same time, the Applicant has verified that this high time constant may compromise the operation of the regulator 50 in buck mode.

[0115] Consequently, the use of the filter 90 having a greater time constant in boost mode than in the buck mode allows both to filter the noise of the shunt voltage V.sub.S and to ensure correct operation of the regulator 50 in both boost and buck modes, also in the presence of high inductor currents.

[0116] FIG. 4 shows a different embodiment of the filter, here indicated by 150, coupled to the shunt resistor 80 and providing the filtered voltage V.sub.F. The filter 150 has a general structure similar to that of the filter 90 of FIG. 3; consequently, elements in common are indicated by the same reference numbers and are not further described.

[0117] The filter 150 comprises, in addition to what has been described for the filter 90, also a third and a fourth resistive element 151, 152.

[0118] The third resistive element 151, here a resistor of resistance R.sub.F2, is arranged in series with the first resistive element 102, here between the resistor 108 and the first input node 72 of the filter 150.

[0119] The fourth resistive element 152, here a resistor of resistance R.sub.F2, is arranged in series with the second resistive element 103, here between the resistor 110 and the second input node 78 of the filter 150.

[0120] In practice, in this embodiment, when the switch control signal L1 keeps the switches 109, 111 open, for example in boost mode, the resistance of the filter 150 is given by R.sub.F+R.sub.F2.

[0121] When the switch control signal L1 keeps the switches 109, 111 closed, for example in buck mode, the resistance of the filter 150 is given by R.sub.ds,ON+R.sub.F2.

[0122] Consequently, also in this embodiment, the time constant of the filter 150 depends on the actual operating mode of the regulator 50 and is greater in boost mode than in the buck mode.

[0123] In this embodiment, the resistance of the filter 150 may be determined by the resistors 151, 152 and not by the on-state resistance R.sub.DS,on of the switches 109, 111, if the resistance R.sub.F2is greater than the on-state resistance R.sub.DS,on. Consequently, the time constant of the filter 150 may be independent of any variations in the on-state resistance R.sub.DS,on of the switches 109, 111.

[0124] FIG. 5 shows a different embodiment of the filter, here indicated by 170, coupled to the shunt resistor 80 and providing the filtered voltage V.sub.F. The filter 170 has a general structure similar to that of the filter 90 of FIG. 3; consequently, elements in common are indicated by the same reference numbers and are not further described.

[0125] The filter 170 here again comprises a first and a second resistive element, here indicated by 171 and 172, and the capacitive element 104.

[0126] The first resistive element 171 is a parallel circuit having a first branch formed by a series circuit comprising a resistor 173 of resistance R.sub.F1 and a switch, here an NMOS transistor 174; and a second branch formed by a series circuit comprising a resistor 175 of resistance R.sub.F2, and a switch, here an NMOS transistor 176.

[0127] The switch 174 is controlled by the switch control signal L1. The switch 176 is controlled by the switch control signal L2.

[0128] The second resistive element 172 is a parallel circuit having a first branch formed by a series circuit comprising a resistor 177 of resistance R.sub.F1 and a switch, here an NMOS transistor 178; and a second branch formed by a series circuit comprising a resistor 179 of resistance R.sub.F2, and a switch, here an NMOS transistor 180.

[0129] The switch 178 is controlled by the switch control signal L1. The switch 180 is controlled by the switch control signal L2.

[0130] In this embodiment, the resistance R.sub.F2is greater than the resistance R.sub.F1.

[0131] Consequently, in the buck mode, when the switches 174 and 178 are closed and the switches 176, 180 are open, the time constant of the filter 170 is given by C.sub.F.Math.(R.sub.F1+R.sub.ds,ON).

[0132] In the boost mode, when the switches 174 and 178 are open and the switches 176, 180 are closed, the time constant of the filter 170 is given by C.sub.F.Math.(R.sub.F2+R.sub.ds,ON).

[0133] Since the resistance R.sub.F2is greater than resistance R.sub.F1, the filter 170 may have a greater time constant in the boost mode than in the buck mode.

[0134] FIG. 6 shows a further embodiment of the filter, here indicated by 190, coupled to the shunt resistor 80 and providing the filtered voltage V.sub.F.

[0135] In the filter 190, the first and the second resistive elements are each formed by a respective resistor 191, 192 having a fixed value of resistance R.sub.F.

[0136] The capacitive element, here indicated by 195, is a series circuit coupled between the first and the second output nodes 100, 101 of the filter 190 and comprising the capacitor 104 and a parallel circuit formed by a switch 196, here an NMOS transistor, and a capacitor 197, here having capacitance C.sub.F.

[0137] The switch 196 is controlled by the switch control signal L2 that controls the second low-side switch 83.

[0138] In the buck mode, the switch control signal L2 keeps the second low-side switch 83 open. Consequently, the capacitance of the capacitive element 195 is given by the series of capacitors 104, 197.

[0139] In the boost mode, particularly in the ON-phase wherein the inductor current flows in the shunt resistor 80, the switch control signal L2 keeps the second low-side switch 83 closed (current I.sub.L3 in FIG. 3). Consequently, the switch 196 is also closed. The capacitance of the capacitive element 195 is therefore given by the capacitor 104.

[0140] In practice, even in this embodiment, the time constant of the filter 190 may be greater in the boost mode than in the buck mode.

[0141] Finally, it is clear that modifications and variations may be made to the regulator 50 described and illustrated herein without thereby departing from the scope of the present invention, as defined in the attached claims.

[0142] The filter coupled to the shunt resistor 80 may have a circuit diagram different from what has been described with reference to FIGS. 3-6.

[0143] For example, the filter may be a common mode filter.

[0144] For example, with reference to FIG. 6, the capacitive element may be a parallel circuit comprising a first branch having a fixed capacitor and a second branch having a series circuit comprising a switch and a fixed capacitor. In this case, the switch may be controlled by the switch control signal L1.

[0145] The filter may be of a different type, for example a band-pass filter wherein the time constants which determine the pass-band of the same filter are variable as a function of the actual operating mode of the regulator 50.

[0146] For example, as shown in FIG. 7, the filter, here indicated by 200, may receive all the switch control signals H1, L1, H2, L2 and have a circuit diagram such as to make the time constant variable as a function of all the signals H1, L1, H2, L2, in particular such that the time constant of the filter 200 is greater in the boost mode than in the buck mode.

[0147] For example, as shown in FIG. 8, the filter, here indicated by 210, may be controlled by the mode signal MOD generated by the mode determination module 98 of FIG. 1. In detail, the time constant of the filter 200 is a function of the mode signal MOD, in particular such that the time constant of the filter 200 is greater in the boost mode than in the buck mode.

[0148] Alternatively, the filter may be controlled by another signal internal to the control device 55, for example generated by a specific circuit, indicative of the actual operating mode of the regulator 50.

[0149] For example, the shunt resistor 80 may be a resistive element different from a discrete resistor, for example it may be obtained starting from an integrated resistance.

[0150] For example, the shunt resistor 80 may be arranged in a different position in the switching circuit 53 with respect to what has been shown in FIG. 3, either in the high side or in the low side of the switching circuit 53, such as in series with the inductor 87 between the intermediate nodes 74, 85 or between the second high-side switch 82 and the output node 54. In this manner, the control device 55 may be configured to perform a current-control that is different from the valley-type one in buck mode and the peak-type one in boost mode. For example, if the shunt resistor 80 is arranged in the high side of the switching circuit 53, for example between the second high-side switch 82 and the output node 54, the control device 55 may perform a valley-type current-control in boost mode and a peak-type current-control in buck mode.

[0151] For example, the filters 90, 150, 170, 190, 200 and 210 may be formed by discrete circuit elements, for example mounted on a printed circuit board (PCB) on which the switching circuit 53 is formed, or by circuit elements integrated in the same die wherein the control device 55 is formed.

[0152] The filter 90, 150, 170, 190, 200, 210, the feedback circuit 92, the PWM modulator 94 and the control logic circuit 96 may be modules that are implemented as analog, digital or mixed-signal circuits, according to the specific application.

[0153] The embodiments described and illustrated above may be combined to form further solutions.