Double-sided integrated circuit module having an exposed semiconductor die
12021065 ยท 2024-06-25
Assignee
Inventors
- John Robert Siomkos (Greensboro, NC, US)
- Edward T. Spears (Stokesdale, NC, US)
- Mark Crandall (Oak Ridge, NC, US)
Cpc classification
H01L23/552
ELECTRICITY
H01L31/0203
ELECTRICITY
H01L21/311
ELECTRICITY
H01L24/97
ELECTRICITY
H01L21/31056
ELECTRICITY
H01L24/96
ELECTRICITY
International classification
H01L25/065
ELECTRICITY
H01L21/311
ELECTRICITY
H01L23/28
ELECTRICITY
H01L23/552
ELECTRICITY
H01L25/16
ELECTRICITY
Abstract
The present disclosure relates to a double-sided integrated circuit (IC) module, which includes an exposed semiconductor die on a bottom side. A double-sided IC module includes a module substrate with a top side and a bottom side. Electronic components are mounted to each of the top side and the bottom side. Generally, the electronic components are encapsulated by a mold compound. In an exemplary aspect, a portion of the mold compound on the bottom side of the module substrate is removed, exposing a semiconductor die surface of at least one of the electronic components.
Claims
1. A method for assembling a radio frequency (RF) module, comprising: coupling an electronic component configured for RF operation to a top side of a module substrate; encapsulating the electronic component in a first mold compound; coupling a semiconductor die to a bottom side of the module substrate; attaching a plurality of module contacts at the bottom side of the module substrate; encapsulating the semiconductor die and the plurality of module contacts in a second mold compound such that the second mold compound at least partially surrounds the semiconductor die; removing a portion of the second mold compound to expose a surface of the semiconductor die; and attaching a sensor substrate to the exposed surface of the semiconductor die after removing the portion of the second mold compound.
2. The method of claim 1, wherein removing the portion of the second mold compound exposes each of the plurality of module contacts which extend from the bottom side of the module substrate to below the surface of the semiconductor die.
3. The method of claim 1, wherein removing the portion of the second mold compound exposes a bottom surface of the semiconductor die facing opposite the module substrate.
4. The method of claim 1, wherein coupling the semiconductor die to the bottom side of the module substrate further comprises coupling a plurality of conductive elements between the semiconductor die and the bottom side of the module substrate.
5. The method of claim 4, wherein encapsulating the semiconductor die in the second mold compound comprises at least partially surrounding each of the plurality of conductive elements.
6. The method of claim 4, wherein encapsulating the semiconductor die in the second mold compound comprises fully surrounding each of the plurality of conductive elements.
7. The method of claim 1, further comprising at least partially surrounding the first mold compound with a shielding structure.
8. The method of claim 7, wherein the shield layer entirely covers a top surface of the RF module and almost entirely covers a side surface of the RF module.
9. The method of claim 1, wherein removing the portion of the second mold compound forms a planar bottom module surface defined by the second mold compound and the surface of the semiconductor die.
10. The method of claim 9, wherein the plurality of module contacts extends below the planar bottom module surface.
11. The method of claim 9, wherein a distance between the planar bottom module surface and the bottom side of the module substrate is between 80 ?m and 200 ?m.
12. The method of claim 1, further comprising coupling the plurality of module contacts to a secondary substrate, wherein the plurality of module contacts provide an electrical connection between the module substrate and the secondary substrate.
13. The method of claim 1, wherein each of the plurality of module contacts is a solder ball.
Description
BRIEF DESCRIPTION OF THE DRAWING FIGURES
(1) The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.
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DETAILED DESCRIPTION
(13) The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
(14) It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items.
(15) It will be understood that when an element such as a layer, region, or substrate is referred to as being on or extending onto another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being directly on or extending directly onto another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being over or extending over another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being directly over or extending directly over another element, there are no intervening elements present. It will also be understood that when an element is referred to as being connected or coupled to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being directly connected or directly coupled to another element, there are no intervening elements present.
(16) Relative terms such as below or above or upper or lower or horizontal or vertical may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.
(17) The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms a, an, and the are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms comprises, comprising, includes, and/or including when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
(18) Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
(19) The present disclosure relates to a double-sided integrated circuit (IC) module having an exposed semiconductor die. The double-sided IC module includes a module substrate with a top side and a bottom side. Electronic components are mounted to each of the top side and the bottom side. Generally, the electronic components are encapsulated by a mold compound. In an exemplary aspect, a portion of the mold compound on the bottom side is removed, exposing a semiconductor die surface of at least one of the electronic components.
(20) Exposing the semiconductor die reduces an overall thickness of the double-sided IC module. In addition, exposing the semiconductor die can provide additional advantages, such as by providing a surface to which a heat exchange device can be coupled (e.g., to transfer heat away from the semiconductor die). In other examples, electrical, magnetic, or other connections can be formed between the semiconductor die and other electronic components through the exposed surface.
(21) In this regard,
(22) In further detail, the first bottom electronic component 24, the second bottom electronic component 26, and the module contacts 34 are attached to a bottom side 36 of the module substrate 16. In different applications, the IC module 12 may include fewer or more bottom electronic components 24, 26. Each of the bottom electronic components 24, 26 may be a flip-chip die, a wire-bonding die, a surface mounted device (SMD), an inductor, or other active or passive component. In an exemplary aspect, at least one of the bottom electronic components 24, 26 includes a semiconductor die.
(23) The module contacts 34 are conductive and may be solder bumps or copper pillars forming an electrical connection with the circuit board 14 (e.g., connecting the top electronic components 18, 20, 22 and/or the bottom electronic components 24, 26 to other devices mounted on the circuit board 14). Each of the module contacts 34 can be used for grounded signals or non-grounded signals, and at least some of the module contacts 34 may be electrically isolated from other module contacts 34. The first mold compound 28 resides over the bottom side 36 of the module substrate 16 and encapsulates the first bottom electronic component 24 and the second bottom electronic component 26. Each module contact 34 is taller than the bottom electronic components 24, 26 and exposed through the first mold compound 28. The first mold compound 28 may be an organic epoxy resin or similar material. In an exemplary aspect, the first mold compound 28 is a 20 micron (?m) top cut material.
(24) The first top electronic component 18 and the second top electronic component 20 are attached to a top side 38 of the module substrate 16. In different applications, the IC module 12 may include fewer or more top electronic components 18, 20. Each of the first top electronic component 18 and the second top electronic component 20 may be a flip-chip die, a wire-bonding die, a SMD, an inductor, or other active or passive component. The second mold compound 30 resides over the top side 38 of the module substrate 16 and encapsulates the first top electronic component 18 and the second top electronic component 20. The second mold compound 30 may be formed from a same or different material as the first mold compound 28.
(25) As shown in
(26) The shielding structure 32 can include a single layer of material, or it can include multiple layers of the same or different materials. For example, an interior layer (e.g., covering the top surface 40 and the side surface 42 of the IC module 12) may be formed of copper, aluminum, silver, gold, or other conductive materials with a thickness between 3 ?m and 16 ?m. An exterior layer may reside over the interior layer, and may be formed of nickel with a thickness between 1 ?m and 3 ?m.
(27) Further, the module substrate 16 may be a laminate having a number of layers 44. These layers 44 of the module substrate 16 may include prepreg material. The module substrate 16 can also include conductive elements 46 and via structures 48, which may be formed of an appropriate conductive material. Generally, the conductive elements 46 and the via structures 48 form electrical connections between one or more of the electronic components 18, 20, 22, 24, 26 and the circuit board 14.
(28) In an exemplary aspect, shown in
(29) In detail, the IC module 12 may be a radio frequency (RF) module, providing processing, signal conditioning, controls, and/or similar functions for RF signals of the electronic device 10. Accordingly, the top electronic components 18, 20, 22 and bottom electronic components 24, 26 of the RF module 12 may be configured for RF operation. Each of the electronic components 18, 20, 22, 24, 26 and the module contacts 34 are mounted to the module substrate 16 through an appropriate technique. For example, the first top electronic component 18 and the third top electronic component 22 are each a SMD which is mounted by solder, reflow, an adhesive, or similar technique. The second top electronic component 20, the first bottom electronic component 24, and the second bottom electronic component 26 are each a semiconductor die (e.g., a flip-chip die or a wire-bonding die) mounted to the module substrate 16 through a set of solder bumps 56 or similar conductive elements (e.g., through a reflow process). It should be understood that the mounting of the electronic components 18, 20, 22, 24, 26 is shown for illustrative purposes, and each component may be mounted differently in different applications.
(30) The first mold compound 28 is applied over the bottom side 36 of the module substrate 16 to encapsulate each bottom electronic component 24, 26 as depicted in
(31) Similarly, the second mold compound 30 is applied over the top side 38 of the module substrate 16 to encapsulate each top electronic component 18, 20, 22. The second mold compound 30 may be the same or a different material as the first mold compound 28, and may be applied through the same or a different technique. In some cases, both the first mold compound 28 and the second mold compound 30 are applied in a same process, and in other cases the first mold compound 28 and the second mold compound 30 are applied in separate processes.
(32) By removing a portion of the first mold compound 28 to expose at least one semiconductor die surface 50, 52, a height H of the module contacts 34 can be reduced. In addition, an overall thickness T of the IC module 12 is reduced. In an exemplary aspect, a thickness of each bottom electronic component 24, 26 is between 40 ?m and 150 ?m thick, and a thickness of the first mold compound 28 (e.g., a distance between the bottom surface 54 of the IC module 12 and the bottom side 36 of the module substrate 16) is between 80 ?m and 200 ?m. In addition, the height H of the module contacts 34 is between 100 and 300 ?m prior to attachment to the circuit board 14.
(33) The process of exposing the semiconductor die surface 50, 52 is further illustrated in
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(35) The first bottom electronic component 24, the second bottom electronic component 26, and the module contacts 34 are attached at the bottom side 36 of the module substrate 16 as depicted in
(36) After the first bottom electronic component 24, the second bottom electronic component 26, and the module contacts 34 are attached, the first mold compound 28 is applied to the IC module 12 as depicted in
(37) After the first mold compound 28 is applied and cured, a portion of the first mold compound 28 is removed to expose the at least one semiconductor die surface 50, 52 of the bottom electronic components 24, 26 as depicted in
(38) Exposure of the semiconductor die surface 50, 52 can provide additional advantages, such as by providing a surface for coupling a device to one or more of the bottom electronic components 24, 26 as depicted in
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(40) In other examples, one or more of the bottom electronic components 24, 26 may include a sensor (e.g., a temperature sensor, a pressure sensor, and so on) or other device, as depicted in
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(42) In other examples, a direct electrical connection may be formed between one or more of the bottom electronic components 24, 26 and the circuit board 14 through the exposed semiconductor die surface 50, 52 as illustrated in
(43) Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.
(44) For example,