HYBRID PLANAR COMBINER FOR PLANAR SOLID STATE POWER AMPLIFIERS

Abstract

A hybrid planar combiner for use in broadband high power multi-component power amplifier architectures in planar solid-state power amplifiers, which does not comprise impedance converters in the power amplifier layer, is suitable for hermetic construction, supports effective cooling infrastructure and enables easy in-circuit applications.

Claims

1. A hybrid planar combiner, comprising: at least one signal divider configured to send the signal to be amplified to more than one line; multiple power amplifiers configured to amplify signals from the signal divider; and a signal combiner configured to be connected at one end to the outputs of the power amplifiers and vertically separated from the planar solid-state power amplifier surface by combining the powers of the amplified signals.

2. The hybrid planar combiner according to claim 1, wherein the at least one signal divider is configured to divide the incoming signal into a desired number using a structure suitable for a signal amplification target and to transport the divided signal to the power amplifiers formed on a same integrated plane via the shortest connection.

3. The hybrid planar combiner according to claim 1, wherein the multiple power amplifiers are configured to connect all signal output terminals to one end of the signal combiner with the shortest connection, ensuring that the signal output terminals are located closest to each other when determining their placement in an integrated plane.

4. The hybrid planar combiner according to claim 1, wherein the signal combiner is configured to ensure that an impedance value is maintained at a desired level by transferring an impedance matching to a waveguide input to receive and transmit the amplified signal to ensure that the signals whose powers are combined with a connection scheme used are added to each other in the shortest possible way, and that an output impedance observed at the outputs of identical power amplifiers connected to each other is reduced to a value equal to the number of power amplifiers whose signals are combined at the end vertically separated from the substrate plane where an integrated circuit on which the power amplifiers are located is produced.

5. The hybrid planar combiner according to claim 2, wherein the signal combiner is configured to ensure that an impedance value is maintained at a desired level by transferring an impedance matching to a waveguide input to receive and transmit the amplified signal to ensure that the signals whose powers are combined with a connection scheme used are added to each other in the shortest possible way, and that an output impedance observed at the outputs of identical power amplifiers connected to each other is reduced to a value equal to the number of power amplifiers whose signals are combined at the end vertically separated from the substrate plane where an integrated circuit on which the power amplifiers are located is produced.

6. The hybrid planar combiner according to claim 3, wherein the signal combiner is configured to ensure that an impedance value is maintained at a desired level by transferring an impedance matching to a waveguide input to receive and transmit the amplified signal to ensure that the signals whose powers are combined with a connection scheme used are added to each other in the shortest possible way, and that an output impedance observed at the outputs of identical power amplifiers connected to each other is reduced to a value equal to the number of power amplifiers whose signals are combined at the end vertically separated from the substrate plane where an integrated circuit on which the power amplifiers are located is produced.

Description

DETAILED DESCRIPTION OF THE EMBODIMENTS

[0009] The hybrid planar combiner realized to achieve the purpose of the invention is shown in the accompanying figure;

[0010] Figure is a block diagram of the inventive hybrid planar combiner.

[0011] The parts in the figures are numbered individually and the equivalents of these numbers are given below. [0012] 1. Hybrid planar combiner [0013] 2. Signal divider [0014] 3. Power amplifier [0015] 4. Signal combiner [0016] S: Signal input

[0017] Planar solid-state power amplifiers (3) for use in broadband high-power multi-component power amplifier (3) architectures include a hybrid planar combiner (1) that does not comprise impedance converters in the power amplifier (3) layer, is hermetic, supports efficient cooling infrastructure and enables easy in-circuit applications, at least one signal divider (2) configured to send the signal to be amplified to multiple lines, and multiple power amplifiers (3) configured to amplify the signals from the signal divider (2).

[0018] The signal dividers (2) in the hybrid planar combiner (1) of the invention divide the incoming signal into the desired number by using in a structure suitable for the signal amplification target and carry the divided signal to the power amplifiers (3) formed on the same integrated plane with the shortest possible connection.

[0019] The power amplifiers (3) in the hybrid planar combiner (1) of the invention are configured to connect all signal output ends to one end of the signal combiner (4) with the shortest connection by ensuring that the signal output ends are placed closest to each other while determining their placement on the integrated plane. Thus, it is ensured that the amplified signals are transported to the point where they will be combined with minimum loss in the connection line.

[0020] The hybrid planar combiner (1) of the invention comprises a signal combiner (4), which is connected at one end to the outputs of the power amplifiers (3) and is configured to vertically separate from the substrate plane on which the integrated circuit on which the power amplifiers (3) are located is produced by combining the powers of the signals amplified by the power amplifiers (3). While determining the placements of the power amplifiers (3) on the substrate plane where the integrated circuit is manufactured, the signal output terminals are placed as closest possible to each other, and all signal output terminals are connected to one end of the signal combiner (4) with the shortest connection.

[0021] This connection scheme used ensures that the signals whose powers are combined are added to each other in the shortest way, but the output impedance Zo observed at the outputs of the identical power amplifiers (3) connected to each other is reduced to Zo/n, which is equal to the quotient of n, which is the number of power amplifiers (3) whose signals are combined at the end of the signal combiner (4) vertically separated from the substrate plane where the integrated circuit on which the power amplifiers (3) are located is produced. The impedance drop in the signal combiner (4) is corrected at the input of the waveguide (not shown in the figure), which will receive and transmit the amplified signal and is provided to maintain the impedance value at the desired level.

[0022] By means of the hybrid planar combiner (1) system of the invention, high loss combining circuit topologies which are placed at the outputs of power amplifiers (3) and perform the impedance matching task during the combining of the amplified signals, are avoided, the step of correcting the impedance variation against the minimum loss power combining benefit obtained by using the power amplifier (3) layout and the shortest connection to the signal combiner (4) is transferred to a single location within a environment in the form of dielectric or air-field coaxial connections, ribbon and micro-ribbon connections and waveguide (not shown in the figure) which are low-loss environments. This enables the using a more efficient cooling infrastructure than in power amplifier (3) applications using spatial combiner techniques, achieving a hermetic architecture, and facilitating hermetic circuit and printed circuit board applications and rework.