DEVICE AND METHOD FOR TRANSMITTING DATA

Abstract

A device for transmitting data includes a transmitter for generating a frequency-modulated output signal. The transmitter includes a phase-locked loop for adjusting an output frequency of the output signal to a carrier frequency, and a coupling circuit for coupling a data stream into the phase-locked loop. The output signal modulated in frequency by the coupled-in data stream has an output frequency variable over time, and the coupling circuit includes a compensation unit, which couples a compensation signal into the phase-locked loop. The compensation signal compensates at least approximately for an adjustment of the output frequency to the carrier frequency carried out by the phase-locked loop.

Claims

1-12. (canceled)

13. A device for transmitting data, comprising: a transmitter adapted to generate a frequency-modulated output signal, the transmitter including a phase-locked loop adapted to adjust an output frequency of the output signal to a carrier frequency, and a coupling circuit adapted to couple a data stream into the phase-locked loop; wherein the output signal has an output frequency that is variable over time; and wherein the coupling circuit includes a compensation unit adapted to couple a compensation signal into the phase-locked loop to compensate at least approximately for an adjustment of the output frequency to the carrier frequency.

14. The device according to claim 13, wherein the coupling circuit includes a summing point adapted to add the data stream and the compensation signal to form a correction signal, and the coupling circuit is adapted to couple the correction signal into the phase-locked loop.

15. The device according to claim 13, wherein the phase-locked loop includes a voltage-controlled oscillator adapted to generate the output signal, a controller adapted to generate a setting signal, and a summing point adapted to sum the setting signal and a correction signal to form a control signal applied to an oscillator, the output frequency of the output signal being at least approximately proportional to a voltage of the control signal.

16. The device according to claim 13, wherein the phase-locked loop includes a radar transmitter adapted to perform a radar measurement.

17. The device according to claim 13, wherein the compensation unit includes a compensation input adapted to receive a setting signal and a compensation output adapted to generate the compensation signal.

18. The device according to claim 13, wherein the coupling circuit includes a switch adapted to switch the coupling circuit into a data transmission mode, in which the data stream and the compensation signal are coupled into the phase-locked loop, and into a radar mode, in which the data stream and the compensation signal are not coupled into the phase-locked loop.

19. A method for transmitting data using the device recited in claim 13, comprising: generating a frequency-modulated output signal by the transmitter; coupling the data stream into the phase-locked loop by the coupling circuit to modulate the output signal in frequency by the coupled-in data stream that has an output frequency variable over time; and coupling into the phase-locked loop, by the compensation unit, a compensation signal, by which an adjustment of the output frequency to the carrier frequency performed by the phase-locked loop is compensated for at least approximately.

20. The method according to claim 19, wherein the data stream and the compensation signal are added at a summing point of the coupling circuit to form a correction signal, and the correction signal is coupled into the phase-locked loop by the coupling circuit.

21. The method according to claim 19, wherein the output signal is generated by a voltage-controlled oscillator of the phase-locked loop, a setting signal is generated by a controller of the phase-locked loop, the setting signal and a correction signal are summed at a summing point of the phase-locked loop to form a control signal, the control signal is applied to the oscillator, and the output frequency of the output signal is at least approximately proportional to a voltage of the control signal.

22. The method according to claim 19, wherein the phase-locked loop includes a radar transmitter adapted to perform a radar measurement.

23. The method according to claim 19, wherein a setting signal is applied to a compensation input of the compensation unit, and the compensation signal is generated by a compensation output of the compensation unit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0026] FIG. 1 is a schematic view of a transmitter.

[0027] FIG. 2 illustrates a time characteristic of a data stream.

[0028] FIG. 3 illustrates a time characteristic of a compensation signal.

[0029] FIG. 4 illustrates a time characteristic of a correction signal.

[0030] FIG. 5 illustrates a time characteristic of a setting signal.

[0031] FIG. 6 illustrates a time characteristic of a control signal.

[0032] FIG. 7 illustrates a time characteristic of a control signal without compensation.

[0033] FIG. 8 illustrates a time characteristic of an output frequency of an output signal.

[0034] FIG. 9 illustrates a time characteristic of an output frequency of an output signal without compensation.

DETAILED DESCRIPTION

[0035] FIG. 1 schematically illustrates a transmitter 10 of a device for transmitting data. Transmitter 10 is used for generating a frequency-modulated output signal S5. Transmitter 10 includes a phase-locked loop 30 and a coupling circuit 20. Phase-locked loop 30, for example, is a radar transmitter and is used for carrying out a radar measurement.

[0036] Phase-locked loop 30 includes a voltage-controlled oscillator 32, by which the output signal S5 having a variable output frequency is generated. Phase-locked loop 30 further includes an amplifier 38, by which aforementioned output signal S5 is amplified to form an amplified output signal S7 having the same variable output frequency.

[0037] Phase-locked loop 30 includes a frequency divider 40, which is supplied the output signal S5 generated by voltage-controlled oscillator 32. Frequency divider 40 has a division ratio, which is, for example, integral. Frequency divider 40 generates an input signal S8, whose input frequency corresponds to the output frequency of output signal S5 divided by the division ratio.

[0038] Phase-locked loop 30 includes a detector 42, which is supplied a reference signal S10 having a reference frequency. Detector 42 is also supplied the input signal S8, which is generated by frequency divider 40 and has the input frequency. Detector 42 compares the reference frequency of reference signal S10 to the input frequency of input signal S8. Detector 42 outputs an error signal S9. Detector 42 includes, for example, a charge pump for outputting error signal S9. Error signal S9 is a function of the reference frequency of reference signal S10, as well as of a difference between reference signal S10 and input signal S8.

[0039] Phase-locked loop 30 includes a controller 34, which is supplied error signal S9. A setting signal S4 is generated by controller 34. Controller 34 exhibits PT1 behavior or PT2 behavior. Setting signal S4 is an analog signal, whose voltage is a measure of the output frequency of the output signal S5 generated by oscillator 32; the output frequency having to be adjusted.

[0040] Phase-locked loop 30 includes a summing point 36. Setting signal S4 and a correction signal S3 are summed at summing point 36 to form a control signal S6. Control signal S6 is applied to oscillator 32. In this context, the output frequency of the output signal S5 generated by oscillator 32 is proportional to a voltage of control signal S6.

[0041] Coupling circuit 20 includes a switch element 28. With the aid of switch element 28, coupling circuit 20 may be switched into a data transmission mode and into a radar mode. Switch element 28 generates, for example, a binary switching signal S11. The mode, into which coupling circuit 20 is switched, is encoded in switching signal S11.

[0042] Coupling circuit 20 includes a compensation unit 22, to which switching signal S11 is supplied. Compensation unit 22 includes a compensation input 25, which, for example, has an analog-to-digital converter. Compensation input 25 is supplied setting signal S4. Compensation unit 22 also includes a compensation output 26, which, for example, has a digital-to-analog converter. When coupling circuit 20 is switched to the data transmission mode, a compensation signal S2 is generated by compensation output 26.

[0043] Switch element 28 is supplied an input data stream S0. When coupling circuit 20 is switched to the data transmission mode, switch element 28 generates a data stream S1, which corresponds to input data stream S0. An adjustment of a voltage level or a modulation of input data stream S0 is optionally carried out by switch element 28. Data stream S1, for example, is a binary signal and has either the state “0” or the state “1.”

[0044] Coupling circuit 20 includes a summing point 24. At summing point 24, data stream S1 and compensation signal S2 are added to form correction signal S3. Correction signal S3 is coupled into phase-locked loop 30. For example, correction signal S3 is supplied to summing point 36.

[0045] FIG. 2 shows, for example, a time characteristic of a data stream S1, which is, for example, a binary signal. Time t is plotted on the abscissa, and voltage V of data stream S1 is plotted on the ordinate. Voltage V of data stream S1 initially has a voltage value, which corresponds to the state “0.” At a time t0, data stream S1 changes its state, and its voltage V now jumps to a voltage value, which corresponds to the state “1.” The voltage value assigned to the state “0” is, for example, greater than the voltage value assigned to the state “1.”

[0046] FIG. 3 illustrates an example of a time characteristic of a compensation signal S2. Time t is plotted on the abscissa, and voltage V of compensation signal S2 is plotted on the ordinate. The voltage value of compensation signal S2 is initially constant. As of time t0, the voltage value of compensation signal S2 increases continuously.

[0047] FIG. 4 illustrates an example of a time characteristic of a correction signal S3. Time t is plotted on the abscissa, and voltage V of correction signal S3 is plotted on the ordinate. The voltage value of correction signal S3 is initially constant. At time t0, voltage V of correction signal S3 jumps to a higher voltage value. As of time t0, the voltage value of correction signal S3 increases continuously. The voltage value of correction signal S3 corresponds to the sum of the voltage values of data stream S1 and of compensation signal S2.

[0048] FIG. 5 illustrates an example of a time characteristic of a setting signal S4. Time t is plotted on the abscissa, and voltage V of setting signal S4 is plotted on the ordinate. The voltage value of setting signal S4 is initially constant. From time t0 on, the voltage value of setting signal S4 decreases continuously. For example, as of time t0, compensation signal S2 is complementary to setting signal S4. Consequently, the fall of setting signal S4 is compensated for by the ascent of compensation signal S2.

[0049] FIG. 6 illustrates an example of a time characteristic of a control signal S6. Time t is plotted on the abscissa, and voltage V of control signal S6 is plotted on the ordinate. The voltage value of control signal S6 is initially constant. At time t0, voltage V of control signal S6 jumps to a higher voltage value. The voltage value of control signal S6 corresponds to the sum of the voltage values of correction signal S3 and setting signal S4.

[0050] For the sake of comparison, FIG. 7 illustrates a time characteristic of a control signal S6 without compensation, that is, without the generation of compensation signal S2. Time t is plotted on the abscissa, and voltage V of control signal S6 is plotted on the ordinate. The voltage value of control signal S6 is initially constant. At time t0, voltage V of control signal S6 jumps to a higher voltage value. From time t0 on, the voltage value of control signal S6 decreases continuously. In this case, the voltage value of control signal S6 corresponds to the sum of the voltage values of data stream S1 and setting signal S4.

[0051] FIG. 8 illustrates an example of a time characteristic of an output frequency of an output signal S5. Time t is plotted on the abscissa, and frequency f is plotted on the ordinate. The output frequency of output signal S5 initially has a first signal frequency. At time t0, the output frequency of output signal S5 jumps to a second signal frequency. For example, the second signal frequency is higher than the first signal frequency.

[0052] In this context, the output frequency of output signal S5 correlates with the voltage value of data stream S1. The output frequency of output signal S5 has the first signal frequency, when the voltage value of data stream S1 corresponds to the state “0.” The output frequency of output signal S5 has the second signal frequency, when the voltage value of data stream S1 corresponds to the state “1.”

[0053] For the sake of comparison, FIG. 9 illustrates a time characteristic of an output frequency of an output signal S5 without compensation, that is, without the generation of compensation signal S2. Time t is plotted on the abscissa, and frequency f is plotted on the ordinate. The output frequency of output signal S5 initially has the first signal frequency. At time t0, the output frequency of output signal S5 jumps to the second signal frequency. As of time t0, the output frequency of output signal S5 decreases continuously.

[0054] For example, the first signal frequency corresponds to a carrier frequency, and the second signal frequency is different from the carrier frequency. From time t0 on, phase-locked loop 30 adjusts the output frequency of output signal S5 to the carrier frequency. As of time t0, the characteristic of the output frequency of output signal S5 is subject to, for example, the action of controller 34. Controller 34, for example, exhibits PT1 behavior or PT2 behavior. Therefore, the output frequency of output signal S5 approaches the carrier frequency asymptotically.

LIST OF REFERENCE CHARACTERS

[0055] 10 transmitter [0056] 20 coupling circuit [0057] 22 compensation unit [0058] 24 summing point [0059] 25 compensation input [0060] 26 compensation output [0061] 28 switch element [0062] 30 phase-locked loop [0063] 32 oscillator [0064] 34 controller [0065] 36 summing point [0066] 38 amplifier [0067] 40 frequency divider [0068] 42 detector [0069] S0 input data stream [0070] S1 data stream [0071] S2 compensation signal [0072] S3 correction signal [0073] S4 setting signal [0074] S5 output signal [0075] S6 control signal [0076] S7 amplified output signal [0077] S8 input signal [0078] S9 error signal [0079] S10 reference signal [0080] S11 switching signal [0081] V voltage [0082] t time [0083] t0 time [0084] f frequency