TRANSMITTING/RECEIVING DEVICE FOR A BUS SYSTEM AND METHOD FOR REDUCING LINE EMISSIONS IN A BUS SYSTEM

Abstract

A transmitting/receiving device for a bus system and a method for reducing an oscillation tendency in the transition between different bit states. The transmitting/receiving device has a transmitting stage for transmitting a transmission signal to a first bus wire of a bus of the bus system and for transmitting the transmission signal as an inverse signal to a second bus wire of the bus, and an asymmetry reduction module for reducing an asymmetry of bus signals arising in the bus wires. The asymmetry reduction module includes a polarity reversing diode, whose cathode is connected to the cathode of a reverse polarity diode of the transmitting stage. The asymmetry reduction module switches a potential of the cathode of the polarity reversing diode to a potential that is greater than or equal to a level of a recessive bus state.

Claims

1-15. (canceled)

16. A transmitting/receiving device for a bus system, comprising: a transmitting stage configured to transmit a transmission signal to a first bus wire of a bus of the bus system and to transmit the transmission signal as an inverse signal to a second bus wire of the bus; and an asymmetry reduction module configured to reduce an asymmetry of bus signals arising in the first and second bus wires, the asymmetry reduction module including a polarity reversing diode having a cathode connected to a cathode of a reverse polarity diode of the transmitting stage, wherein the asymmetry reduction module is configured to switch a potential of the cathode of the polarity reversing diode to a potential that is greater than or equal to a level of a recessive bus state, and wherein the transmitting stage is configured to generate the recessive bus state and a dominant bus state for the transmission signal in such a way that the recessive bus state is overwritable by the dominant bus state.

17. The transmitting/receiving device as recited in claim 16, wherein the asymmetry reduction module includes has a resistor and a switch, which are connected in series to the polarity reversing diode.

18. The transmitting/receiving device as recited in claim 17, further comprising: an adjusting circuit configured to adjust a value of the resistor to reduce a duration of the asymmetry of bus signals arising in the bus wires.

19. The transmitting/receiving device as recited in claim 16, wherein the asymmetry reduction module including a reverse polarity current adjusting block and a switch, which are connected in series to the polarity reversing diode.

20. The transmitting/receiving device as recited in claim 19, wherein the reverse polarity current adjusting block is an adjustable resistor, whose resistance value is adjustable.

21. The transmitting/receiving device as recited in claim 19, wherein the reverse polarity current adjusting block includes at least one CMOS current mirror.

22. The transmitting/receiving device as recited in claim 16, further comprising: a logic circuit configured to switch off the asymmetry reduction module after expiration of a predetermined time duration after the asymmetry reduction module was switched on.

23. The transmitting/receiving device as recited in claim 16, further comprising: an adjusting circuit configured to adjust a point in time and a time duration of a switching on of the asymmetry reduction module.

24. The transmitting/receiving device as recited in claim 16, wherein the adjusting circuit is configured to monitor a curve of a cathode voltage of the polarity reversing diode for regulating the asymmetry.

25. The transmitting/receiving device as recited in claim 23, wherein the adjusting circuit is configured to change a value of a voltage, which is fed into the asymmetry reduction module at a connection, to switch the cathode voltage of the polarity reversing diode to a potential that is greater than or equal to a level of the recessive bus state.

26. The transmitting/receiving device as recited in claim 16, wherein, for regulating the asymmetry, the adjusting circuit is configured to monitor a curve of the bus signals at their connection for the bus wires at the transmitting stage.

27. The transmitting/receiving device as recited in claim 16, wherein the transmitting/receiving device is configured to transmit and receive messages according to the CAN FD protocol.

28. The transmitting/receiving device as recited in claim 16, wherein the asymmetry reduction module is configured in such a way that the asymmetry reduction module is activated only when the transmitting stage transmits a message onto the bus.

29. The bus system, comprising: a bus; and at least two subscriber stations which are connected to one another via the bus in such a way that they are able to communicate with one another; wherein at least one of the at least two subscriber stations includes a transmitting/receiving device including: a transmitting stage configured to transmit a transmission signal to a first bus wire of a bus of the bus system and to transmit the transmission signal as an inverse signal to a second bus wire of the bus, and an asymmetry reduction module configured to reduce an asymmetry of bus signals arising in the first and second bus wires, the asymmetry reduction module including a polarity reversing diode having a cathode connected to a cathode of a reverse polarity diode of the transmitting stage, wherein the asymmetry reduction module is configured to switch a potential of the cathode of the polarity reversing diode to a potential that is greater than or equal to a level of a recessive bus state, and wherein the transmitting stage is configured to generate the recessive bus state and a dominant bus state for the transmission signal in such a way that the recessive bus state is overwritable by the dominant bus state.

30. A method for reducing line emissions in a bus system, the method being carried out using a transmitting/receiving device for a bus system, which has a transmitting stage and an asymmetry reduction module, the method comprising the following steps: transmitting, using the transmitting stage, a transmission signal to a first bus wire of a bus of the bus system; transmitting, using the transmitting stage, the transmission signal as an inverse signal to a second bus wire of the bus; and reducing, using the asymmetry reduction module, an asymmetry of bus signals arising in the bus wires, wherein the asymmetry reduction module includes a polarity reversing diode whose cathode is connected to a cathode of a reverse polarity diode of the transmitting stage, the asymmetry reduction module switching a potential of the cathode of the polarity reversing diode to a potential that is greater than or equal to a level of a recessive bus state, and wherein the transmitting stage generates the recessive bus state and a dominant bus state for the transmission signal in such a way that the recessive bus state is overwritable by the dominant bus state.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The present invention is described below in greater detail with reference to the figures and on the basis of exemplary embodiments.

[0032] FIG. 1 shows a simplified block diagram of a bus system according to a first exemplary embodiment of the present invention.

[0033] FIG. 2 shows an electrical circuit diagram of a transmitting/receiving device of the bus system according to the first exemplary embodiment of the present invention.

[0034] FIG. 3 shows a time characteristic of a voltage U of the bus signals CAN_H and CAN_L in the transmitting/receiving device of FIG. 2, when the asymmetry reduction module is not switched on.

[0035] FIG. 4 shows a time characteristic of the voltage U of the bus signals CAN_H and CAN_L in the transmitting/receiving device of FIG. 2, when the asymmetry reduction module is switched on.

[0036] FIG. 5 shows an electrical circuit diagram of a transmitting/receiving device of a bus system according to a second exemplary embodiment of the present invention.

[0037] Unless indicated otherwise, identical or functionally equivalent elements are provided with the same reference characters in the figures.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0038] FIG. 1 shows a bus system 1, which may be for example, at least in sections, a CAN bus system, a CAN FD bus system, etc. Bus system 1 may be used in a vehicle, in particular a motor vehicle, in an aircraft etc., or in a hospital etc.

[0039] In FIG. 1, bus system 1 has a plurality of subscriber stations 10, 20, 30, which are respectively connected to a bus 40 having a first bus wire 41 and a second bus wire 42. Bus wires 41, 42 may also be called CAN_H and CAN_L and are used for electrical signal transmission after coupling in the dominant levels or generating recessive levels for a signal in the transmitting state. Messages 45, 46, 47 are transmittable via bus 40 in the form of signals between the individual subscriber stations 10, 20, 30. Subscriber stations 10, 20, 30 are for example control units or display devices of a motor vehicle.

[0040] As shown in FIG. 1, the subscriber stations 10, 30 each have a communication control device 11 and a transmitting/receiving device 12. The transmitting/receiving devices 12 each comprise an asymmetry reduction module 15. Subscriber station 20, on the other hand, has a communication control device 11 and a transmitting/receiving device 13. The transmitting/receiving devices 12 of subscriber stations 10, 30 and the transmitting/receiving device 13 of the subscriber station 20 are each connected directly to bus 40, even if this is not illustrated in FIG. 1.

[0041] Communication control device 11 is used for controlling a communication of the respective subscriber station 10, 20, 30 via bus 40 with another subscriber station of the subscriber stations 10, 20, 30 that are connected to bus 40. Transmitting/receiving device 12 is used to transmit messages 45, 47 in the form of signals and for this purpose uses the asymmetry reduction module 15, as will be described in more detail later. The communication control device 11 may be designed in particular like a conventional CAN FD controller and/or CAN controller. The transmitting/receiving device 13 may be designed in particular like a conventional CAN transceiver and/or CAN FD transceiver. The transmitting/receiving device 13 may be designed in particular like a conventional CAN transceiver.

[0042] FIG. 2 shows the basic structure of subscriber station 10, in particular its transmitting/receiving device 12 together with the asymmetry reduction module 15. Subscriber station 30 is constructed in the same manner as subscriber station 10.

[0043] The transmitting/receiving device 12 has a transmitting driver 121 and a transmitting stage 122 as well as the asymmetry reduction module 15. In addition, transmitting/receiving device 12 has a receiving stage 123, which however is not shown in more detail in FIG. 2 for the sake of simplifying the drawing.

[0044] Transmitting/receiving device 12 is connected to bus 40, more precisely to its first bus wire 41 for CAN_H and its second bus wire 42 for CAN_L. The voltage supply, in particular CAN supply, for the first and second bus wires 41, 42 occurs via a connection 43. The connection to ground or CAN_GND is implemented via a connection 44. Optionally, a common mode choke 48 is connected between the first and the second bus wires 41, 42. The common mode choke 48 protects the transmitting/receiving device 12 against overvoltages, in particular undesired electrostatic discharges (ESD). The first and the second bus wires 41 and 42 are terminated by a terminal resistor 49.

[0045] The first and second bus wires 41, 42 are connected in the transmitting/receiving device 12 to the transmitting stage 122, which is also referred to as a transmitter. Furthermore, the first and second bus wires 41, 42 are connected in the transmitting/receiving device 12 to the receiving stage 123, which is also referred to as a receiver. For this purpose, the receiving stage 123 has, as is conventionally customary, a receiving comparator, which is connected to bus 40, although this is not shown in more detail in FIG. 2 for the sake of simplification.

[0046] The precise interface connection for driving a digital transmission signal TxD from the communication control device 11 occurs via a connection 111 as is conventionally customary. Moreover, the interface connection for driving a reception signal RxD from the transmitting/receiving device 12 to the communication control device 11 occurs via a connection 112 as is conventionally customary. This interface connection is thus not shown in FIG. 2 for the sake of simplification. The digital reception signal RxD was generated using the receiving stage 123 from the signal received from the bus wires 41, 42.

[0047] According to FIG. 2, the transmitting stage 122 is connected to a conventional driver 121 for the signals for the first and the second bus wires 41, 42. In addition, the asymmetry reduction module 15 is connected to the transmitting stage 122. Transmitting stage 122 has conventional semiconductor elements, a reverse polarity diode 1221 for the first bus wire 41 or the signal CAN_H, a reverse polarity diode 1222 for the second bus wire 42 or the signal CAN_L. In addition, a parasitic substrate diode 1223 of the semiconductor substrate of the transmitting stage 122 forms in operation. The cathodes of the reverse polarity diode 1222 for the second bus wire 42 or the signal CAN_L and the cathode of the parasitic substrate diode 1223 are connected to one another. The anode of the reverse polarity diode 1222 is grounded or connected to ground.

[0048] The asymmetry reduction module 15 comprises a connection 150 for a voltage supply V having a voltage VReverse, a resistor 151, a switch 152, a logic circuit 153 and a diode 154, which may also be referred to as a polarity reversing diode.

[0049] The cathode of the polarity reversing diode 154 is connected to the cathode of the reverse polarity diode 1222, which is provided for the second bus wire 42 or the signal CAN_L, and is connected to the cathode of the parasitic substrate diode 1223. The anode of the polarity reversing diode 154 is connected to the output of the switch 152.

[0050] The switch 152 is used to switch on or switch off the asymmetry reduction module 15 using logic circuit 153. In the process, the resistor 151 adjusts the flow of current from connection 150 via switch 152 to the cathode of polarity reversing diode 154. In FIG. 2, switch 152 is embodied as a transistor. The transistor may be a metal isolator field-effect transistor, for example. In particular, the transistor is a metal oxide field-effect transistor (MOSFET) or is embodied as a field-effect transistor having an isolated gate, which is also referred to as an IGFET.

[0051] The asymmetry reduction module 15 thus comprises, in addition to logic circuit 153, a resistor 151, a switch 152 and a diode 154, which are connected in series in the aforementioned sequence, as shown in FIG. 3.

[0052] FIG. 3 shows a voltage curve for the signals CAN_H and CAN_L on bus wires 41, 42 of FIG. 2, when the asymmetry reduction module 15 is not switched on by logic circuit 153 and is thus not active. According to the stimulus at the TxD input 111, driver 1221 and transmitting stage 1222 drive the dominant bus state 402. In this state, in the circuit of FIG. 2, the current path from CAN SUPPLY at input 43 to the connection 44 for CAN_GND is closed via resistor 49, the bus load RL, so that the levels shown in FIG. 3 of the states 401, 402 set in in transmitting/receiving device 12 at bus outputs CAN_H and CAN_L for bus wires 41, 42. The signal CAN_L is generated as in inverse signal to CAN_H. The example of FIG. 3 illustrates a transition of signals CAN_H and CAN_L from a recessive bus state 401 to a dominant bus state 402 and back again to a recessive bus state 401. The switchover from the dominant bus state 402 to the recessive bus state 401 occurs after a bit time duration T_B. The dominant bus state 402 is generated in such a way that the dominant bus state 402 is able to overwrite the recessive bus state 401.

[0053] As clearly shown in FIG. 3, after the switchover from the dominant bus state 402 to the recessive bus state 401, an asymmetry RR of the signals CAN_H and CAN_L occurs. The asymmetry RR occurs due to the reverse recovery effect in the base of the parasitic PNP transistor of transmitting stage 122, which arises due to the parasitic diode 1223. The asymmetry RR is in other words a level offset of signals CAN_H and CAN_L following the change from the dominant bus state 402 to the recessive bus state 401.

[0054] The reason for the reverse recovery effect and thus the asymmetry RR is that in the change from the dominant bus state 402 to the recessive bus state 401 in transmitting stage 122 the current paths for the connections for the signals CAN_H and CAN_L are interrupted, so that the voltage curves of CAN_H and CAN_L adjust to the recessive bus state 401. During this transition, the cathode of reverse polarity diode 1222 in the CAN_L path becomes highly resistive in comparison to the connection 44 for CAN_GND. At the point in time, at which the cathode voltage of the reverse polarity diode 1222 has risen to such an extent that the forward voltage of the reverse polarity diode 1222 is undershot, charge carriers continue to remain in the shared n-doped cathode (base of the PNP transistor). These charge carriers can only be discharged as a recombination current. During this recombination time, a current flow remains from CAN_L to the semiconductor substrate, in particular silicon substrate, of transmitting stage 122. The current flow has the effect that the voltage at the connection for the signal CAN_L reaches the recessive bus state 401 clearly later and with a clearly different curve than the voltage at the connection for the signal CAN_H, as the asymmetry RR shows in FIG. 3.

[0055] In the bus wires 41, 42, this level offset of signals CAN_H and CAN_L during the transition from the dominant to the recessive bus state may be observed as a common mode signal and contributes substantially to the line emission. This effect is particularly considerable in the optional use of common mode chokes 48 on CAN bus 40. The level offset here acts as an excitation of the choke inductances and thereby effects common mode oscillations (ringing) on bus wires 41, 42, which results in highly increased emission levels.

[0056] The effect described here fundamentally occurs in all CAN FD systems, which are produced in smart power technologies with deep trench isolation (DTI) and for which the reverse polarity diodes 1221, 1222 of the transmitting stage 122 are produced from high-voltage components.

[0057] FIG. 4 shows a voltage curve for the signals CAN_H and CAN_L in bus wires 41, 42, when the asymmetry reduction module 15 is switched on by logic circuit 153 and switch 152 and is thus active. The example of FIG. 4 illustrates a transition of signals CAN_H and CAN_L from a recessive bus state 401 to a dominant bus state 402 and back again to a recessive bus state 401, as in FIG. 3. The logic circuit 153 switches switch 152 off again in particular after the expiration of a predetermined time duration T E or maximally after the time duration of a recessive bit. The time duration of a recessive bit may be equal to the time duration T_B, that is, equal to the time duration of a dominant bit.

[0058] The asymmetry reduction module 15 thus effects a minimization of the problematic reverse recovery effect by reversing the polarity of the reverse polarity diode 1222 in the CAN_L path. This is achieved in that using the asymmetry reduction module 15 the cathode of the reverse polarity diode 1222 is switched to a potential that is greater than or equal to the level of the recessive state 401 of signal CAN_L or the recessive level of signal CAN_L. In this manner, the recombination current is supplied substantially by the circuit of the asymmetry reduction module 15 and no longer via the bus wire 42 at the connection for the bus signal CAN_L. As a result, this polarity reversal shortens the duration of the reverse recovery effect in the CAN_L bus wire 42 and thus symmetrizes the voltage curve in comparison to the signal CAN_H in bus wire 41.

[0059] With the aid of resistor 151, the current is limited during the above-described polarity reversal. The diode 154 likewise acts as a reverse polarity diode for voltage levels on CAN_L that are greater than the level of the voltage VReverse. The maximum value (maximum rating) for this is 40V, as defined in the requirements for CAN.

[0060] In the operation of bus system 1, the logic circuit 153 of FIG. 2 detects when a switchover is to be made from a dominant bus state 402 to a recessive bus state 401. If the switchover from a dominant bus state 402 to a recessive bus state 401 is to be performed, then the logic circuit 153 switches the transistor 152, in order to perform the above-described switching of the cathode of the reverse polarity diode 1222 to the potential that is greater than or equal to the level of the recessive state 401 of the signal CAN_L. The logic circuit 153 switches transistor 152 off again after the predetermined time duration T E or maximally after the time duration of a recessive bit.

[0061] On account of the above-described structure, the asymmetry reduction module 15 has the advantage that the recessive level of the recessive state 401 of the signal CAN_L is at no point in time actively driven.

[0062] Using the transmitting/receiving device 12, a method for reducing line emissions in a bus system 1 is thus carried out. The oscillation or emission due to a transition between different bus states is clearly damped and thus reduced by the asymmetry reduction module 15.

[0063] According to a modification of the first exemplary embodiment, the subscriber station 20 also has a transmitting/receiving device 12 instead of a transmitting/receiving device 13. In this case, the above-described functionality of the transmitting/receiving device 12 is active for all subscriber stations 10, 20, 30 of the bus system, in particular as needed.

[0064] According to another modification of the first exemplary embodiment it is possible that the asymmetry reduction module 15 is designed in such a way that the asymmetry reduction module 15 is activated only when the transmitting stage 122 transmits a message 45 on bus 40.

[0065] FIG. 5 shows the basic structure of a transmitting/receiving device 12A, which in contrast to FIG. 2 has an asymmetry reduction module 15A according to a second exemplary embodiment. Except for the differences described below, bus system 1 and the transmitting/receiving device 12A are constructed in the same manner as described above according to the above-described exemplary embodiment or its modifications for bus system 1 and transmitting/receiving device 12.

[0066] Instead of a resistor 151, the asymmetry reduction module 15A has a reverse polarity current adjusting block 151A. In addition, optionally an adjusting circuit 155 is also present.

[0067] The reverse polarity current adjusting block 151A is able to adjust the duration of the reverse recovery effect, in order to improve possible asymmetries to signal CAN_H. In particular, the duration of the reverse recovery effect is to be reduced.

[0068] For this purpose, the reverse polarity current adjusting block 151A may be designed as a configurable or adjustable resistor. Alternatively, the reverse polarity current adjusting block 151A may be designed for limiting the reverse polarity current and for the adjustability with the aid of CMOS current mirrors (CMOS=complementary metal oxide semiconductor). The reverse polarity current adjusting block 151A has at least one CMOS current mirror.

[0069] The optional adjusting circuit 155 makes it possible for the respective adjustment variable of the reverse polarity current to be adaptively changeable during operation. For this purpose, adjusting circuit 155 regulates the curve of the cathode voltage of diode 154. Alternatively, adjusting circuit 155 directly regulates or tracks or monitors the curve of the bus signals CAN_H and CAN_L at their connection for the bus wires 41, 42.

[0070] The asymmetry reduction module 15A has the advantage that in the case of the signals of FIG. 4 a greater symmetry of the signals CAN_H, CAN_L is achievable than in the preceding exemplary embodiment.

[0071] According to a third exemplary embodiment, it is possible for at least one of the asymmetry reduction modules 15, 15A to be designed in such a way that a user is able to configure the switch-on time and the time duration T E of the reverse polarity, that is, the switching on of the asymmetry reduction modules 15, 15A. This may be accomplished by an input in a software during the initial operation or during maintenance of the transmitting/receiving device 12.

[0072] In addition, the optional adjusting circuit 155 may be developed in such a way that the respective adjustment variable of switch-on time and time duration T E of the reverse polarity may be adaptively changeable during operation. For this purpose, adjusting circuit 155 regulates the curve of the cathode voltage of diode 154. Alternatively, adjusting circuit 155 directly regulates or tracks or monitors the curve of the bus signals CAN_H and CAN_L at their connection for the bus wires 41, 42.

[0073] This makes it possible for the user to influence the curve of the voltage of the signal CAN_L and to achieve a better symmetry of the signal CAN_L to signal CAN_H.

[0074] According to a fourth exemplary embodiment, it is possible for at least one of the asymmetry reduction modules 15, 15A to be developed in such a way that a user is able to configure the value of the reverse polarity voltage VReverse at connection 150. This may be accomplished by an input in a software during the initial operation or during maintenance of the transmitting/receiving device 12.

[0075] The configurability takes into account that the mechanism of action of the asymmetry reduction modules 15, 15A may be implemented by reverse polarity voltages VReverse of different magnitudes, which are at least as great

[0076] as the recessive level on bus 40. The recessive level on bus 40 is typically at 2.5V, which corresponds to half the voltage for CAN SUPPLY at connection 43 of FIG. 2 and FIG. 5. A possible alternative is to choose the reverse polarity voltage VReverse=CAN SUPPLY, which is typically 5V.

[0077] In addition, the optional adjusting circuit 155 may be developed in such a way that the respective adjustment variable of the reverse polarity voltage VReverse at connection 150 may be adaptively changeable during operation. For this purpose, adjusting circuit 155 regulates the curve of the cathode voltage of diode 154. Alternatively, adjusting circuit 155 directly regulates or tracks the curve of the bus signals CAN_H and CAN_L at their connection for the bus wires 41, 42.

[0078] With the aid of the magnitude of the reverse polarity voltage, it is possible to influence the dynamics of the voltage curve at the cathode of the diode 154. This makes it possible to adjust the curve of signal CAN_L in comparison to the curve of signal CAN_H. As a result, it is possible for the user to influence the curve of the voltage of the signal CAN_L and to achieve a better symmetry of the signal CAN_L to signal CAN_H.

[0079] All of the above-described embodiments of asymmetry reduction modules 15, 15A, of transmitting/receiving devices 12, 12A, of subscriber stations 10, 20, 30, of bus system 1 and of the method carried out therein according to the exemplary embodiments and their modifications may be used individually or in all possible combinations. In addition, the following modifications are particularly possible.

[0080] The above-described bus system 1 according to the exemplary embodiments and/or their modifications are described on the basis of a bus system based on the CAN protocol. The bus system 1 according to the exemplary embodiments and/or their modifications, however, may also be another type of communication network. It is advantageous, but not an unavoidable presupposition, that in bus system 1, at least for certain time periods, exclusive, collision-free access by a subscriber station 10, 20, 30 to the bus line 40 is ensured.

[0081] Bus system 1 according to the exemplary embodiments and/or their modifications is in particular a CAN network or a CAN HS network or a CAN FD network or a FlexRay network. Bus system 1, however, is possibly another serial communication network.

[0082] In particular, the asymmetry reduction module 15, 15A may be used in LVDS (low voltage differential signaling), which is an interface standard for high-speed data transmission, in which a transmitter and a receiver are connected to one another via a data transmission link. LVDS is standardized according to ANSI/TIA/EIA-644-1995.

[0083] The number and the arrangement of the subscriber stations 10, 20, 30 in bus systems 1 according to the exemplary embodiments and/or their modifications is a matter of choice. In particular, it is possible that only subscriber stations 10 or subscriber stations 30 exist in the bus systems 1 of the exemplary embodiments and/or their modifications.

[0084] The functionality of the above-described exemplary embodiments and/or their modifications may be implemented respectively in a transceiver or a transmitting/receiving device 12, 12A or transceiver or a CAN transceiver or a transceiver chip set or a CAN transceiver chip set, etc. Additionally or alternatively, it may be integrated into existing products. In particular, it is possible that the respective functionality is implemented either in the transceiver as a separate electronic component (chip) or is embedded in an integrated overall solution, in which only one electronic component (chip) exists.