CIRCUIT BOARD, METHOD FOR MANUFACTURING CIRCUIT BOARD, AND ELECTRONIC DEVICE

Abstract

The present invention addresses the problem of providing a circuit board for which the manufacturing process is short and which has a laminate surface having uniform flatness. As a solution to the problem, this method for manufacturing a circuit board includes: manufacturing a three-layer metal (58) having, on one surface thereof, a first metal layer (26) formed in a pattern shape; manufacturing unit structures (60) each having the first metal layer (26), a cured first insulating base material (22) filled with a cured first conductive paste (32), a second metal layer (28), and a semi-cured second insulating base material (24) filled with a semi-cured second conductive paste (36); joining together the first insulating base material (22) in one unit structure (60) among a plurality of the unit structures with the second insulating base material (24) in another unit structure (60); and layering the plurality of unit structures (60).

Claims

1. A circuit board comprising: a plurality of first insulating base materials and a plurality of second insulating base materials that are alternately laminated; a first metal layer being formed into a pattern shape on a first surface of the first insulating base material; a second metal layer being formed into a pattern shape on a second surface of the first insulating base material; a first conductive paste being filled into a through hole of the first insulating base material so as to connect the first metal layer and the second metal layer; and a second conductive paste being filled into a through hole of the second insulating base material so as to connect the second metal layer of the first insulating base material that is laminated on a first surface side of the second insulating base material, and the first metal layer of the first insulating base material that is laminated on a second surface side of the second insulating base material, the first metal layer being embedded in the first surface of the first insulating base material, the first metal layer being formed into a trapezoidal shape in which diameter decreases from the side corresponding to the first surface of the first insulating base material toward the side corresponding to the second surface of the first insulating base material, the second metal layer being embedded in the first surface of the second insulating base material, the second metal layer being formed into a trapezoidal shape in which diameter decreases from the side corresponding to the first surface of the second insulating base material toward the side corresponding to the second surface of the second insulating base material, the first metal layers and the second metal layers being laminated in such a manner that the trapezoidal shapes are in a same orientation.

2. The circuit board according to claim 1, characterized in that an arithmetic average roughness (Ra) of surfaces of the first metal layers on which the first insulating base material and the second insulating base material are laminated is 1.0 ?m to 2.0 ?m, and an arithmetic average roughness (Ra) of surfaces of the second metal layers on which the second insulating base material is laminated is 1.0 ?m to 2.0 ?m.

3. A method for manufacturing a circuit board, comprising: a process of manufacturing a first metal layer being formed into a pattern shape by disposing, on a surface of a first metal foil that is opposite to a surface on which a first insulating base material is to be laminated, a third metal layer containing a metal that is different from the first metal foil and a fourth metal layer in succession and etching the first metal foil from a direction in which the first insulating base material is laminated; a process of removing a portion of the third metal layer by etching from the direction in which the first insulating base material is laminated; a process of manufacturing a cured first insulating base material in which the first metal layer being formed into a pattern shape is disposed at a first surface, a second metal layer being formed into a pattern shape is disposed at a second surface, and a first through hole that is formed between the first metal layer and the second metal layer is filled with a first conductive paste that connects the first metal layer and the second metal layer; a process of removing the entire fourth metal layer by etching; a process of removing the entire third metal layer by etching; a process of manufacturing a unit component including the first insulating base material and a semi-cured second insulating base material that is disposed on a side of the first insulating base material corresponding to the second surface and in which a second through hole communicating with the second metal layer is filled with a second conductive paste connected to the second metal layer; and a process of laminating a plurality of the unit components by joining to one another the first insulating base material of one of the plurality of the unit components and the second insulating base material of another unit component of the plurality of the unit components.

4. The method for manufacturing the circuit board according to claim 3 further comprising: a process of performing surface roughening on a surface of the first metal layer on which the first insulating base material is to be laminated and a surface of the fourth metal layer on which the first insulating base material is to be laminated such that an arithmetic average roughness (Ra) of the surface of the first metal layer and the surface of the fourth metal layer is 1.0 ?m to 2.0 ?m; and a process of performing surface roughening on a surface of the first metal layer on which the second insulating base material is to be laminated and a surface of the second metal layer on which the second insulating base material is to be laminated such that an arithmetic average roughness (Ra) of the surface of the first metal layer and the surface of the second metal layer is 1.0 ?m to 2.0 ?m.

5. The method for manufacturing the circuit board according to claim 3, characterized in that the first metal layer is formed into a trapezoidal shape in which a diameter decreases from a side corresponding to the first surface of the first insulating base material toward a side corresponding to the second surface, and the second metal layer is formed into a trapezoidal shape in which a diameter decreases from a side corresponding to the first surface of the second insulating base material toward a side corresponding to the second surface.

6. The method for manufacturing the circuit board according to claim 3, characterized in that the first metal layer of the unit component is embedded in the first insulating base material, and the second metal layer of the unit component is embedded in the second insulating base material in the process of manufacturing the unit component.

7. An electronic device comprising the circuit board according to claim 1 and an electronic component.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0023] FIG. 1 is a schematic cross-sectional view showing an example of a circuit board.

[0024] FIG. 2 is a schematic cross-sectional view (No. 1) showing an example of a method for manufacturing a circuit board.

[0025] FIG. 3 is a schematic cross-sectional view (No. 2) showing an example of the method for manufacturing a circuit board.

[0026] FIG. 4 is a schematic cross-sectional view (No. 3) showing an example of the method for manufacturing a circuit board.

[0027] FIG. 5 is a schematic cross-sectional view (No. 4) showing an example of the method for manufacturing a circuit board.

[0028] FIG. 6 is a schematic cross-sectional view (No. 5) showing an example of the method for manufacturing a circuit board.

[0029] FIG. 7 is a schematic cross-sectional view (No. 6) showing an example of the method for manufacturing a circuit board.

[0030] FIG. 8 is a schematic cross-sectional view (No. 7) showing an example of the method for manufacturing a circuit board.

[0031] FIG. 9 is a schematic cross-sectional view (No. 8) showing an example of the method for manufacturing a circuit board.

[0032] FIG. 10 is a schematic cross-sectional view (No. 9) showing an example of the method for manufacturing a circuit board.

[0033] FIG. 11 is a schematic cross-sectional view (No. 10) showing an example of the method for manufacturing a circuit board.

[0034] FIG. 12 is a schematic cross-sectional view (No. 11) showing an example of the method for manufacturing a circuit board.

[0035] FIG. 13 is a schematic cross-sectional view (No. 12) showing an example of the method for manufacturing a circuit board.

[0036] FIG. 14 is a schematic cross-sectional view (No. 13) showing an example of the method for manufacturing a circuit board.

[0037] FIG. 15 is a schematic cross-sectional view (No. 14) showing an example of the method for manufacturing a circuit board.

[0038] FIG. 16 is a schematic cross-sectional view (No. 15) showing an example of the method for manufacturing a circuit board.

[0039] FIG. 17 is a schematic cross-sectional view (No. 16) showing an example of the method for manufacturing a circuit board.

[0040] FIG. 18 is a schematic cross-sectional view (No. 17) showing an example of the method for manufacturing a circuit board.

[0041] FIG. 19 is a schematic cross-sectional view (No. 18) showing an example of the method for manufacturing a circuit board.

[0042] FIG. 20 is a schematic cross-sectional view (No. 19) showing an example of the method for manufacturing a circuit board.

[0043] FIG. 21 is a schematic cross-sectional view (No. 20) showing an example of the method for manufacturing a circuit board.

[0044] FIG. 22 is a schematic cross-sectional view (No. 21) showing an example of the method for manufacturing a circuit board.

[0045] FIG. 23 is a schematic cross-sectional view (No. 22) showing an example of the method for manufacturing a circuit board.

[0046] FIG. 24 is a schematic cross-sectional view (No. 23) showing an example of the method for manufacturing a circuit board.

[0047] FIG. 25 is a schematic cross-sectional view (No. 24) showing an example of the method for manufacturing a circuit board.

DESCRIPTION OF EMBODIMENTS

(Circuit Board)

[0048] FIG. 1 shows a schematic cross-sectional view of a circuit board 20. The circuit board 20 of the present embodiment is configured by alternately laminating first insulating base materials 22 and second insulating base materials 24 without an adhesive layer. A first metal layer 26 is formed into a pattern shape on a first surface 22a of a first insulating base material 22, and the first metal layer 26 is embedded in the first insulating base material 22. A fifth metal layer 66 is formed into a pattern shape on the first surface 22a of the first insulating base material 22 of the lowest layer, and the fifth metal layer 66 is exposed from the first insulating base material 22. A second metal layer 28 is formed into a pattern shape on a second surface 22b opposite to the first surface 22a. The second metal layer 28 is exposed from the first insulating base material 22 and is embedded in the second insulating base material 24.

[0049] Each first insulating base material 22 includes a through hole 30, which opens at the side corresponding to the first metal layer 26 or the side corresponding to the fifth metal layer 66 and at the side corresponding to the second metal layer 28 to provide communication between the first metal layer 26 or the fifth metal layer 66 and the second metal layer 28. The through hole 30 is filled with a first conductive paste 32, which electrically connects the first metal layer 26 or the fifth metal layer 66 and the second metal layer 28. In this embodiment, the through hole 30 is formed such that the diameter gradually increases from the first surface 22a toward the second surface 22b, and the first conductive paste 32 has a cone shape.

[0050] The second insulating base material 24 is disposed on the side of each first insulating base material 22 corresponding to the second surface 22b. At a first surface 24a of the second insulating base material 24 (that is, at the side of the second insulating base material 24 corresponding to the facing surface facing the first insulating base material 22), the second metal layer 28 that is formed on the second surface 22b of the first insulating base material 22 is embedded in the second insulating base material 24.

[0051] At the side of the second insulating base material 24 corresponding to the second surface 24b, that is, at the upper side in FIG. 1, the first metal layer 26 that is formed at the first surface 22a of the first insulating base material 22 located above the second insulating base material 24 is embedded in the first insulating base material 22.

[0052] Each second insulating base material 24 includes a through hole 34, which opens at the side corresponding to the second metal layer 28 and the side corresponding to the first metal layer 26 to provide communication between the embedded second metal layer 28 and the first metal layer 26 that is embedded in the first insulating base material 22 located above the second insulating base material 24. The through hole 34 is filled with a second conductive paste 36, which electrically connects the second metal layer 28 and the first metal layer 26. In this embodiment, the through hole 34 is formed such that the diameter gradually increases from the first surface 24a toward the second surface 24b of the second insulating base material 24, and the second conductive paste 36 has a cone shape.

[0053] Each first metal layer 26 has a trapezoidal shape in which the diameter is large at the side corresponding to the first surface 22a of the first insulating base material 22 and small at the side corresponding to the second surface 22b of the first insulating base material 22. Each second metal layer 28 has a trapezoidal shape in which the diameter is large at the side corresponding to the first surface 24a of the second insulating base material 24 and small at the side corresponding to the second surface 24b of the second insulating base material 24. In contrast, the fifth metal layer 66 has a trapezoidal shape in which the diameter is large at the side corresponding to the first surface 22a of the first insulating base material 22 and is exposed downward. The first metal layers 26 and the second metal layers 28 uniformly have a trapezoidal shape of the same orientation. The fifth metal layer 66 has a trapezoidal shape of an orientation that is reversed from the orientation of the first metal layers 26 and the second metal layers 28.

[0054] The metal layers 26 and 28 on both sides of the first insulating base materials 22 have a trapezoidal shape in which the diameter decreases upward. This is because the metal layers 26 and 28 are etched from above in the laminating direction in the manufacturing process. The fifth metal layer 66 has a trapezoidal shape in which the diameter decreases downward. This is because the fifth metal layer 66 is etched from below in the laminating direction in the manufacturing process.

[0055] In the circuit board 20 of the present embodiment, the first insulating base materials 22 and the second insulating base materials 24 are alternately laminated, the first metal layers 26 that are provided at the boundaries between the first insulating base materials 22 and the second insulating base materials 24 are embedded in the first insulating base materials 22, the second metal layers 28 are embedded in the second insulating base materials 24, and the fifth metal layer 66 is exposed from the first insulating base material 22.

[0056] Preferably, an arithmetic average roughness (Ra) of the surfaces of the first metal layers 26 (the sides corresponding to the first conductive paste 32 and the second conductive paste 36), a surface of the fifth metal layer 66 (the side corresponding to the first conductive paste 32), and surfaces of the second metal layers 28 (the sides corresponding to the second conductive paste 36) is 1.0 ?m to 2.0 ?m. This has the advantageous effects of preventing abnormality in the resistance value and delamination when the conductive paste 32 and 36 in a semi-cured state (not cured) is laminated.

(Method for Manufacturing Circuit Board)

[0057] Referring to FIGS. 2 to 25, a method for manufacturing a circuit board is now described. First, as shown in FIG. 2, reference numeral 58 denotes a three-layer metal 58 including a third metal layer 56 and a fourth metal layer 57 arranged in succession on one surface of a first metal foil 40.

[0058] As the first metal foil 40 and the fourth metal layer 57 of the three-layer metal 58, general copper foils can be used, but they are not particularly limited to copper foils, and various metal foils can be selected as appropriate depending on the purpose. However, although the same kind of metal foil can be used for the first metal foil 40 and the fourth metal layer 57, the first metal foil 40 and the third metal layer 56 need to contain mutually different metals, and the fourth metal layer 57 and the third metal layer 56 need to contain mutually different metals because the first metal foil 40, the third metal layer 56, and the fourth metal layer 57 are independently etched as will be described below. In one example, when copper foil is used for the first metal foil 40 and the fourth metal layer 57, a nickel layer is used for the third metal layer 56.

[0059] Then, as shown in FIGS. 3 to 5, the first metal foil 40 is etched. The etching processing of this embodiment uses wet etching. Dry films 52 are affixed to the surfaces of the three-layer metal 58 (surfaces of the first metal foil 40 and the fourth metal layer 57), and the dry films 52 are exposed and developed through a photomask 53 to obtain the first metal layer 26 formed as a predetermined pattern. In this embodiment, the dry film 52 on the side of the three-layer metal 58 corresponding to the fourth metal layer 57 is not formed into a pattern shape. The etching processing that is applied to the three-layer metal 58 from above uses an etchant that acts only on the first metal foil 40. Additionally, the third metal layer 56 serves as barrier metal, so that the etching processing is not applied to the fourth metal layer 57. Thus, in this process, the fourth metal layer 57 is not etched.

[0060] In the etching processing, the first metal foil 40 is formed into a patterned first metal layer 26 in a trapezoidal shape. This is because the etching processing performs isotropic etching using chemicals. As shown in FIG. 5, the etching processing forms the first metal layer 26 having a trapezoidal shape in which the diameter is large at the side corresponding to the third metal layer 56 (the side of the first insulating base material 22 corresponding to the first surface 22a described below).

[0061] Then, as shown in FIG. 6, the third metal layer 56 is etched. In this process, no dry film is attached to the surface of the three-layer metal 58, and an etchant that acts only on the third metal layer 56 (for example, the third metal layer 56 is a nickel layer) is used. This process leaves the third metal layer 56 only between the first metal layer 26 and the fourth metal layer 57 described above.

[0062] With the uppermost part of the three-layer metal 58 formed as the first metal layer 26, surface roughening is performed on the surface of the first metal layer 26 on the side corresponding to the first conductive paste 32 and the surface of the fourth metal layer 57 on the side corresponding to the first conductive paste 32. Preferably, the arithmetic average roughness (Ra) of the surface of the first metal layer 26 and the surface of the fourth metal layer 57 on the side corresponding to the first metal layer 26 that are subjected to the surface roughening is 1.0 ?m to 2.0 ?m. This has advantageous effects of preventing abnormality in the resistance value and delamination between the first metal layer 26 and the first conductive paste 32 when the through hole 30 is filled with the first conductive paste 32 as will be described below.

[0063] Then, as shown in FIG. 7, a semi-cured (not cured) first insulating base material 22 is laminated on the three-layer metal 58, and a masking resin film 42 is laminated on the upper surface of the first insulating base material 22.

[0064] The first insulating base material 22 preferably contains thermosetting resin or thermoplastic resin. For example, a prepreg (obtained by impregnating a nonwoven fabric base material or nonwoven base material, such as glass fiber, with epoxy resin or the like) may be used. However, the resin of the first insulating base material 22 may be any insulating base material used for circuit boards, such as a bismaleimide triazine resin, which is a thermosetting resin, or a modified polyphenylene ether resin, which is a thermoplastic resin, for example.

[0065] FIG. 8 shows a state in which a through hole 30, which extends through the first insulating base material 22 in the thickness direction, is formed. The through hole 30 extends through the first insulating base material 22 and the resin film 42. The first metal layer 26 closes the bottom of the through hole 30. As a method for forming the through hole 30, a forming method using a laser is available, but the method is not limited to the forming method using a laser. Examples of types of laser that may be used to form the through hole 30 with laser include CO2 laser and YAG laser, and the laser type can be selected as appropriate. Also, there is no limitation to the laser output, and the output may be selected as appropriate.

[0066] FIG. 9 shows a state in which the through hole 30 is filled with the first conductive paste 32. As the first conductive paste 32, paste containing a conductive filler and a binder resin may be used. Examples of conductive fillers include particles of metals such as copper, gold, silver, palladium, nickel, tin, and bismuth. These metal particle types may be used alone or in combination of two or more. As the binder resin, an epoxy resin, which is a type of thermosetting resin, may be used. However, the material is not limited to epoxy resin, and polyimide resin or the like may be used. Also, the binder resin may be a thermoplastic resin instead of a thermosetting resin.

[0067] Examples of a method of filling the through hole 30 with the first conductive paste 32 include a method of filling the through hole 30 with the first conductive paste 32 under atmospheric pressure or under vacuum using a jig such as a squeegee.

[0068] FIG. 10 shows a state in which the resin film 42 is peeled off. When the resin film 42 is peeled off, the first conductive paste 32 protrudes from the opening of the second surface 22b of the first insulating base material 22 by the thickness of the resin film 42.

[0069] FIG. 11 shows a state in which, after the resin film 42 is peeled off, the second metal foil 50 is placed on the upper surface (the surface opposite to the surface at which the first metal foil 40 is placed) of the first insulating base material 22. As the second metal foil 50, general copper foil can be used, but it is not particularly limited to copper foil, and various metal foils can be selected as appropriate depending on the purpose.

[0070] As shown in FIG. 12, the first metal layer 26, the third metal layer 56, the fourth metal layer 57 and the second metal foil 50 are joined to the first insulating base material 22. The joining may be performed by thermocompression bonding or compression bonding, which cures the first conductive paste 32 and the first insulating base material 22. The temperature and pressure for thermocompression bonding and the pressure for compression bonding may be appropriately selected according to the materials of the first conductive paste 32 and the first insulating base material 22.

[0071] As shown in FIG. 13, the second metal foil 50 on the upper surface of the first insulating base material 22 and the fourth metal layer 57 are then etched. The etching processing of this embodiment performs wet etching. The dry film 52 is affixed to the surface of the second metal foil 50, and the dry film 52 is exposed and developed through the photomask 53 to obtain the second metal layer 28 formed in a predetermined pattern, as shown in FIG. 14. The entire surface of the fourth metal layer 57 is etched by the etchant, so that the fourth metal layer 57 is removed. In the etching processing of this process, the third metal layer 56 serves as barrier metal, so that first metal layer 26 remains without being etched.

[0072] In the etching processing, the second metal foil 50 is formed into a patterned second metal layer 28 having a trapezoidal shape. This is because the etching processing performs isotropic etching using chemicals. As shown in FIG. 14, the etching processing forms the second metal layer 28 having a trapezoidal shape in which the diameter is large at the side corresponding to the second surface 22b of the first insulating base material 22.

[0073] Then, as shown in FIG. 15, the third metal layer 56 remaining from the previous process is etched. In this step, no dry film is affixed to the second metal layer 28, and an etchant that acts only on the third metal layer 56 (for example, the third metal layer 56 is a nickel layer) is used. This process removes the third metal layer 56, leaving only the patterned first metal layer 26 of the three-layer metal 58 formed in the first process.

[0074] With the first metal layer 26 and the second metal layer 28 formed at both sides of the first insulating base material 22 as shown in FIG. 16, surface roughening is performed on the surface of the first metal layer 26 on the side corresponding to the second conductive paste 36 and the surface of the second metal layer 28 on the side corresponding to the second conductive paste 36. Preferably, the arithmetic average roughness (Ra) of the surface of the first metal layer 26 and the surface of the second metal layer 28 side that are subjected to the surface roughening is 1.0 ?m to 2.0 ?m. This has advantageous effects of preventing abnormality in the resistance value and delamination between the first metal layers 26 and the second metal layers 28 and the second conductive paste 36 when the through holes 34 are filled with the second conductive paste 36 and when multiple unit components 60 are laminated, as will be described below.

[0075] FIG. 17 shows a state in which a semi-cured (not cured) second insulating base material 24 is laminated on the side of the first insulating base material 22 corresponding to the second surface 22b, and a resin film 54 is laminated on the surface of the second insulating base material 24. The material of the second insulating base material 24 may be the same as that of the first insulating base material 22 and preferably contains thermosetting resin or thermoplastic resin. For example, a prepreg (obtained by impregnating a nonwoven fabric base material or woven fabric base material, such as glass fiber, with epoxy resin or the like) may be used. However, the resin of the second insulating base material 24 may be any insulating base material used for circuit boards, such as a bismaleimide triazine resin, which is a thermosetting resin, or a modified polyphenylene ether resin, which is a thermoplastic resin, for example.

[0076] The second insulating base material 24 is in a semi-cured state, and the second metal layer 28 formed on the second surface 22b of the first insulating base material 22 is embedded in the second insulating base material 24.

[0077] FIG. 18 shows a state in which the through hole 34, which extends through the second insulating base material 24 in the thickness direction, is formed. The through hole 34 extends through the second insulating base material 24 and the resin film 54. The second metal layer 28 closes the bottom of the through hole 34. As a method for forming the through hole 34, a forming method using a laser is available, but the method is not limited to the forming method using a laser. Examples of types of laser that may be used to form the through hole 34 with laser include CO2 laser and YAG laser, and the laser type can be selected as appropriate. Also, there is no limitation to the laser output, and the output may be selected as appropriate.

[0078] FIG. 19 shows a state in which the through hole 34 is filled with the second conductive paste 36. The second conductive paste 36 may be of the same material as the first conductive paste 32. As the second conductive paste 36, paste containing a conductive filler and a binder resin may be used. Examples of conductive fillers include particles of metals such as copper, gold, silver, palladium, nickel, tin, and bismuth. These metal particle types may be used alone or in combination of two or more. As the binder resin, an epoxy resin, which is a type of thermosetting resin, may be used, for example. However, the material is not limited to epoxy resin, and polyimide resin or the like may be used. Also, the binder resin may be a thermoplastic resin instead of a thermosetting resin.

[0079] Examples of a method of filling the through holes 34 with the second conductive paste 36 include a method of filling the through holes 34 with the second conductive paste 36 under atmospheric pressure or under vacuum using a jig such as a squeegee.

[0080] FIG. 20 shows a state in which the resin film 54 on the surface of the second insulating base material 24 is peeled off. When the resin film 54 is peeled off, the second conductive paste 36 protrudes from the opening of the surface of the second insulating base material 24 opposite to the first insulating base material 22 by the thickness of the resin film 54.

[0081] When the resin film 54 peeled off, one unit component 60, in which the two insulating base materials 22 and 24 are laminated, is completed. The unit component 60 is configured by laminating the cured first insulating base material 22 and the semi-cured second insulating base material 24 laminated on the side of the first insulating base material 22 corresponding to the second surface 22b. The second metal layer 28 is embedded in the second insulating base material 24, and the second conductive paste 36 is also uncured and bulges toward the side corresponding to the second surface 24b of the second insulating base material 24. In the unit component 60, the first metal layer 26, which has a trapezoidal shape in which the side corresponding to the first surface 22a has a large diameter and the diameter decreases from the first surface 22a toward the second surface 22b, is formed at the first surface 22a of the first insulating base material 22, and the second metal layer 28, which has a trapezoidal shape in which the side corresponding to the first surface 24a has a large diameter and the diameter decreases from the first surface 24a toward the second surface 24b, is formed at the second surface 22b of the first insulating base material 22.

[0082] The method for manufacturing the circuit board 20 according to the present embodiment manufactures the multilayer circuit board 20 by laminating the multiple unit components 60 shown in FIG. 20. By manufacturing the multiple unit components 60 in advance and laminating these multiple unit components 60 as in the present embodiment can shorten the manufacturing time as compared to a configuration in which one layer is formed at a time as in the build-up type.

[0083] Also, as shown in FIGS. 2 to 13, the method for manufacturing the circuit board 20 of the present embodiment disposes the third metal layer 56 and the fourth metal layer 57 in succession on the lower side (opposite to the side where the first insulating base material 22 is laminated) of the first metal foil 40. Thus, it is possible to limit variations in the plate thickness distribution and the flatness of the laminated surfaces, and to prevent misalignment between layers after lamination, leakage of the conductive paste, voids, and the like.

[0084] FIG. 21 shows a state in which multiple unit components 60 and one unit component 61 are laminated. To laminate the multiple unit components 60 and the one unit component 61, the semi-cured second insulating base materials 24 of the unit components 60, 61 are joined to the cured first insulating base materials 22 of other unit components 60. As will be described below, the unit component of the lowest layer is the unit component 61, which is different in structure from the unit components 60.

[0085] The manufacturing process of the unit component 61, which is the lowest layer in the laminate of the multiple unit components 60 and 61, is now described. The unit component 61 in the lowest layer is manufactured by placing a fifth metal foil 65 in place of the first metal foil 40 shown in FIG. 2 and directly laminating the first conductive paste 32 without performing patterning of the fifth metal foil 65. The subsequent manufacturing process for the unit component 61 is the same as the manufacturing process for the unit component 60 shown in FIGS. 7 to 20 and thus not described. In this manner, as shown in FIGS. 21 to 23, the unit component 61 is obtained in which the fifth metal foil 65 is laminated at the entire lowest layer.

[0086] If the unit components 60 are laminated after the lowest layer is formed as a product surface, as with the unit component 60, foreign matter may be fused to the first metal layer 26 of the lowest layer, decreasing the yield. Also, if the first metal layer 26 of the lowest layer is patterned before the lamination of the unit components 60, the internal pressure created during the lamination may be dispersed, making it difficult to apply the pressure to the conductive paste and causing abnormality in the electrical resistance value. As such, laminating the unit component 61 at the lowest layer has advantageous effects of preventing the above.

[0087] Referring to FIGS. 21 to 25, the manufacturing process of the circuit board 20 in which the multiple unit components 60 and one unit component 61 are laminated are now described. FIGS. 21 to 25 show an example of a six-layer circuit board 20 in which two unit components 60 and one unit component 61 are laminated. First, with the multiple unit components 60 and one unit component 61 laminated, a surface metal layer 62 is placed on the uppermost surface (on the side of the uppermost unit component 60 corresponding to the second insulating base material 24 of the multiple unit components 60). As the surface metal layer 62, copper or the like may be used, but the material is not limited to copper, and other metals can be appropriately selected.

[0088] As shown in FIGS. 22 and 23, after the surface metal layer 62 is placed on the uppermost surface, thermocompression bonding or compression bonding is performed on the surface metal layer 62, the multiple unit components 60, and the one unit component 61. The thermocompression bonding or compression bonding cures the second insulating base materials 24 and the second conductive paste 36 of the unit components 60 and 61, joining the unit components 60 and the unit component 61 together. Also, the surface metal layer 62 at the uppermost surface is joined to the second insulating base material 24 of the unit component 60 that is at the uppermost part of the laminated unit components 60. The temperature and pressure for thermocompression bonding and the pressure for compression bonding may be appropriately selected according to the materials of the first conductive paste 32, the first insulating base materials 22, the second conductive paste 36, and the second insulating base materials 24.

[0089] Then, as shown in FIG. 24, the surface metal layer 62 and the fifth metal foil 65 are etched. The etching processing of this embodiment uses wet etching. Dry films 64 are affixed to the surface of the surface metal layer 62 and the surface of the fifth metal foil 65, the dry films 64 are exposed and developed through a photomask 63 to obtain the surface metal layer 62 formed as a predetermined pattern and the fifth metal layer 66.

[0090] As shown in FIG. 25, in the manufactured multilayer circuit board 20, the insulating base materials 22 and 24 are joined together without an adhesive layer. This is because the semi-cured second insulating base materials 24 are joined to the first insulating base materials 22 during the manufacturing of the unit components 60 and the unit component 61, and, when multiple unit components 60 and one unit component 61 are laminated, the first insulating base materials 22 and the semi-cured second insulating base materials 24 are bonded through thermocompression bonding or compression bonding, and the second conductive paste 36 and the first metal layers 26 are bonded by thermocompression bonding or compression bonding. Also, the manufacturing process provides a configuration in which the first metal layers 26 are embedded in the first insulating base materials 22, the second metal layers 28 are embedded in the second insulating base materials 24, and the fifth metal layer 66 is exposed from the first insulating base material 22.

[0091] The trapezoidal metal layers 26 and 28 formed in the multilayer circuit board 20 are arranged such that their trapezoidal shapes are uniformly in the same orientation. That is, in the multilayer circuit board 20, the first metal layers 26 and the second metal layers 28 are uniformly arranged in the same orientation, and the sides of the first metal layers 26 and the second metal layers 28 with the small diameter in the trapezoidal shape face toward the upper side of the multilayer circuit board. The side of the fifth metal layer 66 with the small diameter in the trapezoidal shape faces toward the lower side of the multilayer circuit board, and thus the fifth metal layer 66 is in the orientation that is reversed from the orientation of the metal layers 26 and 28.

[0092] The circuit board 20 manufactured by the method for manufacturing a circuit board of the present embodiment and the circuit board 20 of the present embodiment can be used as motherboards (supporting substrates) and also interposers (relay substrates). In particular, they can be used as motherboards and interposers of server systems and high-speed communication systems, and can also be used as circuit boards constituting semiconductor elements. They are also applicable to an inspection device, a probe card, and the like used to determine the quality of semiconductors.

[0093] In the present embodiment, a configuration has been described in which the three-layer metal includes the third metal layer 56 and the fourth metal layer 57 arranged in succession under the first metal foil 40. However, a sixth metal layer (not shown) containing a metal different from the first metal foil 40 may also be advantageously provided under the fourth metal layer 57. In this case, a process of removing the sixth metal layer, which is the lowest layer, by etching may be added at the beginning of the processes described in the above embodiment.

(Electronic Device)

[0094] The electronic device has the above-described circuit board 20, electronic components (not shown), and other members as necessary. Examples of the electronic device include smartphones, tablet-type mobile terminals, and computers.