METHOD AND APPARATUS FOR PROVIDING AUTOMATED INTERLOCKING LOGIC FOR MOVING-BLOCK RAILWAY SIGNALING

Abstract

The present disclosure provides a method and apparatus for providing an automated interlocking logic for moving-block railway signaling. According to at least one embodiment, the present disclosure provides a method for generating a train route for railway signaling based on moving block principle, including generating a directed graph for a track layout by calling pre-stored track information, generating a path matrix corresponding to the number of movement hops of a train based on the directed graph, and generating a train route from the path matrix, and verifying the train route by obtaining route information of the train from a mission of an automatic train supervision (ATS) system and comparing the route information with the train route.

Claims

1. A method for generating a train route for railway signaling based on moving block principle, the method comprising: generating a directed graph for a track layout by calling pre-stored track information; generating a path matrix corresponding to the number of movement hops of a train based on the directed graph, and generating a train route from the path matrix; and verifying the train route by obtaining route information of the train from a mission of an automatic train supervision (ATS) system and comparing the route information with the train route.

2. The method of claim 1, wherein the directed graph comprises: nodes defined by at least one point machine (PM) and at least one class located on the track layout; and edges defined by tracks located between adjacent nodes among the nodes.

3. The method of claim 2, wherein the class includes a plurality of adjacent balises on the track layout.

4. The method of claim 2, wherein the directed graph comprises: a nominal-direction graph for expressing a train route of the train when traveling along the classes in ascending order; and a reverse-direction graph for expressing a train route of the train when traveling along the classes in descending order.

5. The method of claim 4, wherein the generating of a directed graph further comprises: generating a node matrix for the nodes by traversing the directed graph in a zigzag direction; generating an initial routing matrix by multiplying the node matrix by an identity matrix; and generating a reachability matrix based on whether any of the nodes are interconnected and whether the classes are in ascending order.

6. The method of claim 5, wherein the reachability matrix comprises: a nominal reachability matrix that is a reachability matrix for the nominal-direction graph; and a reverse reachability matrix that is a reachability matrix for the reverse-direction graph.

7. The method of claim 6, wherein the generating of a train route further comprises: generating a path matrix for the nominal-direction graph by performing iterative multiplication between the initial routing matrix of the nominal-direction graph and the nominal reachability matrix, and calculating a k-th path matrix by performing iterative matrix multiplication until all elements included in the path matrix become 0; calculating a nominal-direction routing matrix that is an entire path matrix for the nominal-direction graph by summing up to the k-th path matrix from a 0th path matrix that is the path matrix of the 0th hop for the nominal-direction graph; calculating a reverse-direction routing matrix that is an entire path matrix for the reverse-direction graph by transposing the 0th to k-th path matrices for the nominal-direction graph; and generating a final routing matrix for the track layout by summing the nominal-direction routing matrix and the reverse-direction routing matrix.

8. The method of claim 7, wherein the verifying of the train route comprises: extracting the route of the train corresponding to the route information by searching the final routing matrix, and verifying whether switching directions of the point machines each match the route information.

9. The method of claim 8, wherein the verifying the train route further comprises: transmitting the train route verification result to the ATS system.

10. An apparatus for generating a train route, comprising: a database; a communication module; and a processor configured to generate a directed graph for a track layout by calling pre-stored track information, to generate a path matrix corresponding to the number of movement hops of the train based on the directed graph, and generate a train route from the path matrix, and to verify the train route by obtaining route information of the train from a mission of an automatic train supervision (ATS) system and comparing the route information with the train route.

11. A computer program stored in a computer-readable medium for executing the steps respectively included in the method for generating a train route according to claim 1.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIG. 1 is a block diagram for illustrating a conventional moving block-based ATC implemented as an additional layer on a fixed block-based interlocking system.

[0018] FIG. 2 illustrates an interlocking logic of conventional CBTC.

[0019] FIG. 3 illustrates a conflict between the conventional interlocking and a zone controller by the exclusive resource allocation functions.

[0020] FIG. 4 illustrates configuring classes with one or more balises for generating a graph by a train-route generating apparatus according to at least one embodiment of the present disclosure.

[0021] FIG. 5 illustrates an implementation of a track layout and a sub-track layout used by the train-route generating apparatus according to at least one embodiment of the present disclosure.

[0022] FIGS. 6A, 6B, and 6C illustrate a graph of the sub-track layout of FIG. 5, its nominal-direction graph, and its reverse-direction graph respectively.

[0023] FIG. 7 is a block diagram of the respective components in the train-route generating apparatus according to at least one embodiment of the present disclosure.

[0024] FIG. 8 illustrates a dangerous-side route in the switching area in relation to the process of verifying a train route by the train-route generating apparatus according to at least one embodiment of the present disclosure.

[0025] FIGS. 9A, 9B, 9C, and 9D illustrate final routing matrices generated by the train-route generating apparatus according to at least one embodiment of the present disclosure.

[0026] FIG. 10 is a diagram illustrating an example resource allocation for a plurality of trains headed to the same class from different classes by the train-route generating apparatus according to at least one embodiment.

DETAILED DESCRIPTION

[0027] Hereinafter, some embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the following description, like reference numerals preferably designate like elements, although the elements are shown in different drawings. Further, in the following description of some embodiments, a detailed description of related known components and functions when considered obscuring the subject of the present disclosure will be omitted for the purpose of clarity and for brevity.

[0028] Additionally, various terms such as first, second, A, B, (a), (b), etc., are used solely for the purpose of differentiating one component from others but not to imply or suggest the substances, the order or sequence of the components. Throughout this specification, when parts include or comprise a component, they are meant to further include other components, not excluding thereof unless there is a particular description contrary thereto. The terms such as unit, module, and the like refer to units for processing at least one function or operation, which may be implemented by hardware, software, or a combination thereof.

[0029] The present disclosure provides a system and method for generating interlocking logic for a moving block railway signaling system. In the moving block railway signaling system, the train route means a safe and accurate track switching direction, and the present disclosure can utilize the provided interlocking logic to generate the train route and verify the track switching direction. Additionally, the present disclosure provides an efficient interlocking logic and an efficient interlocking system for the moving block railway signaling system, thereby contributing to the simplification of the system and improvement of control efficiency of the switching area.

[0030] The interlocking logic generates a route of the train and performs the function of verifying whether the generated route is valid. The interlocking system receives the train schedule from an automatic train supervision (ATS) system and determines whether the travel paths of the train included in the train schedule are safe. The interlocking system verifies the validity of the route by checking whether the first to third conditions are satisfied. A first condition means whether there are no other trains in the generated route. A second condition means whether generated routes of a plurality of trains do not overlap each other. A third condition means whether the direction switching by the point machine existing in the train route is performed safely and accurately. An occurrence of an error in the switching direction made by the point machine could cause a catastrophic result including train derailment, collision, and rear-end collision. Therefore, route verification is an utterly important function for safety. Since ZC allocates resources exclusively by granting movement authority to trains, the first and second conditions can be integrated by the moving block railway signaling system. Therefore, the presently disclosed interlocking for the moving block system can perform the route verification by checking only the third condition. This means that the interlocking only needs to verify the integrity of the track switching direction of the point machine located in the train route, resulting in a simplified structure of the system.

[0031] The description of the present disclosure to be presented below in conjunction with the accompanying drawings is intended to describe exemplary embodiments of the present disclosure and is not intended to represent the only embodiments in which the technical idea of the present disclosure may be practiced.

[0032] FIG. 4 illustrates configuring classes with one or more balises for generating a graph by a train-route generating apparatus according to at least one embodiment of the present disclosure.

[0033] As shown in FIG. 4, the train-route generating apparatus defines the first to third limits to generate a graph. The first restriction is to stipulate that classes each should be composed of one or more balises or one or more tag groups. The second restriction is to stipulate that one point machine should be present between two different classes. The third restriction is to stipulate that one class should be present between two different point machines.

[0034] FIG. 5 illustrates an implementation of a track layout used by the train-route generating apparatus according to at least one embodiment of the present disclosure.

[0035] FIG. 5 shows a simplified track layout for a track map of Gyeryong Station on the Honam Line in Korea. The track layout includes a sub-track layout. As shown by the dotted lines in FIG. 5, the sub-track layout includes class 21 to class 25, point machine 21A, and point machine 21B. The interlocking function determines the track switching direction and verifies the validity of the track switching direction. The interlocking function may simplify the track layout by the classes and point machines. In FIG. 5, C denotes classes representing balises, the classes being identified by the respective numbers. P stands for point machines which are identified by the respective numbers.

[0036] FIGS. 6A, 6B, and 6C illustrate a graph of the sub-track layout of FIG. 5, its nominal-direction graph, and its reverse-direction graph respectively.

[0037] In at least one embodiment, the present disclosure stipulates that the route generated by the railway interlocking logic be in the form of a simple path. The railway interlocking logic cannot generate the V-shapes route shown in FIG. 2 to satisfy the railway switching characteristics. The present disclosure takes into account constraints due to the railway switching characteristics and reconstructs the railway track layout in the form of a graph to generate a moving-block interlocking logic. A graph G is a pair (N, E) where N denotes nodes and E denotes edges. Here, nodes represent a set of at least one class and at least one point machine, wherein the class is composed of balise or tag group. Edges represent a set of tracks between the adjacent nodes. A nominal-direction graph Gn is a direction graph for generating a train route so that it allows at least one train running on the track to travel along the classes in ascending order of the class numbers. A reverse-direction graph G.sub.r is a direction graph for generating a train route so that it allows at least one train running on the track to travel in descending order of the class numbers.

[0038] At least one node included in the sub-track layout of FIG. 5 may be converted into a node matrix K as expressed by Equation 1. As can be seen by referring to FIG. 6A, the elements of the node matrix K may be extracted by traversing nodes N of graph G in a zigzag direction based on the geographic location. The elements of the node matrix K are placed in each column in the order they are extracted from graph G.

K=[C21 C22 P21A C23 P21B C24 C25] Equation 1

[0039] An initial routing matrix as expressed by Equation 2, is a two-dimensional matrix obtained by traversing the node of graph G in the zigzag direction. The initial routing matrix may be calculated by multiplying the node matrix by an identity matrix (I) having the same number of columns as those of the node matrix. The initial routing matrix becomes a diagonal matrix including a string representing the node included in graph G, as an element. The initial routing matrix is a square matrix with the same number of rows and columns and has a triangular matrix shape, featuring an easy matrix operation.

[00001]$\begin{array}{cc}\begin{array}{ccccccc}C21& C22& P21A& C23& P21B& C24& C25\end{array}C=\begin{array}{c}C21\\ C22\\ P21A\\ C23\\ P21B\\ C24\\ C25\end{array}\left[\begin{array}{ccccccc}C21& 0& 0& 0& 0& 0& 0\\ 0& C22& 0& 0& 0& 0& 0\\ 0& 0& P21A& 0& 0& 0& 0\\ 0& 0& 0& C23& 0& 0& 0\\ 0& 0& 0& 0& P21B& 0& 0\\ 0& 0& 0& 0& 0& C24& 0\\ 0& 0& 0& 0& 0& 0& C25\end{array}\right]& \mathrm{Equation}2\end{array}$

[0040] A reachability matrix R is a matrix including information about whether or not the nodes of graph G are interconnected and whether the direction is the nominal direction or reverse direction. A nominal reachability matrix R.sub.n, which is a reachability matrix for the nominal-direction graph, has the form of an upper triangular matrix, as expressed in Equation 3. The nominal reachability matrix according to Equation 3 is a reachability matrix for the nominal-direction graph of the sub-track layout of FIG. 5.

[00002]$\begin{array}{cc}{R}_n=\begin{array}{c}\\ C21\\ C22\\ P21A\\ C23\\ P21B\\ C24\\ C25\end{array}\left[\begin{array}{ccccccc}C21& C22& P21A& C23& P21B& C24& C25\\ 0& 0& 0& 0& +& 0& 0\\ 0& 0& +& 0& 0& 0& 0\\ 0& 0& 0& -& 0& 0& +\\ 0& 0& 0& 0& -& 0& 0\\ 0& 0& 0& 0& 0& +& 0\\ 0& 0& 0& 0& 0& 0& 0\\ 0& 0& 0& 0& 0& 0& 0\end{array}\right]& \mathrm{Equation}3\end{array}$

[0041] A reverse reachability matrix R.sub.r, which is a reachability matrix for the reverse-direction graph, has the form of a lower triangular matrix. The reverse reachability matrix according to Equation 4 is a reachability matrix for the reverse-direction graph of the sub-track layout of FIG. 5.

[00003]$\begin{array}{cc}{R}_r=\begin{array}{c}\\ C21\\ C22\\ P21A\\ C23\\ P21B\\ C24\\ C25\end{array}\left[\begin{array}{ccccccc}C21& C22& P21A& C23& P21B& C24& C25\\ 0& 0& 0& 0& 0& 0& 0\\ 0& 0& 0& 0& 0& 0& 0\\ 0& +& 0& 0& 0& 0& 0\\ 0& 0& -& 0& 0& 0& 0\\ 0& 0& 0& -& 0& 0& 0\\ 0& 0& 0& 0& +& 0& 0\\ 0& 0& +& 0& 0& 0& 0\end{array}\right]& \mathrm{Equation}4\end{array}$

[0042] The reachability matrices each includes character values as the elements of the matrix. The elements contained in the respective reachability matrices may be expressed as r.sub.i,j. The reachability matrices may each be calculated by Equation 5. The reachability matrices R.sub.n and R.sub.r are as shown in Equation 3 and Equation 4.

[00004]$\begin{array}{cc}R=\left[r_{i,j}\right]=\{\begin{array}{c}\text{'}+\text{'},G\mathrm{has}a\mathrm{direct}\left\{k_i,k_j\right\}\mathrm{path}\mathrm{with}\mathrm{normal}\mathrm{switch}\mathrm{direction}\\ \text{'}-\text{'},G\mathrm{has}a\mathrm{direct}\left\{k_i,k_j\right\}\mathrm{path}\mathrm{with}\mathrm{reverse}\mathrm{switch}\mathrm{direction}\\ \text{'}0\text{'},\mathrm{otherwise}\end{array}& \mathrm{Equation}5\end{array}$

[0043] The route of the train may be generated by an iterative multiplication operation between the initial routing matrix and the reachability matrix R. In matrix multiplication, the result of the multiplication operation between two elements including 0 (zero value) is 0. A multiplication operation between two non-zero elements means string concatenation. In graph G, the unit of movement between adjacent nodes may be defined as a hop. For example, two nodes are required to move one hop, and the number of nodes included in the k-th hop may be k+1.

[0044] A k-th path matrix .sub.n(k), which is the path matrix of the k-th hop for the nominal-direction graph, may be calculated by the operation of Equation 6. The train-route generating apparatus repeats matrix multiplication until all elements of the k-th path matrix become 0.

[00005]$\begin{array}{cc}\begin{array}{c}{P}_{n\left(0\right)}=C\\ P_{n\left(1\right)}=C{R}_{n}C={\mathrm{CR}}_n{P}_{n\left(0\right)}\\ P_{n\left(2\right)}=C{R}_{n}C{R}_{n}C=C{R}_n{P}_{n\left(1\right)}\\ .Math.\\ P_{n\left(k\right)}=C{R}_n{P}_{n\left(k-1\right)}\end{array}& \mathrm{Equation}6\end{array}$

[0045] A nominal-direction routing matrix .sub.n for the nominal-direction graph may be generated by summing the path matrix of the 0th hop through the path matrix of the k-th hop, that is, calculating

[00006]$\underset{k=1}{.Math.}{?}_{n\left(k\right)}.$

A nominal-direction routing matrix for the sub-track layout of FIG. 5, which is generated based on Equations 2 to 6 is expressed as Equation 7.

[00007]$\begin{array}{cc}{P}_n=\begin{array}{c}\\ C21\\ C22\\ P21A\\ C23\\ P21B\\ C24\\ C25\end{array}\left[\begin{array}{ccccccc}C21& C22& P21A& C23& P21B& C24& C25\\ 0& 0& 0& 0& C21+P21B& C21+P21B+C24& 0\\ 0& 0& C22+P21A& C22+P21A-C23& C22+P21A-C23-P21B& C22+P21A-C23-P21B+C24& C22+P21A+C25\\ 0& 0& 0& P21A-C23& P21A-C23-P21B& P21A-C23-P21B+C24& P21A+C25\\ 0& 0& 0& 0& C23-P21B& C23-P21B+C24& 0\\ 0& 0& 0& 0& 0& P21B+C24& 0\\ 0& 0& 0& 0& 0& 0& 0\\ 0& 0& 0& 0& 0& 0& 0\end{array}\right]& \mathrm{Equation}7\end{array}$

[0046] A path matrix r(k) of the k-th hop for the reverse-direction graph of the sub-track layout shown in FIG. 5 may be calculated by the operation of Equation 8. Accordingly, the path matrix of the k-th hop for reverse-direction graph G.sub.r may be simply calculated by transposing the path matrix .sub.n(k) of the k-th hop for the nominal-direction graph. The reverse-direction routing matrix .sub.r for the reverse-direction graph G.sub.r may be generated by summing the path matrices of the 0th through k-th hops, that is, calculating

[00008]$\underset{k=1}{.Math.}{?}_{r\left(k\right)}.$

[00009]$\begin{array}{cc}\begin{array}{c}{P}_{r\left(0\right)}=C=P_{n\left(0\right)}^T\\ P_{r\left(1\right)}={\mathrm{CR}}_r{P}_{r\left(0\right)}={\left(C{R}_n{P}_{n\left(0\right)}\right)}^T=P_{n\left(1\right)}^T\\ P_{r\left(2\right)}=C{R}_r{P}_{r\left(1\right)}={\left({\mathrm{CR}}_n{P}_{n\left(1\right)}\right)}^T=P_{n\left(2\right)}^T\\ .Math.\\ P_{r\left(k\right)}=C{R}_r{P}_{r\left(k-1\right)}={\left(C{R}_n{P}_{n\left(k-1\right)}\right)}^T=P_{n\left(k\right)}^T\end{array}& \mathrm{Equation}8\end{array}$

[0047] The final routing matrix for both the track layout shown in FIG. 5 and the graph G shown in FIG. 6A may be calculated by summing the nominal-direction routing matrix .sub.n and the reverse-direction routing matrix .sub.r. The final routing matrix of the sub-track layout of FIG. 5 is as shown in Equation 9. In at least one embodiment, a route from an arbitrary node A to another node B among a plurality of nodes included in graph G is represented as (A, B). As shown in Equation 9, a route (C22, C24) from node C22 to node C24 may be expressed as [C22+P21A?C23?P21B+C24]. Here, the sign + placed between the respective nodes signifies a normal switch direction. The sign ? placed between the respective nodes signifies a reverse switch direction. When passing class C22, the train travels in the normal switch direction, and when passing through point machine P21A, it travels in the reverse switch direction. When passing class C23, the train travels in the reverse switch direction, and when passing through point machine P21B, it travels in the normal switch direction. The train passes through C22, P21A, C23, and P21B to reach C24.

[00010]$P=\begin{array}{c}\\ C21\\ C22\\ P21A\\ C23\\ P21B\\ C24\\ C25\end{array}\left[\begin{array}{ccccccc}C21& C22& P21A& C23& P21B& C24& C25\\ 0& 0& 0& 0& C21+P21B& C21+P21B+C24& 0\\ 0& 0& C22+P21A& C22+P21A-C23& C22+P21A-C23-P21B& C22+P21A-C23-P21B+C24& C22+P21A+C25\\ 0& P21A+C22& 0& P21A-C23& P21A-C23-P21B& P21A-C23-P21B+C24& P21A+C25\\ 0& C23-P21A+C22& C23-P21A& 0& C23-P21B& C23-P21B+C24& 0\\ P21B+C23& P21B-C23-P21A+C22& P21B-C23-P21A& P21B-C23& 0& P21B+C24& 0\\ C24+P21B+C21& C24+P21B-C23-P21A+C22& C24+P21B-C23-P21A& C24+P21B-C23& C24+P21B& 0& 0\\ 0& C25+P21A+C22& C25+P21A& 0& 0& 0& 0\end{array}\right]$

[0048] In at least one embodiment, the train-route generating apparatus is responsive to new route information [C21?P21B?C24] received from a mission of the ATS system for calculating and generating a routing matrix .sub.(3) corresponding to the third hop. The train-route generating apparatus compares the calculated route from the routing matrix with the received route information from the ATS system. With the route from class C21 to class C24 being [C21+P21B+C24] as shown in Equation 9, the train-route generating apparatus can verify the route by determining that there is an error happened to the received route. This allows the train-route generating apparatus to re-establish the correct route and thereby protect the train from dangerous situations. In another embodiment, the train-route generating apparatus operates as part of an onboard automatic train control system.

[0049] FIG. 7 is a block diagram of the respective components in the train-route generating apparatus according to at least one embodiment of the present disclosure.

[0050] The train-route generating apparatus 700 according to at least one embodiment of the present disclosure includes all or some of a processor 702, a communication module 704, and a database (DB) 706. The train-route generating apparatus 700 shown in FIG. 7 is according to at least one embodiment, and all the blocks shown in FIG. 7 are not requisite components, some blocks included in the train-route generating apparatus 700 may be added, changed, or deleted in another embodiment. For example, the train-route generating apparatus 700 may further include a memory (not shown) for storing a program for causing the processor 702 to perform a train-route generating method according to at least one embodiment of the present disclosure. Here, the program may include a plurality of instructions executable by the processor 702, and the plurality of instructions when executed by the processor 702 allows a train route to be generated and verified. The memory may include at least one of a volatile memory and a non-volatile memory. The volatile memory includes static random access memory (SRAM) or dynamic random access memory (DRAM), and the non-volatile memory includes flash memory among others.

[0051] Hereinafter, the respective components included in the train-route generating apparatus 700 will be described by referring to FIG. 7.

[0052] The processor 702 may include at least one core capable of executing at least one or more instructions. The processor 702 may execute instructions stored in the memory, and it may perform generating a train route and verification by executing the instructions. In at least one embodiment of the present disclosure, the processor 702 includes all or some of a graph generation unit 708, a route generation unit 710, and a route verification unit 712. Here, the graph generation unit 708, the route generation unit 710, and the route verification unit 712 may have logical configurations.

[0053] The graph generation unit 708 generates a graph for the track layout by calling track information stored in the DB 706. Specifically, the graph generation unit 708 receives the train route from the mission of the ATS system and searches the DB 706 to call up the track information corresponding to the received train route. Detailed methods performed by the graph generation unit 708 for generating the graph for the sub-track layout, the nominal-direction graph, and the reverse-direction graph therefor are the same as those described above referring to FIGS. 4 to 6C, so reiterative details thereof will be omitted.

[0054] The graph generation unit 708 operates based on the graph for the sub-track layout, the nominal-direction graph, and the reverse-direction graph therefor, for generating a node matrix, a reachability matrix, and an initial routing matrix according to Equations 1 to 5. The detailed illustrative operation of the graph generation unit 708 for generating a node matrix, a reachability matrix, and an initial routing matrix for the sub-track layout shown in FIG. 5 is the same as that described above referring to Equations 1 to 5, so reiterative details thereof will be omitted.

[0055] The route generation unit 710 operates based on a plurality of graphs and a plurality of matrices for the graphs generated by the graph generation unit 708, for constructing a path matrix and a routing matrix according to Equations 6 to 9 and thereby generates a train route. The detailed illustrative operation of the route generation unit 710 for generating a routing matrix for the sub-track layout shown in FIG. 5 is the same as that described above referring to Equations 6 to 9, so reiterative details thereof will be omitted.

[0056] The route verification unit 712 compares the train route generated by the route generation unit 710 with the route received from the ATS system and thereby verifies the accuracy and safety of the track switching directions of the point machines located in the train route. In a moving block environment, an occurrence of error in the switching direction made by a point machine in a train route could cause a catastrophic result including train derailment, collision, and rear-ending. To resolve this matter, the route verification unit 712 verifies the train route by verifying the integrity of the switching directions of the point machines located on the route generated by the route generation unit 710 to verify the route of the train.

[0057] FIG. 8 illustrates a dangerous-side route in the switching area in relation to the process of verifying a train route by the train-route generating apparatus according to at least one embodiment of the present disclosure.

[0058] The following refers to FIG. 8 for describing an illustrative verification process performed by the route verification unit 712 on the train route generated with respect to the track layout of Gyeryong Station on the Honam Line in the Republic of Korea shown in FIG. 5.

[0059] In at least one embodiment of the present disclosure, the train-route generating apparatus 700 generates an entrance and exit route for left-area nodes including class C28 through class C33 and their leftside nodes shown in the track layout of FIG. 5. Nodes for generating the entrance and exit route include classes C21 to C33, point machines P21A, P21B, and point machines P22 to P25. According to the method presented in Equation 1, node matrix K for the left-area nodes generated by the route generation unit 710 may be expressed as Equation 10.

[00011]$\begin{array}{cc}K=\left[C21C22P21AC23P21BC24C2SP23?P22C26C27P25P24C28C29C30C31C32C33\right]& \mathrm{Equation}10\end{array}$

[0060] According to the method described above referring to Equation 2, initial routing matrix for the left-area nodes generated by the route generation unit 710 may be expressed as Equation 11.

[0061] According to the methods described above referring to Equation 3 and Equation 4, nominal reachability matrix R.sub.n and reverse reachability matrix R.sub.r for the left-area nodes generated by the route generation unit 710 may be expressed as Equation 12 and Equation 13, respectively.

[0062] FIGS. 9A, 9B, 9C, and 9D illustrate final routing matrices generated by the train-route generating apparatus according to at least one embodiment of the present disclosure.

[0063] As shown in FIGS. 9A to 9D, final routing matrix is generated by the route generation unit 710 for a left-area graph according to the methods described above with Equations 6 to 9. FIGS. 9A to 9D show some of the final routing matrix for the entire graph in consideration of convenience of illustration, and the final routing matrix includes all cases of entrance and exit routes that can be generated between the left-area nodes.

[0064] As show in FIG. 8, trains T1 and T2 are traveling along the classes in ascending order of the class numbers. Trains T3 and T4 are traveling along the classes in descending order of the class numbers. Here, first to fourth dangerous-side routes may be defined as being dangerous-side routes for trains T1 to T4 when an error occurs in the switching direction of a point machine. For example, the first dangerous-side route may be defined by [C21+P1+C24] that is a route generated for train T1 with point machine P1 assuming the track switching direction that is in the reverse mode. As with the nominal-direction graph shown in FIG. 6B, train T1 could reach class C24 from class C21 if point machine P1 were in the normal mode. However, since point machine P1 is presently in the reverse mode, train T1 is unable to reach class C24 and will derail. The second dangerous-side route may be defined by [C22+P2?C23?P1+C24] that is a route generated for train T2 with point machine P1 assuming the track switching direction that is in the normal mode. As with the nominal-direction graph shown in FIG. 6B, train T2 could reach class C24 from class C23 if point machine P1 were in the reverse mode. However, since the point machine P1 is presently in the normal mode, train T2 is unable to reach class C24 and will derail. The third dangerous-side route may be defined by [C24+P1?C23?P2+C22] that is a route generated for train T3 with point machine P2 assuming the track switching direction that is in the normal mode. As with the reverse-direction graph shown in FIG. 6C, train T3 could reach class C22 from class C23 if point machine P2 were in the reverse mode. However, since point machine P2 is presently in the normal mode, the train T3 is unable to reach class C22 and will derail. The fourth dangerous-side route may be defined by [C25+P2+C22] that is a route generated for train T4 with point machine P2 assuming the track switching direction that is in the reverse mode. As with the reverse-direction graph shown in FIG. 6C, train T4 could reach class C22 from class C25 if point machine P2 were in the normal mode. However, with point machine P2 being in the reverse mode, train T4 is unable to reach class C22 and will derail.

[0065] In the final routing matrix for the left-area nodes according to FIGS. 9A to 9D, all cases of entrance and exit routes generated by the route generation unit 710 and extending from class C21 or class C22 to class C28 through class C33 can be listed as in Table 1. Here, class C21 or C22 is a node located at the left end of the track layout shown in FIG. 5. Classes C28 through C33 correspond to station dwell points of the track layout.

TABLE-US-00001 TABLE 1 Length Route Name Route (hops) Direction P(C21, C28) C21 + P21B + C24 + P23 ? C26 + 6 Nominal P25 ? C28 P(C21, C29) C21 + P21B + C24 + P23 ? C26 + 6 Nominal P25 + C29 P(C21, C30) C21 + P21B + C24 + P23 + C30 4 Nominal P(C22, C28) C22 + P21A ? C23 ? P21B + C24 + 8 Nominal P23 ? C26 + P25 ? C28 P(C22, C29) C22 + P21A ? C23 ? P21B + C24 + 8 Nominal P23 ? C26 + P25 + C29 P(C22, C30) C22 + P21A ? C23 + P21B + C24 + 6 Nominal P23 + C30 P(C22, C31) C22 + P21A + C25 + P22 + C31 4 Nominal P(C22, C32) C22 + P21A + C25 + P22 ? C27 + 6 Nominal P24 + C32 P(C22, C33) C22 + P21A + C25 + P22 + C27 + 6 Nominal P24 ? C33 P(C28, C21) C28 ? P25 + C26 ? P23 + C24 + 6 Reverse P21B + C21 P(C28, C22) C28 ? P25 + C26 ? P23 + C24 + 8 Reverse P21B ? C23 ? P21A + C22 P(C29, C21) C29 + P25 + C26 ? P23 + C24 + 6 Reverse P21B + C21 P(C29, C22) C29 + P25 + C26 ? P23 + C24 + 8 Reverse P21B ? C23 ? P21A + C22 P(C30, C21) C30 + P23 + C24 + P21B + C21 4 Reverse P(C30, C22) C30 + P23 + C24 + P21B ? C23 ? 6 Reverse P21A + C22 P(C22, C31) C31 + P22 + C25 + P21A + C22 4 Reverse P(C32, C22) C32 + P24 + C27 ? P22 + C25 + 6 Reverse P21A + C22 P(C33, C22) C33 ? P24 + C27 ? P22 + C25 + 6 Reverse P21A + C22

[0066] When the train-route generating apparatus 700 receives the train route information corresponding to [C21?P21B+C24+P23+C30] from the mission of the ATS system, the route verification unit 712 searches Table 1 to output route (C21, C30) in the third line. Since the path included in route (C21, C30) is defined as [C21+P21B+C24+P23+C30], the route verification unit 712 determines that an error has occurred in the switching direction of the point machine P21B. For example, the route verification unit 712 verifies that the train if traveling on the track following the received route information runs into a dangerous situation that is any one of train derailment, collision, and rear-ending. Meanwhile, upon determining that the track switching direction of the point machine is accurate and safe, the route verification unit 712 may output the route received from the ATS system as the final route. The route verification unit 712 may transmit the final route to the ATS system through the communication module 704. Accordingly, the train-route generating apparatus 700 according to at least one embodiment of the present disclosure can confirm in advance whether the track switching direction of the point machine located in the train route is safe, thereby providing protection against the dangerous-side path.

[0067] A communication module 704 is linked with the processor 702 to provide access to an external network. For example, the train-route generating apparatus 700 may perform communications with other devices, such as a ground device or an on-board device, through the communication module 704. The communication module 704 may include, for example, all or some of a transmit filter, a receive filter, an amplifier, a mixer, an oscillator, a digital to analog converter (DAC) and an analog to digital converter (ADC), etc.

[0068] The DB 706 may be a database of track layouts of routes. The DB 706 may include, for example, facilities expressed by IDs of all balises (or Tags) installed on the route and a balise reference coordinate system (ETCS SRS-subset 026). Here, the facilities include point machines, boarding and alighting platforms, crossing gates, and platform screen doors (PSDs). For example, the starting point and the ending point of the boarding and alighting platform may each be expressed by an offset, which is an integer variable, according to a displacement from a particular balise ID on the track.

[0069] FIG. 10 is a diagram illustrating an example resource allocation for a plurality of trains headed to the same class from different classes by the train-route generating apparatus according to at least one embodiment.

[0070] FIG. 10 assumes that trains T1 and T2 that have stopped at classes C31 and C30 are about to advance toward class C22. In at least one embodiment, train T1 is ahead of train T2 in securing the movement authority for the resource up to class C22. In particular, the train-route generating apparatus mounted on train T1 calls up route (C30, C22) and then exclusively locks at least one point machine located between class C31 and class C22. Train T1 is able to move from class C31 to class C22 based on the secured resources. Train T2 is to verify the route from class C30 to class C2 by searching Table 1 to call up route (C30, C22) and searching for a limit point where Train T2 may collide with train T1 running on route. In particular, the train-route generating apparatus mounted on the train T2 secures the resources up to class C23, which is the limit point of the resource limited by the train T1. For example, train T2 locks at least one point machine located between class C30 and class C23, and it can only move from class C30 to class C23.

[0071] When compared to the conventional interlocking system of CBTC shown in FIG. 2, the interlocking logic included in the provided train-route generating apparatus 700 of the present disclosure can efficiently manage resources in the switching area by using the characteristics of the moving block environment.

[0072] Therefore, the interlocking function included in the train-route generating apparatus 700 of the present disclosure performs verification on the directions of routes, and allows the existing train on a route to have overlapping routes, thereby maximizing the benefits of the moving block principle.

[0073] Various implementations of the systems and methods described herein may be realized by digital electronic circuitry, integrated circuits, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), computer hardware, firmware, software, and/or their combination. These various implementations can include those realized in one or more computer programs executable on a programmable system. The programmable system includes at least one programmable processor coupled to receive and transmit data and instructions from and to a storage system, at least one input device, and at least one output device, wherein the programmable processor may be a special-purpose processor or a general-purpose processor. Computer programs, which are also known as programs, software, software applications, or codes, contain instructions for a programmable processor and are stored in a computer-readable recording medium.

[0074] The computer-readable recording medium includes any types of recording device on which data that can be read by a computer system are recordable. Examples of computer-readable recording medium include non-volatile or non-transitory media such as a ROM, CD-ROM, magnetic tape, floppy disk, memory card, hard disk, optical/magnetic disk, storage devices, and the like. The computer-readable recording medium further includes transitory media such as data transmission medium. Further, the computer-readable recording medium can be distributed in computer systems connected via a network, wherein the computer-readable codes can be stored and executed in a distributed mode.

[0075] Various implementations of the systems and techniques described herein can be realized by a programmable computer. Here, the computer includes a programmable processor, a data storage system (including volatile memory, nonvolatile memory, or any other type of storage system or a combination thereof), and at least one communication interface. For example, the programmable computer may be one of a server, network equipment, a set-top box, an embedded device, a computer expansion module, a personal computer, a laptop, a personal data assistant (PDA), a cloud computing system, and a mobile device.

[0076] Although exemplary embodiments of the present disclosure have been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions, and substitutions are possible, without departing from the idea and scope of the claimed invention. Therefore, exemplary embodiments of the present disclosure have been described for the sake of brevity and clarity. The scope of the technical idea of the embodiments of the present disclosure is not limited by the illustrations. Accordingly, one of ordinary skill would understand the scope of the claimed invention is not to be limited by the above explicitly described embodiments but by the claims and equivalents thereof.

REFERENCE NUMERALS

[0077]

TABLE-US-00002 700: train-route generating apparatus 702: processor 704: communication module 706: DB 708: graph generation unit 710: route generation unit 712: route verification unit

CROSS-REFERENCE TO RELATED APPLICATION

[0078] This application claims priority under 35 U.S.C ? 119(a) of Patent Application No. 10-2020-0130331, filed on Sep. 30, 2020 in Korea, the entire content of which is incorporated herein by reference. In addition, this non-provisional application claims priority in countries, other than the U.S., with the same reason based on the Korean patent application, the entire content of which is hereby incorporated by reference.