AMOLED pixel driving circuit and pixel driving method

Abstract

Disclosed are an AMOLED pixel driving circuit and a pixel driving method. The AMOLED pixel driving circuit utilizes the 4T2C structure, and comprises: a first thin film transistor (T1), a second thin film transistor (T2), a third thin film transistor (T3), a fourth thin film transistor (T4), a first capacitor (C1), a second capacitor (C2) and an organic light emitting diode (D1); the nth scan signal (SCAN(n)) and the n+1th scan signal (SCAN(n+1)) are combined with each other, and correspond to a threshold voltage sensing stage, a holding stage, a programming stage and a drive stage one after another. In comparison with the pixel driving circuit of the 5T2C structure, the corresponding thin film transistor is controlled merely with arranging the scan signal. There will be the compensation function, and the amount of the control signals can be decreased, and the circuit structure is simplified and the cost is decreased.

Claims

1. An active matrix organic light emitting display pixel driving circuit, comprising: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a first capacitor, a second capacitor and an organic light emitting diode, wherein all the respective first thin film transistor, second thin film transistor, third thin film transistor and fourth thin film transistor are P type thin film transistors; wherein the first thin film transistor is a drive thin film transistor, and a gate of the first thin film transistor is electrically coupled to a first end of the first capacitor through a first node, and a source of the first thin film transistor is electrically coupled to a power source positive voltage, and a drain of the first thin film transistor is electrically coupled to an anode of the organic light emitting diode; a gate of the second thin film transistor receives a current-row scan signal that corresponds to a current row where the pixel driving circuit is located, and a source of the second thin film transistor receives a data signal, and a drain of the second thin film transistor is electrically coupled to a second end of the first capacitor through a second node; a gate of the third thin film transistor receives a next-row scan signal that corresponds to a next row that is next to the current row where the pixel driving circuit is, and a source of the third thin film transistor is electrically coupled to the second node, and a drain of the third thin film transistor is electrically coupled to a reference voltage; a gate of the fourth thin film transistor receives the current-row scan signal, and a source of the fourth thin film transistor is electrically coupled to the first node, and a drain of the fourth thin film transistor is electrically coupled to the anode of the organic light emitting diode; the first end of the first capacitor is electrically coupled to the first node, and the second end of the first capacitor is electrically coupled to the second node; a first end of the second capacitor is electrically coupled to the first node, and a second end of the second capacitor is electrically coupled to the power source positive voltage; and the anode of the organic light emitting diode is electrically coupled to the drain of the first thin film transistor and the drain of the fourth thin film transistor, and a cathode of the organic light emitting diode is electrically coupled to a power source negative voltage; and wherein the drain of the second thin film transistor and the source of the third thin film transistor are both electrically shorted to the second end of the first capacitor and wherein the second thin film transistor and the third thin film transistor are respectively controlled by the current-row scan signal and the next-row scan signal to supply the data signal and the reference voltage to the second end of the first capacitor at different time periods that are separated by a time interval therebetween.

2. The active matrix organic light emitting display pixel driving circuit according to claim 1, wherein the reference voltage is a constant voltage.

3. The active matrix organic light emitting display pixel driving circuit according to claim 1, wherein all of the first thin film transistor, the second thin film transistor, the third thin film transistor and the fourth thin film transistor are Low Temperature Poly-silicon thin film transistors, oxide semiconductor thin film transistors or amorphous silicon thin film transistors.

4. The active matrix organic light emitting display pixel driving circuit according to claim 1, wherein the current-row scan signal and the next-row scan signal are each a pulse signal having a falling edge and a rising edge, and the falling edge of the next-row scan signal is later than the rising edge of the current-row scan signal.

5. The active matrix organic light emitting display pixel driving circuit according to claim 4, wherein the current-row scan signal and the next-row scan signal are combined with each other to provide a threshold voltage sensing stage, a holding stage, a programming stage and a drive stage one after another; in the threshold voltage sensing stage, the current-row scan signal is a low voltage level, and the next-row scan signal is a high voltage level; in the holding stage, the current-row scan signal is a high voltage level, and the next-row scan signal is a high voltage level; in the programming stage, the current-row scan signal is a high voltage level, and the next-row scan signal is a low voltage level; in the drive stage, the current-row scan signal is a high voltage level, and the next-row scan signal is a high voltage level.

6. An active matrix organic light emitting display pixel driving method, comprising the following steps: step 1, providing an active matrix organic light emitting display pixel driving circuit; wherein the active matrix organic light emitting display pixel driving circuit comprises: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a first capacitor, a second capacitor and an organic light emitting diode, wherein all the respective first thin film transistor, second thin film transistor, third thin film transistor and fourth thin film transistor are P type thin film transistors; wherein the first thin film transistor is a drive thin film transistor, and a gate of the first thin film transistor is electrically coupled to a first end of the first capacitor through a first node, and a source of the first thin film transistor is electrically coupled to a power source positive voltage, and a drain of the first thin film transistor is electrically coupled to an anode of the organic light emitting diode; a gate of the second thin film transistor receives a current-row scan signal that corresponds to a current row where the pixel driving circuit is, and a source of the second thin film transistor receives a data signal, and a drain of the second thin film transistor is electrically coupled to a second end of the first capacitor through a second node; a gate of the third thin film transistor receives a next-row scan signal that corresponds to a next row that is next to the current row where the pixel driving circuit is, and a source of the third thin film transistor is electrically coupled to the second node, and a drain of the third thin film transistor is electrically coupled to a reference voltage; a gate of the fourth thin film transistor receives the current-row scan signal, and a source of the fourth thin film transistor is electrically coupled to the first node, and a drain of the fourth thin film transistor is electrically coupled to the anode of the organic light emitting diode; the first end of the first capacitor is electrically coupled to the first node, and the second end of the first capacitor is electrically coupled to the second node; a first end of the second capacitor is electrically coupled to the first node, and a second end of the second capacitor is electrically coupled to the power source positive voltage; and the anode of the organic light emitting diode is electrically coupled to the drain of the first thin film transistor and the drain of the fourth thin film transistor, and a cathode of the organic light emitting diode is electrically coupled to a power source negative voltage; step 2, entering a threshold voltage sensing stage; wherein the current-row scan signal provides a low voltage level, so that the second thin film transistor and the fourth thin film transistor are activated, and the next-row scan signal provides a high voltage level, so that the third thin film transistor is deactivated; the data signal is transmitted to the second node, and the first capacitor and the second capacitor start to be charged, and a voltage of the first node, which corresponds to a gate voltage of the first thin film transistor, is Vg=VDDf(Vth), where VDD represents the power source positive voltage, and Vth represents the threshold voltage of the first thin film transistor, and f(Vth) is a function related with Vth, which represents an anode voltage of the organic light emitting diode as the first thin film transistor, the fourth thin film transistor and the organic light emitting diode reach a current balance; step 3, entering a holding stage; wherein the current-row scan signal provides a high voltage level, so that the second thin film transistor and the fourth thin film transistor are deactivated, and the next-row scan signal provides a high voltage level, so that the third thin film transistor is deactivated, and the first capacitor and the second capacitor start discharging and coupling with each other, and the voltage of the first node, which corresponds to the gate voltage of the first thin film transistor, becomes Vg=VDDf(Vth)+V1, where V1 represents a first voltage variation value caused by the coupling of the first capacitor and the second capacitor with each other; step 4, entering a programming stage; wherein the current-row scan signal provides a high voltage level, so that the second thin film transistor and the fourth thin film transistor are deactivated, and the next-row scan signal provides a high voltage level, so that the third thin film transistor is deactivated, and the reference voltage is transmitted to the second node, and the voltage of the first node, which corresponds to the gate voltage of the first thin film transistor, becomes Vg=VDDf(Vth)+V1+VrefVdata, where Vref represents the reference voltage, and Vdata represents the data signal voltage; and step 5, entering a drive stage; wherein the current-row scan signal provides a high voltage level, so that the second thin film transistor and the fourth thin film transistor are deactivated, and the next-row scan signal provides a high voltage level, so that the third thin film transistor is deactivated, and the first capacitor and the second capacitor discharge again and couple with each other, and the voltage of the first node, which corresponds to the gate voltage of the first thin film transistor, becomes Vg=VDDf(Vth)+V1+VrefVdata+V2, where V2 represents a second voltage variation value caused by the coupling of the first capacitor and the second capacitor with each other; and the organic light emitting diode emits light; wherein the drain of the second thin film transistor and the source of the third thin film transistor are both electrically shorted to the second end of the first capacitor and wherein the second thin film transistor and the third thin film transistor are respectively controlled by the current-row scan signal and the next-row scan signal to supply the data signal and the reference voltage to the second end of the first capacitor at different time periods that are separated by a time interval therebetween.

7. The active matrix organic light emitting display pixel driving method according to claim 6, wherein the reference voltage is a constant voltage.

8. The active matrix organic light emitting display pixel driving method according to claim 6, wherein all of the first thin film transistor, the second thin film transistor, the third thin film transistor and the fourth thin film transistor are Low Temperature Poly-silicon thin film transistors, oxide semiconductor thin film transistors or amorphous silicon thin film transistors.

9. An active matrix organic light emitting display pixel driving circuit, comprising: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a first capacitor, a second capacitor and an organic light emitting diode, wherein all the respective first thin film transistor, second thin film transistor, third thin film transistor and fourth thin film transistor are P type thin film transistors; wherein the first thin film transistor is a drive thin film transistor, and a gate of the first thin film transistor is electrically coupled to a first end of the first capacitor through a first node, and a source of the first thin film transistor is electrically coupled to a power source positive voltage, and a drain of the first thin film transistor is electrically coupled to an anode of the organic light emitting diode; a gate of the second thin film transistor receives a current-row scan signal that corresponds to a current row where the pixel driving circuit is located, and a source of the second thin film transistor receives a data signal, and a drain of the second thin film transistor is electrically coupled to a second end of the first capacitor through a second node; a gate of the third thin film transistor receives a next-row scan signal that corresponds to a next row that is next to the current row where the pixel driving circuit is, and a source of the third thin film transistor is electrically coupled to the second node, and a drain of the third thin film transistor is electrically coupled to a reference voltage; a gate of the fourth thin film transistor receives the current-row scan signal, and a source of the fourth thin film transistor is electrically coupled to the first node, and a drain of the fourth thin film transistor is electrically coupled to the anode of the organic light emitting diode; the first end of the first capacitor is electrically coupled to the first node, and the second end of the first capacitor is electrically coupled to the second node; a first end of the second capacitor is electrically coupled to the first node, and a second end of the second capacitor is electrically coupled to the power source positive voltage; and the anode of the organic light emitting diode is electrically coupled to the drain of the first thin film transistor and the drain of the fourth thin film transistor, and a cathode of the organic light emitting diode is electrically coupled to a power source negative voltage; wherein the drain of the second thin film transistor and the source of the third thin film transistor are both electrically shorted to the second end of the first capacitor and wherein the second thin film transistor and the third thin film transistor are respectively controlled by the current-row scan signal and the next-row scan signal to supply the data signal and the reference voltage to the second end of the first capacitor at different time periods that are separated by a time interval therebetween; wherein the reference voltage is a constant voltage; wherein all of the first thin film transistor, the second thin film transistor, the third thin film transistor and the fourth thin film transistor are Low Temperature Poly-silicon thin film transistors, oxide semiconductor thin film transistors or amorphous silicon thin film transistors.

10. The active matrix organic light emitting display pixel driving circuit according to claim 9, wherein the current-row scan signal and the next-row scan signal are each a pulse signal having a falling edge and a rising edge, and the falling edge of the next-row scan signal is later than the rising edge of the current-row scan signal.

11. The active matrix organic light emitting display pixel driving circuit according to claim 10, wherein the current-row scan signal and the next-row scan signal are combined with each other to provide a threshold voltage sensing stage, a holding stage, a programming stage and a drive stage one after another; in the threshold voltage sensing stage, the current-row scan signal is a low voltage level, and the next-row scan signal is a high voltage level; in the holding stage, the current-row scan signal is a high voltage level, and the next-row scan signal is a high voltage level; in the programming stage, the current-row scan signal is a high voltage level, and the next-row scan signal is a low voltage level; in the drive stage, the current-row scan signal is a high voltage level, and the next-row scan signal is a high voltage level.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In order to better understand the characteristics and technical aspect of the invention, please refer to the following detailed description of the present invention is concerned with the diagrams, however, provide reference to the accompanying drawings and description only and is not intended to be limiting of the invention.

(2) In drawings,

(3) FIG. 1 is a circuit diagram of an AMOLED pixel driving circuit utilizing the 5T2C structure according to prior art;

(4) FIG. 2 is a sequence diagram of the AMOLED pixel driving circuit shown in FIG. 1;

(5) FIG. 3 is a diagram of the AMOLED pixel driving circuit shown in FIG. 1 in an initializing stage;

(6) FIG. 4 is a diagram of the AMOLED pixel driving circuit shown in FIG. 1 in a sampling stage;

(7) FIG. 5 is a diagram of the AMOLED pixel driving circuit shown in FIG. 1 in a holding stage;

(8) FIG. 6 is a diagram of the AMOLED pixel driving circuit shown in FIG. 1 in a drive stage;

(9) FIG. 7 is a circuit diagram of an AMOLED pixel driving circuit according to present invention;

(10) FIG. 8 is a sequence diagram of an AMOLED pixel driving circuit according to the present invention;

(11) FIG. 9 is a circuit diagram of an AMOLED pixel driving circuit in a threshold voltage sensing stage, and also a circuit diagram of the step 2 in the AMOLED pixel driving method according to the present invention;

(12) FIG. 10 is a circuit diagram of an AMOLED pixel driving circuit in a holding stage, and also a circuit diagram of the step 3 in the AMOLED pixel driving method according to the present invention;

(13) FIG. 11 is a circuit diagram of an AMOLED pixel driving circuit in a programming stage, and also a circuit diagram of the step 4 in the AMOLED pixel driving method according to the present invention;

(14) FIG. 12 is a circuit diagram of an AMOLED pixel driving circuit in a drive stage, and also a circuit diagram of the step 5 in the AMOLED pixel driving method according to the present invention;

(15) FIG. 13 is a result diagram that the AMOLED pixel driving method according to the present invention compensates the threshold voltage of the drive thin film transistor.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

(16) For better explaining the technical solution and the effect of the present invention, the present invention will be further described in detail with the accompanying drawings and the specific embodiments.

(17) Please refer to FIG. 7 and FIG. 8, together. The present invention first provides an AMOLED pixel driving circuit. The AMOLED pixel driving circuit is the 4T2C structure, and comprises: a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a first capacitor C1, a second capacitor C2 and an organic light emitting diode D1. All the respective thin film transistors are P type thin film transistors.

(18) the first thin film transistor T1 is a drive thin film transistor, and a gate thereof is electrically coupled to one end of the first capacitor C1 through a first node A, and a source is electrically coupled to a power source positive voltage VDD, and a drain is electrically coupled to an anode of the organic light emitting diode D1; a gate of the second thin film transistor T2 receives a nth scan signal SCAN(n) corresponded with a row where the pixel driving circuit is, and a source receives a data signal data, and a drain is electrically coupled to the other end of the first capacitor C1 through a second node B; a gate of the third thin film transistor T3 receives a n+1th scan signal SCAN(n+1) corresponded with a next row of the row where the pixel driving circuit is, and a source is electrically coupled to the second node B, and a drain is electrically coupled to a reference voltage Vref; a gate of the fourth thin film transistor T4 receives the nth scan signal SCAN(n) corresponded with the row where the pixel driving circuit is, and a source is electrically coupled to the first node A, and a drain is electrically coupled to the anode of the organic light emitting diode D1; the one end of the first capacitor C1 is electrically coupled to the first node A, and the other end is electrically coupled to the second node B; one end of the second capacitor C2 is electrically coupled to the first node A, and the other end is electrically coupled to the power source positive voltage VDD; the anode of the organic light emitting diode D1 is electrically coupled to the drain of the first thin film transistor T1 and the drain of the fourth thin film transistor T4, and a cathode is electrically coupled to a power source negative voltage VSS.

(19) Specifically, all of the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4 are Low Temperature Poly-silicon thin film transistors, oxide semiconductor thin film transistors or amorphous silicon thin film transistors.

(20) As shown in FIG. 8, the reference voltage Vref is a constant voltage; n is set to be a positive integer, and the nth scan signal SCAN(n) and the n+1th scan signal SCAN(n+1) are scan signals which are successively outputted by the same sequencer according to the order, and the pixel driving circuit of the nth row is cascade coupled to the pixel driving circuit of the n+1th row, and the nth scan signal SCAN(n) starts the scan to the pixel driving circuit of the nth row, and the n+1th scan signal SCAN(n+1) starts the scan to the pixel driving circuit of the n+1th row.

(21) The scan signal is a pulse signal but significantly, being different from prior art, in which the falling edge of the n+1th scan signal SCAN(n+1) is generally set to be generated at the same time with the rising edge of the nth scan signal SCAN(n), a falling edge of the n+1th scan signal SCAN(n+1) is later than a rising edge of the nth scan signal SCAN(n) in the present invention, and the two are combined with each other to control the pixel driving circuit, and correspond to a threshold voltage sensing stage 1, a holding stage 2, a programming stage 3 and a drive stage 4 one after another.

(22) Furthermore, with combination of FIG. 8 and FIG. 9, in the threshold voltage sensing stage 1, the nth scan signal SCAN(n) is low voltage level, and the second thin film transistor T2 and the fourth thin film transistor T4 controlled by the nth scan signal SCAN(n) are activated, and the n+1th scan signal SCAN(n+1) is high voltage level, and third thin film transistor T3 controlled by the n+1th scan signal SCAN(n+1) is deactivated; the data signal data is transmitted to the second node B through the second thin film transistor T2 to make the voltage of the second node B to be the data signal voltage Vdata; the first capacitor C1 and the second capacitor C2 start to be charged, and because the fourth thin film transistor T4 is activated, the voltage of the first node A, i.e. the gate voltage Vg of the first thin film transistor T1 is:
Vg=VDDf(Vth)(1)

(23) wherein VDD represents the power source positive voltage, and Vth represents the threshold voltage of the drive thin film transistor, i.e. the first thin film transistor T1, and f(Vth) is the function related with Vth, which represents the anode voltage of the organic light emitting diode D1 as the first thin film transistor T1, the fourth thin film transistor T4 and the organic light emitting diode D1 reach the current balance;

(24) the source voltage of the first thin film transistor T1 is Vs=VDD.

(25) With combination of FIG. 8 and FIG. 10, in the holding stage 2, the nth scan signal SCAN(n) is changed to be high voltage level, and the second thin film transistor T2 and the fourth thin film transistor T4 are deactivated, and the n+1th scan signal SCAN(n+1) provides high voltage level, and third thin film transistor T3 is deactivated, and the first capacitor C1 and the second capacitor C2 start discharging and coupling with each other, and the voltage of the first node A, i.e. the gate voltage of the first thin film transistor T1 is:
Vg=VDDf(Vth)+V1(2)

(26) wherein V1 represents the first voltage variation value caused by the coupling function of the first capacitor C1 and the second capacitor C2;

(27) the source voltage of the first thin film transistor T1 is Vs=VDD;

(28) the voltage of the second node B at the other end of the first capacitor C1 correspondingly changes with V1 along with the first node A.

(29) With combination of FIG. 8 and FIG. 11, in the programming stage 3, the nth scan signal SCAN(n) remains to be high voltage level, and the second thin film transistor T2 and the fourth thin film transistor T4 are deactivated, and the n+1th scan signal SCAN(n+1) is changed to be low voltage level, and third thin film transistor T3 is deactivated, and the reference voltage Vref is transmitted to the second node B through the third thin film transistor T3, and the voltage of the first node A at one end of the first capacitor C1, i.e. the gate voltage of the first thin film transistor T1 is:
Vg=VDDf(Vth)+V1+VrefVdata(3)

(30) wherein Vref represents the reference voltage, and Vdata represents the data signal voltage;

(31) the source voltage of the first thin film transistor T1 is Vs=VDD.

(32) With combination of FIG. 8 and FIG. 12, in the drive stage 4, the nth scan signal SCAN(n) remains to be high voltage level, and the second thin film transistor T2 and the fourth thin film transistor T4 are deactivated, and the n+1th scan signal SCAN(n+1) is changed to be high voltage level, and third thin film transistor T3 is deactivated, and the first capacitor C1 and the second capacitor C2 discharge again and couple with each other, and the voltage of the first node A, i.e. the gate voltage of the first thin film transistor T1 is:
Vg=VDDf(Vth)+V1+VrefVdata+V2(4)

(33) wherein V2 represents the second voltage variation value caused by the coupling function of the first capacitor C1 and the second capacitor C2;

(34) the source voltage of the first thin film transistor T1 is:
Vs=VDD(5)

(35) the voltage of the second node B at the other end of the first capacitor C1 correspondingly changes with V2 along with the first node A;

(36) the organic light emitting diode D1 emits light.

(37) Furthermore, as known, the formula of calculating the current flowing through the organic light emitting diode as the drive thin film transistor is a P type thin film transistor is:
I.sub.OLED=Cox(W/L)(Vgs+Vth).sup.2(6)

(38) wherein I.sub.OLED is the current of the organic light emitting diode D1, is the carrier mobility of the drive thin film transistor, i.e. the first thin film transistor T1, and W and L respectively are the width and the length of the channel of the drive thin film transistor, i.e. the first thin film transistor T1, and Vgs is the gate-source voltage of the drive thin film transistor, i.e. the first thin film transistor T1, and Vth is the threshold voltage of the drive thin film transistor, i.e. the first thin film transistor T1.

(39) $\begin{array}{cc}\begin{array}{c}\mathrm{Vgs}=\mathrm{Vg}-\mathrm{Vs}\\ =\mathrm{VDD}-f\left(\mathrm{Vth}\right)+V1+\mathrm{Vref}-\\ \mathrm{Vdata}+V2-\mathrm{VDD}\\ =V1+\mathrm{Vref}-\mathrm{Vdata}+V2-f\left(\mathrm{Vth}\right)\end{array}& \left(7\right)\end{array}$

(40) The formula (7) is substituted into the formula (6) to obtain:
I.sub.OLED=Cox(W/L)(V1+VrefVdata+V2+Vthf(Vth)).sup.2(8)

(41) As shown in FIG. 13, because f(Vth) cancels out a part of Vth, the influence of the threshold voltage Vth of the first thin film transistor T1 to the current of the organic light emitting diode D1 is smaller to achieve the compensation function.

(42) In comparison with the AMOLED pixel driving circuit of 5T2C structure in prior shown in FIG. 1, the AMOLED pixel driving circuit of the present invention eliminates the thin film transistor, which is coupled between the drive thin film transistor and the anode of the organic light emitting diode, and the nth scan signal SCAN(n) is in charge of controlling the second thin film transistor T2 and the fourth thin film transistor T4, and the n+1th scan signal SCAN(n+1) is in charge of controlling the third thin film transistor T3. The corresponding thin film transistor is controlled merely with arranging the scan signal. There will be the compensation function, and the amount of the control signals can be decreased, and the circuit structure is simplified and the cost is decreased.

(43) On the basis of the same inventive idea, the present invention further provides a AMOLED pixel driving method, comprising steps of:

(44) step 1, providing an AMOLED pixel driving circuit.

(45) As shown in FIG. 7, the AMOLED pixel driving circuit comprises: a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a first capacitor C1, a second capacitor C2 and an organic light emitting diode D1. All the respective thin film transistors are P type thin film transistors.

(46) the first thin film transistor T1 is a drive thin film transistor, and a gate thereof is electrically coupled to one end of the first capacitor C1 through a first node A, and a source is electrically coupled to a power source positive voltage VDD, and a drain is electrically coupled to an anode of the organic light emitting diode D1; a gate of the second thin film transistor T2 receives a nth scan signal SCAN(n) corresponded with a row where the pixel driving circuit is, and a source receives a data signal data, and a drain is electrically coupled to the other end of the first capacitor C1 through a second node B; a gate of the third thin film transistor T3 receives a n+1th scan signal SCAN(n+1) corresponded with a next row of the row where the pixel driving circuit is, and a source is electrically coupled to the second node B, and a drain is electrically coupled to a reference voltage Vref; a gate of the fourth thin film transistor T4 receives the nth scan signal SCAN(n) corresponded with the row where the pixel driving circuit is, and a source is electrically coupled to the first node A, and a drain is electrically coupled to the anode of the organic light emitting diode D1; the one end of the first capacitor C1 is electrically coupled to the first node A, and the other end is electrically coupled to the second node B; one end of the second capacitor C2 is electrically coupled to the first node A, and the other end is electrically coupled to the power source positive voltage VDD; the anode of the organic light emitting diode D1 is electrically coupled to the drain of the first thin film transistor T1 and the drain of the fourth thin film transistor T4, and a cathode is electrically coupled to a power source negative voltage VSS.

(47) Specifically, all of the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4 are Low Temperature Poly-silicon thin film transistors, oxide semiconductor thin film transistors or amorphous silicon thin film transistors.

(48) As shown in FIG. 8, the reference voltage Vref is a constant voltage; n is set to be a positive integer, and the nth scan signal SCAN(n) and the n+1th scan signal SCAN(n+1) are scan signals which are successively outputted by the same sequencer according to the order, and the pixel driving circuit of the nth row is cascade coupled to the pixel driving circuit of the n+1th row, and the nth scan signal SCAN(n) starts the scan to the pixel driving circuit of the nth row, and the n+1th scan signal SCAN(n+1) starts the scan to the pixel driving circuit of the n+1th row.

(49) The scan signal is a pulse signal but significantly, being different from prior art, in which the falling edge of the n+1th scan signal SCAN(n+1) is generally set to be generated at the same time with the rising edge of the nth scan signal SCAN(n), a falling edge of the n+1th scan signal SCAN(n+1) is later than a rising edge of the nth scan signal SCAN(n) in the present invention.

(50) step 2, entering a threshold voltage sensing stage 1.

(51) With combination of FIG. 8 and FIG. 9, the nth scan signal SCAN(n) provides low voltage level, and the second thin film transistor T2 and the fourth thin film transistor T4 controlled by the nth scan signal SCAN(n) are activated, and the n+1th scan signal SCAN(n+1) provides high voltage level, and third thin film transistor T3 controlled by the n+1th scan signal SCAN(n+1) is deactivated; the data signal data is transmitted to the second node B through the second thin film transistor T2 to make the voltage of the second node B to be the data signal voltage Vdata; the first capacitor C1 and the second capacitor C2 start to be charged, and because the fourth thin film transistor T4 is activated, the voltage of the first node A, i.e. the gate voltage Vg of the first thin film transistor T1 is:
Vg=VDDf(Vth)(1)

(52) wherein VDD represents the power source positive voltage, and Vth represents the threshold voltage of the drive thin film transistor, i.e. the first thin film transistor T1, and f(Vth) is the function related with Vth, which represents the anode voltage of the organic light emitting diode D1 as the first thin film transistor T1, the fourth thin film transistor T4 and the organic light emitting diode D1 reach the current balance;

(53) the source voltage of the first thin film transistor T1 is Vs=VDD.

(54) step 3, entering a holding stage 2.

(55) With combination of FIG. 8 and FIG. 10, the nth scan signal SCAN(n) provides high voltage level, and the second thin film transistor T2 and the fourth thin film transistor T4 are deactivated, and the n+1th scan signal SCAN(n+1) provides high voltage level, and third thin film transistor T3 is deactivated, and the first capacitor C1 and the second capacitor C2 start discharging and coupling with each other, and the voltage of the first node A, i.e. the gate voltage of the first thin film transistor T1 is:
Vg=VDDf(Vth)+V1(2)

(56) wherein V1 represents the first voltage variation value caused by the coupling function of the first capacitor C1 and the second capacitor C2;

(57) the source voltage of the first thin film transistor T1 is Vs=VDD;

(58) the voltage of the second node B at the other end of the first capacitor C1 correspondingly changes with V1 along with the first node A.

(59) step 4, entering a programming stage 3.

(60) With combination of FIG. 8 and FIG. 11, the nth scan signal SCAN(n) provides high voltage level, and the second thin film transistor T2 and the fourth thin film transistor T4 are deactivated, and the n+1th scan signal SCAN(n+1) provides high voltage level, and third thin film transistor T3 is deactivated, and the reference voltage Vref is transmitted to the second node B through the third thin film transistor T3, and the voltage of the first node A at one end of the first capacitor C1, i.e. the gate voltage of the first thin film transistor T1 is:
Vg=VDDf(Vth)+V1+VrefVdata(3)

(61) wherein Vref represents the reference voltage, and Vdata represents the data signal voltage;

(62) the source voltage of the first thin film transistor T1 is Vs=VDD.

(63) step 5, entering a drive stage 4.

(64) With combination of FIG. 8 and FIG. 12, the nth scan signal SCAN(n) provides high voltage level, and the second thin film transistor T2 and the fourth thin film transistor T4 are deactivated, and the n+1th scan signal SCAN(n+1) provides high voltage level, and third thin film transistor T3 is deactivated, and the first capacitor C1 and the second capacitor C2 discharge again and couple with each other, and the voltage of the first node A, i.e. the gate voltage of the first thin film transistor T1 is:
Vg=VDDf(Vth)+V1+VrefVdata+V2(4)

(65) wherein V2 represents the second voltage variation value caused by the coupling function of the first capacitor C1 and the second capacitor C2;

(66) the source voltage of the first thin film transistor T1 is:
Vs=VDD(5)

(67) the voltage of the second node B at the other end of the first capacitor C1 correspondingly changes with V2 along with the first node A;

(68) the organic light emitting diode D1 emits light.

(69) Furthermore, as known, the formula of calculating the current flowing through the organic light emitting diode as the drive thin film transistor is a P type thin film transistor is:
I.sub.OLED=Cox(W/L)(Vgs+Vth).sup.2(6)

(70) wherein I.sub.OLED is the current of the organic light emitting diode D1, is the carrier mobility of the drive thin film transistor, i.e. the first thin film transistor T1, and W and L respectively are the width and the length of the channel of the drive thin film transistor, i.e. the first thin film transistor T1, and Vgs is the gate-source voltage of the drive thin film transistor, i.e. the first thin film transistor T1, and Vth is the threshold voltage of the drive thin film transistor, i.e. the first thin film transistor T1.

(71) $\begin{array}{cc}\begin{array}{c}\mathrm{Vgs}=\mathrm{Vg}-\mathrm{Vs}\\ =\mathrm{VDD}-f\left(\mathrm{Vth}\right)+V1+\mathrm{Vref}-\\ \mathrm{Vdata}+V2-\mathrm{VDD}\\ =V1+\mathrm{Vref}-\mathrm{Vdata}+V2-f\left(\mathrm{Vth}\right)\end{array}& \left(7\right)\end{array}$

(72) The formula (7) is substituted into the formula (6) to obtain:
I.sub.OLED=Cox(W/L)(V1+VrefVdata+V2+Vthf(Vth)).sup.2(8)

(73) As shown in FIG. 13, because f(Vth) cancels out a part of Vth, the influence of the threshold voltage Vth of the first thin film transistor T1 to the current of the organic light emitting diode D1 in the step 5 is smaller to achieve the compensation function.

(74) The AMOLED pixel driving method of the present invention utilizes the pixel driving circuit of 4T2C structure. The nth scan signal SCAN(n) is utilized to control the second thin film transistor T2 and the fourth thin film transistor T4, and the n+1th scan signal SCAN(n+1) is utilized to replace the light emitting control signal EM in prior art to control the third thin film transistor T3. Namely, the corresponding thin film transistor is controlled merely with the scan signal. There will be the compensation function, and the amount of the control signals can be decreased, and the circuit structure is simplified and the cost is decreased.

(75) In conclusion, the present invention provides an AMOLED pixel driving circuit utilizing the 4T2C structure. In comparison with the pixel driving circuit of the 5T2C structure, the corresponding thin film transistor is controlled merely with arranging the scan signal. There will be the compensation function, and the amount of the control signals can be decreased, and the circuit structure is simplified and the cost is decreased. The present invention provides an AMOLED pixel driving circuit, in which the corresponding thin film transistor is controlled merely with the scan signal so that the amount of the control signals can be decreased, and the circuit structure is simplified and the cost is decreased.

(76) Above are only specific embodiments of the present invention, the scope of the present invention is not limited to this, and to any persons who are skilled in the art, change or replacement which is easily derived should be covered by the protected scope of the invention. Thus, the protected scope of the invention should go by the subject claims.