Abstract
An improved passivation structure for GaN field effect transistor comprising at least one dielectric layer formed on a top surface of a GaN field effect transistor and a passivation layer formed on a top surface of the dielectric layer. The GaN field effect transistor has a gate electrode comprising a Schottky contact metal layer, at least one diffusion barrier metal layer and a high conductivity metal layer. The passivation layer is made of a low cure temperature Polybenzoxazole (PBO) which can be cured at a low-temperature. Thereby the intermixing of the Schottky contact metal layer and the the diffusion barrier metal layer are prevented.
Claims
1. An improved passivation structure for GaN field effect transistor comprising: at least one dielectric layer formed on a top surface of a GaN field effect transistor, wherein said GaN field effect transistor is formed on a semiconductor substrate, wherein said GaN field effect transistor comprises a wide bandgap epitaxial layer and a gate electrode, wherein said gate electrode comprises a Schottky contact metal layer, at least one diffusion barrier metal layer and a high conductivity metal layer, wherein said wide bandgap epitaxial layer is formed on said semiconductor substrate, wherein said Schottky contact metal layer is formed on said wide bandgap epitaxial layer, wherein said at least one diffusion barrier metal layer is formed on said Schottky contact metal layer, wherein said high conductivity metal layer is formed on said at least one diffusion barrier metal layer, wherein each of said at least one diffusion barrier metal layer is made of at least one material selected from the group consisting of: Pd and TiW; and a passivation layer formed on a top surface of said at least one dielectric layer, wherein said passivation layer is made of a Polybenzoxazole (PBO); thereby said passivation layer is cured at greater than or equal to 200 C. and less than or equal to 290 C. for preventing intermixing of said Schottky contact metal layer and said at least one diffusion barrier metal layer.
2. (canceled)
3. The improved passivation structure for GaN field effect transistor according to claim 1, wherein said Polybenzoxazole has a dielectric constant greater than or equal to 2 and less than or equal to 4.
4. The improved passivation structure for GaN field effect transistor according to claim 1, wherein each of said at least one dielectric layer is made of at least one material selected from the group consisting of: AlOx, aluminium nitride, SiOy and silicon nitride, wherein said x is greater than or equal to 1 and less than or equal to 1.5, wherein said y is greater than or equal to 1 and less than or equal to 2.
5. The improved passivation structure for GaN field effect transistor according to claim 1, wherein said Schottky contact metal layer is made of Ni.
6. The improved passivation structure for GaN field effect transistor according to claim 1, wherein each of said at least one diffusion barrier metal layer is made of.
7. The improved passivation structure for GaN field effect transistor according to claim 1, wherein said high conductivity metal layer is made of at least one material selected from the group consisting of: Au, Al, and Cu.
8. The improved passivation structure for GaN field effect transistor according to claim 1, wherein said gate electrode further comprises an adhesion metal layer, wherein said adhesion metal layer is formed on said high conductivity metal layer.
9. The improved passivation structure for GaN field effect transistor according to claim 8, wherein said adhesion metal layer is made of at least one material selected from the group consisting of: Ti, TiW and TiN.
10. The improved passivation structure for GaN field effect transistor according to claim 1, wherein said semiconductor substrate is made of one material selected from the group consisting of: Si, SiC, Diamond, Sapphire and GaN.
11. The improved passivation structure for GaN field effect transistor according to claim 1, wherein each of said at least one dielectric layer has a thickness greater than or equal to 10 and less than or equal to 8000 .
12. The improved passivation structure for GaN field effect transistor according to claim 1, wherein said passivation layer has a thickness greater than or equal to 1 m and less than or equal to 10 m.
13. The improved passivation structure for GaN field effect transistor according to claim 1, wherein said wide bandgap epitaxial layer comprises a channel layer and a Schottky barrier layer, wherein said channel layer is formed on said semiconductor substrate, wherein said Schottky barrier layer is formed on said channel layer, wherein said Schottky contact metal layer is formed on said Schottky barrier layer.
14. The improved passivation structure for GaN field effect transistor according to claim 13, wherein said channel layer is made of GaN.
15. The improved passivation structure for GaN field effect transistor according to claim 13, wherein said Schottky barrier layer is made of at least one material selected from the group consisting of: AlGaN and GaN.
16. The improved passivation structure for GaN field effect transistor according to claim 13, wherein said Schottky barrier layer is made of at least one material selected from the group consisting of: AlGaN, GaN, InAlN and AlN.
17. The improved passivation structure for GaN field effect transistor according to claim 13, wherein said wide bandgap epitaxial layer further comprises a buffer layer, wherein said buffer layer is formed on said semiconductor substrate, said channel layer is formed on said buffer layer.
18. The improved passivation structure for GaN field effect transistor according to claim 17, wherein said buffer layer is made of GaN.
19. The improved passivation structure for GaN field effect transistor according to claim 17, wherein said wide bandgap epitaxial layer further comprises a cap layer, wherein said cap layer is formed on said Schottky barrier layer, said Schottky contact metal layer is formed on said cap layer.
20. The improved passivation structure for GaN field effect transistor according to claim 19, wherein said cap layer is made of at least one material selected from the group consisting of: GaN, AlGaN and AlN.
21. The improved passivation structure for GaN field effect transistor according to claim 13, wherein said wide bandgap epitaxial layer further comprises a cap layer, wherein said cap layer is formed on said Schottky barrier layer, said Schottky contact metal layer is formed on said cap layer.
22. The improved passivation structure for GaN field effect transistor according to claim 21, wherein said cap layer is made of at least one material selected from the group consisting of: GaN, AlGaN and AlN.
23. (canceled)
24. (canceled)
25. The improved passivation structure for GaN field effect transistor according to claim 1, wherein one of said at least one dielectric layer is made of silicon nitride with a thickness greater than or equal to 10 and less than or equal to 8000 .
Description
BRIEF DESCRIPTION OF DRAWINGS
[0030] FIG. 1 is a sectional schematic view of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0031] FIG. 2 is a sectional schematic view of another embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0032] FIG. 3 is a sectional schematic view of one embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0033] FIG. 4 is a sectional schematic view of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0034] FIG. 5 is a sectional schematic view of another embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0035] FIG. 6 is a sectional schematic view of one embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0036] FIG. 7 is a sectional schematic view of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0037] FIG. 8 is a sectional schematic view of another embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0038] FIG. 9 is a sectional schematic view of one embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0039] FIG. 10 is a sectional schematic view of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0040] FIG. 11 is a sectional schematic view of another embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0041] FIG. 12 is a sectional schematic view of one embodiment of an improved passivation structure for GaN field effect transistor of the present invention.
[0042] FIG. 13A is a sectional schematic view of one embodiment of another improved passivation structure for GaN field effect transistor of the present invention.
[0043] FIG. 13B is a sectional schematic view of another embodiment of another improved passivation structure for GaN field effect transistor of the present invention.
[0044] FIG. 14 is a diagram showing the comparison of the turn on voltage (Von) of the forward diode of the transistor of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer and the turn on voltage (Von) of an embodiment of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer.
[0045] FIG. 15 is a diagram showing the comparison of the drain leakage current of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer and the drain leakage current of an embodiment of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer.
[0046] FIG. 16 is a diagram showing the comparison of the gate leakage current of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer and the gate leakage current of an embodiment of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer.
[0047] FIG. 17 is a sectional schematic view of an embodiment of a passivation structure for GaN field effect transistor of conventional technology.
[0048] FIG. 18A is a SEM image of an embodiment of a gate electrode of a conventional GaN field effect transistor with no passivation structure before bake at 300 C.
[0049] FIG. 18B is a SEM image of an embodiment of a gate electrode of a conventional GaN field effect transistor with no passivation structure after bake at 300 C. for 6 hours.
DETAILED DESCRIPTIONS OF PREFERRED EMBODIMENTS
[0050] Please refer to FIG. 1, which is a sectional schematic view of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention. In the embodiment of FIG. 1, two GaN field effect transistors 1 are formed on a semiconductor substrate 10. The main structure of the two GaN field effect transistors 1 comprises: a wide bandgap epitaxial layer 20, two source electrodes 30, a drain electrode 40, two gate electrodes 50 and an isolated layer 90. The wide bandgap epitaxial layer 20 is formed on the semiconductor substrate 10. The semiconductor substrate 10 is made of one material selected from the group consisting of: Si, SiC, Diamond, Sapphire and GaN. The wide bandgap epitaxial layer 20 comprises a channel layer 22 and a Schottky barrier layer 23. The channel layer 22 is formed on the semiconductor substrate 10. The Schottky barrier layer 23 is formed on the channel layer 22. The channel layer 22 is made of GaN. The Schottky barrier layer 23 is made of at least one material selected from the group consisting of: AlGaN and GaN. The isolated layer 90 is formed on a top surface of the wide bandgap epitaxial layer 20. The isolated layer 90 is made of dielectric material. Two gate dielectric vias 91 are etched such that a bottom of each of the two gate dielectric vias 91 is defined by the top surface of the wide bandgap epitaxial layer 20. The two gate electrodes 50 are formed on the top surface of the wide bandgap epitaxial layer 20 within the two gate dielectric vias 91 respectively. Each of the two gate electrodes 50 comprises a Schottky contact metal layer 51, at least one diffusion barrier metal layer 52 and a high conductivity metal layer 53. The Schottky contact metal layer 51 is formed on the top surface of the wide bandgap epitaxial layer 20. The at least one diffusion barrier metal layer 52 is formed on the Schottky contact metal layer 51. The high conductivity metal layer 53 is formed on the at least one diffusion barrier metal layer 52. Each of the Schottky contact metal layer 51 of the two gate electrodes 50 and the Schottky barrier layer 23 of the wide bandgap epitaxial layer 20 form a Schottky contact. The Schottky contact metal layer 51 is made of Ni. Each of the at least one diffusion barrier metal layer 52 is made of at least one material selected from the group consisting of: Pt, Pd, Ta, W, TiW and Mo. The high conductivity metal layer 53 is made of at least one material selected from the group consisting of: Au, Al, and Cu. A drain dielectric via 41 is etched such that a bottom of the drain dielectric via 41 is defined by the top surface of the wide bandgap epitaxial layer 20. The drain electrode 40 is formed on the top surface of the wide bandgap epitaxial layer 20 within the drain dielectric via 41 and located between the two gate electrodes 50. The drain electrode 40 and the Schottky barrier layer 23 of the wide bandgap epitaxial layer 20 form an ohmic contact. Two source dielectric vias 31 are etched such that a bottom of each of the two source dielectric vias 31 is defined by the top surface of the wide bandgap epitaxial layer 20. The two source electrodes 30 are formed on the top surface of the wide bandgap epitaxial layer 20 within the two source dielectric vias 31 respectively such that the one of the two gate electrodes 50 is located between the drain electrode 40 and one of the two source electrodes 30, while the other one of the two gate electrodes 50 is located between the drain electrode 40 and the other one of the two source electrodes 30. Each of the two source electrodes 30 and the Schottky barrier layer 23 of the wide bandgap epitaxial layer 20 form an ohmic contact. The two GaN field effect transistors 1 further comprise two via holes 70 and a backside metal layer 80. Each of the two via holes 70 penetrates the semiconductor substrate 10. Each via hole 70 has an inner surface. A top of the inner surface the via hole 70 is defined by the source electrode 30. The backside metal layer 80 is formed on a bottom surface of the semiconductor substrate 10 and the inner surface of each of the two via holes 70 such that the backside metal layer 80 and the two source electrodes 30 are electrically contacted respectively at the top of the inner surface of each of the two via holes 70. The improved passivation structure 6 for GaN field effect transistor 1 of the present invention comprises at least one dielectric layer 60 and a passivation layer 61. The at least one dielectric layer 60 is formed on a top surface of the GaN field effect transistors 1 and the top surface of the wide bandgap epitaxial layer 20. The passivation layer 61 is formed on a top surface of the at least one dielectric layer 60. In current embodiment, the at least one dielectric layer 60 comprises a dielectric layer 601. The dielectric layer 601 is made of at least one material selected from the group consisting of: AlOx, aluminium nitride, SiOy and silicon nitride, wherein the x is greater than or equal to 1 and less than or equal to 1.5, wherein the y is greater than or equal to 1 and less than or equal to 2. The dielectric layer 601 has a thickness greater than or equal to 10 and less than or equal to 8000 . The passivation layer 61 is made of a low cure temperature Polybenzoxazole (PBO), thereby the passivation layer 61 is cured at a low-temperature for preventing intermixing of the Schottky contact metal layer 51 and the at least one diffusion barrier metal layer 52. The passivation layer 61 is cured at greater than or equal to 200 C. and less than or equal to 290 C. The low cure temperature Polybenzoxazole has a dielectric constant greater than or equal to 2 and less than or equal to 4. The passivation layer 61 has a thickness greater than or equal to 1 m and less than or equal to 10 m.
[0051] In some embodiments, the Schottky barrier layer 23 is made of at least one material selected from the group consisting of: AlGaN, GaN, InAlN and AlN.
[0052] In some embodiments, one of the at least one dielectric layer 60 is made of silicon nitride with a thickness greater than or equal to 10 and less than or equal to 8000 .
[0053] In some embodiments, the passivation layer 61 is cured at greater than or equal to 200 C. and less than or equal to 285 C., greater than or equal to 200 C. and less than or equal to 280 C., greater than or equal to 200 C. and less than or equal to 275 C., greater than or equal to 200 C. and less than or equal to 270 C., greater than or equal to 200 C. and less than or equal to 265 C., greater than or equal to 205 C. and less than or equal to 290 C., greater than or equal to 210 C. and less than or equal to 290 C., greater than or equal to 215 C. and less than or equal to 290 C., greater than or equal to 220 C. and less than or equal to 290 C., or greater than or equal to 225 C. and less than or equal to 290 C.
[0054] In some embodiments, the low cure temperature Polybenzoxazole has a dielectric constant greater than or equal to 2 and less than or equal to 3.8, greater than or equal to 2 and less than or equal to 3.6, greater than or equal to 2 and less than or equal to 3.4, greater than or equal to 2 and less than or equal to 3.2, greater than or equal to 2 and less than or equal to 3.1, greater than or equal to 2.2 and less than or equal to 4, greater than or equal to 2.4 and less than or equal to 4, greater than or equal to 2.6 and less than or equal to 4, greater than or equal to 2.8 and less than or equal to 4, or greater than or equal to 2.9 and less than or equal to 4.
[0055] In some embodiments, the dielectric layer 601 has a thickness greater than or equal to 10 and less than or equal to 7500 , greater than or equal to 10 and less than or equal to 7000 , greater than or equal to 10 and less than or equal to 6500 , greater than or equal to 10 and less than or equal to 6000 , greater than or equal to 10 and less than or equal to 5500 , greater than or equal to 10 and less than or equal to 5000 , greater than or equal to 30 and less than or equal to 8000 , greater than or equal to 50 and less than or equal to 8000 , greater than or equal to 80 and less than or equal to 8000 , greater than or equal to 100 and less than or equal to 8000 , greater than or equal to 200 and less than or equal to 8000 , greater than or equal to 300 and less than or equal to 8000 , greater than or equal to 400 and less than or equal to 8000 , greater than or equal to 500 and less than or equal to 8000 , or greater than or equal to 700 and less than or equal to 8000 .
[0056] In some embodiments, the passivation layer 61 has a thickness greater than or equal to 1 m and less than or equal to 9.5 m, greater than or equal to 1 m and less than or equal to 9 m, greater than or equal to 1 m and less than or equal to 8.5 m, greater than or equal to 1 m and less than or equal to 8 m, greater than or equal to 1 m and less than or equal to 7.5 m, greater than or equal to 1 m and less than or equal to 7 m, greater than or equal to 1.5 m and less than or equal to 10 m, greater than or equal to 2 m and less than or equal to 10 m, greater than or equal to 2.5 m and less than or equal to 10 m, greater than or equal to 3 m and less than or equal to 10 m, greater than or equal to 3.5 m and less than or equal to 10 m, or greater than or equal to 4 m and less than or equal to 10 m.
[0057] Please refer to FIG. 2, which is a sectional schematic view of another embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 2 is basically the same as the structure of the embodiment of FIG. 1, except that the at least one dielectric layer 60 further comprises a dielectric layer 609. The dielectric layer 609 is formed on the dielectric layer 601. The passivation layer 61 is formed on the dielectric layer 609. The dielectric layer 609 is made of at least one material selected from the group consisting of: AlOx, aluminium nitride, SiOy and silicon nitride, wherein the x is greater than or equal to 1 and less than or equal to 1.5, wherein the y is greater than or equal to 1 and less than or equal to 2. The dielectric layer 609 has a thickness greater than or equal to 10 and less than or equal to 8000 .
[0058] In some embodiments, the dielectric layer 609 has a thickness greater than or equal to 10 and less than or equal to 7500 , greater than or equal to 10 and less than or equal to 7000 , greater than or equal to 10 and less than or equal to 6500 , greater than or equal to 10 and less than or equal to 6000 , greater than or equal to 10 and less than or equal to 5500 , greater than or equal to 10 and less than or equal to 5000 , greater than or equal to 30 and less than or equal to 8000 , greater than or equal to 50 and less than or equal to 8000 , greater than or equal to 80 and less than or equal to 8000 , greater than or equal to 100 and less than or equal to 8000 , greater than or equal to 200 and less than or equal to 8000 , greater than or equal to 300 and less than or equal to 8000 , greater than or equal to 400 and less than or equal to 8000 , greater than or equal to 500 and less than or equal to 8000 , or greater than or equal to 700 and less than or equal to 8000 .
[0059] Please refer to FIG. 3, which is a sectional schematic view of one embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 3 is basically the same as the structure of the embodiment of FIG. 2, except that the at least one dielectric layer 60 further comprises one or more dielectric layer(s) between the dielectric layer 601 and the dielectric layer 609. Each of the one or more dielectric layer(s) is made of at least one material selected from the group consisting of: AlOx, aluminium nitride, SiOy and silicon nitride, wherein the x is greater than or equal to 1 and less than or equal to 1.5, wherein the y is greater than or equal to 1 and less than or equal to 2. Each of the one or more dielectric layer(s) has a thickness greater than or equal to 10 and less than or equal to 8000 . In some embodiments, each a Schottky contact metal layer, at least one diffusion barrier metal layer and a high conductivity metal layer has a thickness greater than or equal to 10 and less than or equal to 7500 , greater than or equal to 10 and less than or equal to 7000 , greater than or equal to 10 and less than or equal to 6500 , greater than or equal to 10 and less than or equal to 6000 , greater than or equal to 10 and less than or equal to 5500 , greater than or equal to 10 and less than or equal to 5000 , greater than or equal to 30 and less than or equal to 8000 , greater than or equal to 50 and less than or equal to 8000 , greater than or equal to 80 and less than or equal to 8000 , greater than or equal to 100 and less than or equal to 8000 , greater than or equal to 200 and less than or equal to 8000 , greater than or equal to 300 and less than or equal to 8000 , greater than or equal to 400 and less than or equal to 8000 , greater than or equal to 500 and less than or equal to 8000 , or greater than or equal to 700 and less than or equal to 8000 .
[0060] Please refer to FIG. 4, which is a sectional schematic view of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 4 is basically the same as the structure of the embodiment of FIG. 1, except that each of the two gate electrodes 50 further comprises an adhesion metal layer 54. The adhesion metal layer 54 is formed on the high conductivity metal layer 53. The The adhesion metal layer 54 is made of at least one material selected from the group consisting of: Ti, TiW and TiN.
[0061] Please refer to FIG. 5, which is a sectional schematic view of another embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 5 is basically the same as the structure of the embodiment of FIG. 2, except that each of the two gate electrodes 50 further comprises an adhesion metal layer 54. The adhesion metal layer 54 is formed on the high conductivity metal layer 53. The The adhesion metal layer 54 is made of at least one material selected from the group consisting of: Ti, TiW and TiN.
[0062] Please refer to FIG. 6, which is a sectional schematic view of one embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 6 is basically the same as the structure of the embodiment of FIG. 3, except that each of the two gate electrodes 50 further comprises an adhesion metal layer 54. The adhesion metal layer 54 is formed on the high conductivity metal layer 53. The The adhesion metal layer 54 is made of at least one material selected from the group consisting of: Ti, TiW and TiN.
[0063] Please refer to FIG. 7, which is a sectional schematic view of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 7 is basically the same as the structure of the embodiment of FIG. 1, except that the wide bandgap epitaxial layer 20 further comprises a buffer layer 21. The buffer layer 21 is formed on the semiconductor substrate 10. The channel layer 22 is formed on the buffer layer 21. The buffer layer 21 is made of GaN.
[0064] Please refer to FIG. 8, which is a sectional schematic view of another embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 8 is basically the same as the structure of the embodiment of FIG. 2, except that the wide bandgap epitaxial layer 20 further comprises a buffer layer 21. The buffer layer 21 is formed on the semiconductor substrate 10. The channel layer 22 is formed on the buffer layer 21. The buffer layer 21 is made of GaN.
[0065] Please refer to FIG. 9, which is a sectional schematic view of one embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 9 is basically the same as the structure of the embodiment of FIG. 3, except that the wide bandgap epitaxial layer 20 further comprises a buffer layer 21. The buffer layer 21 is formed on the semiconductor substrate 10. The channel layer 22 is formed on the buffer layer 21. The buffer layer 21 is made of GaN.
[0066] Please refer to FIG. 10, which is a sectional schematic view of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 10 is basically the same as the structure of the embodiment of FIG. 4, except that the wide bandgap epitaxial layer 20 further comprises a buffer layer 21. The buffer layer 21 is formed on the semiconductor substrate 10. The channel layer 22 is formed on the buffer layer 21. The buffer layer 21 is made of GaN.
[0067] Please refer to FIG. 11, which is a sectional schematic view of another embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 11 is basically the same as the structure of the embodiment of FIG. 5, except that the wide bandgap epitaxial layer 20 further comprises a buffer layer 21. The buffer layer 21 is formed on the semiconductor substrate 10. The channel layer 22 is formed on the buffer layer 21. The buffer layer 21 is made of GaN.
[0068] Please refer to FIG. 12, which is a sectional schematic view of one embodiment of an improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 12 is basically the same as the structure of the embodiment of FIG. 6, except that the wide bandgap epitaxial layer 20 further comprises a buffer layer 21. The buffer layer 21 is formed on the semiconductor substrate 10. The channel layer 22 is formed on the buffer layer 21. The buffer layer 21 is made of GaN.
[0069] Please refer to FIG. 13A, which is a sectional schematic view of one embodiment of another improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 13A is basically the same as the structure of the embodiment of FIG. 1, except that the wide bandgap epitaxial layer 20 further comprises a cap layer 24, wherein the cap layer 24 is formed on the Schottky barrier layer 23, wherein the isolated layer 90 is formed on the Schottky barrier layer 23; wherein the two gate electrodes 50 are formed on the top surface (the cap layer 24) of the wide bandgap epitaxial layer 20 within the two gate dielectric vias 91 respectively, wherein each of the Schottky contact metal layer 51 of the two gate electrodes 50 and the cap layer 24 of the wide bandgap epitaxial layer 20 form a Schottky contact; wherein the drain electrode 40 is formed on the top surface (the cap layer 24) of the wide bandgap epitaxial layer 20 within the drain dielectric via 41 and located between the two gate electrodes 50, wherein the drain electrode 40 and the cap layer 24 of the wide bandgap epitaxial layer 20 form an ohmic contact; wherein each of the two source electrodes 30 and the cap layer 24 of the wide bandgap epitaxial layer 20 form an ohmic contact. The cap layer 24 is made of at least one material selected from the group consisting of: GaN, AlGaN and AlN. Please refer to FIG. 13B, which is a sectional schematic view of one embodiment of another improved passivation structure for GaN field effect transistor of the present invention. The main structure of the embodiment of FIG. 13B is basically the same as the structure of the embodiment of FIG. 7, except that the wide bandgap epitaxial layer 20 further comprises a cap layer 24, wherein the cap layer 24 is formed on the Schottky barrier layer 23, wherein the isolated layer 90 is formed on the Schottky barrier layer 23; wherein the two gate electrodes 50 are formed on the top surface (the cap layer 24) of the wide bandgap epitaxial layer 20 within the two gate dielectric vias 91 respectively, wherein each of the Schottky contact metal layer 51 of the two gate electrodes 50 and the cap layer 24 of the wide bandgap epitaxial layer 20 form a Schottky contact; wherein the drain electrode 40 is formed on the top surface (the cap layer 24) of the wide bandgap epitaxial layer 20 within the drain dielectric via 41 and located between the two gate electrodes 50, wherein the drain electrode 40 and the cap layer 24 of the wide bandgap epitaxial layer 20 form an ohmic contact; wherein each of the two source electrodes 30 and the cap layer 24 of the wide bandgap epitaxial layer 20 form an ohmic contact. The cap layer 24 is made of at least one material selected from the group consisting of: GaN, AlGaN and AlN. Similarly, in the embodiments of FIGS. 2, 3, 4, 5, 6, 8. 9. 10. 11 and 12 of the present invention, the wide bandgap epitaxial layer 20 may further comprises a cap layer 24 (not shown in Figure), wherein the cap layer 24 is formed on the Schottky barrier layer 23, wherein the isolated layer 90 is formed on the Schottky barrier layer 23; wherein the two gate electrodes 50 are formed on the top surface (the cap layer 24) of the wide bandgap epitaxial layer 20 within the two gate dielectric vias 91 respectively, wherein each of the Schottky contact metal layer 51 of the two gate electrodes 50 and the cap layer 24 of the wide bandgap epitaxial layer 20 form a Schottky contact; wherein the drain electrode 40 is formed on the top surface (the cap layer 24) of the wide bandgap epitaxial layer 20 within the drain dielectric via 41 and located between the two gate electrodes 50, wherein the drain electrode 40 and the cap layer 24 of the wide bandgap epitaxial layer 20 form an ohmic contact; wherein each of the two source electrodes 30 and the cap layer 24 of the wide bandgap epitaxial layer 20 form an ohmic contact. The cap layer 24 is made of at least one material selected from the group consisting of: GaN, AlGaN and AlN.
[0070] Please refer to FIG. 14, which is a diagram showing the comparison of the turn on voltage (Von) of the forward diode of the transistor of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer and the turn on voltage (Von) of an embodiment of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer. The right-hand side are the turn on voltage (Von) of two batches of samples of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer. The left-hand side are the turn on voltage (Von) of two batches of samples of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer. It is very clear that the turn on voltage (Von) of the GaN field effect transistor of conventional technology decreases dramatically, while the turn on voltage (Von) of an improved passivation structure for GaN field effect transistor of the present invention mostly remains unchanged.
[0071] Please also refer to FIG. 15, which is a diagram showing the comparison of the drain leakage current of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer and the drain leakage current of an embodiment of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer. The right-hand side are the drain leakage current of two batches of samples of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer. The left-hand side are the drain leakage current of two batches of samples of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer. It is very clear that the drain leakage current of the GaN field effect transistor of conventional technology increases dramatically, while the drain leakage current of an improved passivation structure for GaN field effect transistor of the present invention mostly remains unchanged.
[0072] Please also refer to FIG. 16, which is a diagram showing the comparison of the gate leakage current of an embodiment of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer and the gate leakage current of an embodiment of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer. The right-hand side are the gate leakage current of two batches of samples of a passivation structure for GaN field effect transistor of conventional technology before and after curing the high cure temperature Polybenzoxazole passivation layer. The left-hand side are the gate leakage current of two batches of samples of an improved passivation structure for GaN field effect transistor of the present invention before and after curing the low cure temperature Polybenzoxazole passivation layer. It is very clear that the gate leakage current of the GaN field effect transistor of conventional technology gets worse dramatically, while the gate leakage current of an improved passivation structure for GaN field effect transistor of the present invention mostly remains unchanged.
[0073] As disclosed in the above description and attached drawings, the present invention can provide an improved passivation structure for GaN field effect transistor. It is new and can be put into industrial use.
[0074] Although the embodiments of the present invention have been described in detail, many modifications and variations may be made by those skilled in the art from the teachings disclosed hereinabove. Therefore, it should be understood that any modification and variation equivalent to the spirit of the present invention be regarded to fall into the scope defined by the appended claims.
