METHOD AND SYSTEM USING TERNARY SEQUENCES FOR SIMULTANEOUS TRANSMISSION TO COHERENT AND NON-COHERENT RECEIVERS

Abstract

The present invention describes a method and system for simultaneous transmission of data to coherent and non-coherent receivers. The method at the transmitter includes retrieving a base ternary sequence having a pre-defined length, obtaining one or more ternary sequences corresponding to data to be transmitted and transmitting the obtained one or more ternary sequences by the transmitter. The method steps at the receiver includes receiving one or more ternary sequences corresponding to the data transmitted, demodulating each of the received ternary sequences by correlating with all cyclic shifts of the base ternary sequence by the receiver if the receiver is a coherent receiver, demodulating each of the received ternary sequences by correlating with all cyclic shifts of the absolute of the base ternary sequence by the receiver if the receiver is a non-coherent receiver and detecting the transmitted data based on the cyclic shifts corresponding to maximum correlation values.

Claims

1. A method of data-symbol-to-chip mapping, the method comprising: generating data symbols based on input bits; and mapping the data symbols to a set of ternary sequences, wherein the mapping is determined by a k/L-TASK (Ternary Amplitude Shift Keying) modulation format, and wherein the k denotes a size of each of the data symbols, and the L denotes a length of each of the ternary sequences.

2. The method of claim 1, wherein the m is an integer no greater than the L.

3. The method of claim 1, wherein the c.sub.m is a cyclic shifted from the c.sub.0 by the m locations to a right.

4. The method of claim 3, wherein the c.sub.0 is {0 0 0 1 1 0 1 1} in case of a 3/8-TASK modulation format being applied, and wherein the c.sub.0 is {1 0 0 1 0 1 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 0 1 1 1 0 0 0 0 0 1 1} in case of a 5/32-TASK modulation format being applied.

5. The method of claim 1, wherein in case of a 3/8-TASK modulation format being applied, a number of the data symbols are 8, and wherein the 8 data symbols are mapped to 8-length ternary sequences.

6. The method of claim 1, wherein in case of a 3/8-TASK modulation format being applied, the c.sub.0 corresponding to a data symbol 0 is obtained, the c.sub.0 being {0 0 0 1 1 0 1 1}.

7. The method of claim 1, wherein in case of a 5/32-TASK modulation format being applied, a number of the data symbols are 32, and wherein the 32 data symbols are mapped to 32-length ternary sequences.

8. The method of claim 1, wherein the length of each of the ternary sequences is 2.sup.k.

9. The method of claim 1, wherein the set of ternary sequences comprises a ternary sequence c.sub.0 and a ternary sequence c.sub.m, the c.sub.m being cyclic shifted from the c.sub.0 by m locations, the m being an integer.

10. An apparatus for performing data-symbol-to-chip mapping, the apparatus comprising: a processor configured to generate data symbols based on input bits, and map the data symbols to a set of ternary sequences, wherein the mapping is determined by a k/L-TASK (Ternary Amplitude Shift Keying) modulation format, and wherein the k denotes a size of each of the data symbols, and the L denotes a length of each of the ternary sequences.

11. The apparatus of claim 10, wherein the m is an integer no greater than the L.

12. The apparatus of claim 10, wherein the c.sub.m is cyclic shifted from the c.sub.0 by the m locations.

13. The apparatus of claim 12, wherein the c.sub.0 is {0 0 0 1 1 0 1 1} in case of a 3/8-TASK modulation format being used, and wherein the c.sub.0 is {1 0 0 1 0 1 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 0 1 1 1 0 0 0 0 0 1 1} in case of a 5/32-TASK modulation format being used.

14. The apparatus of claim 10, wherein in case of a 3/8-TASK modulation format being used, a number of the data symbols are 8, and wherein the 8 data symbols are mapped to 8-length ternary sequences.

15. The apparatus of claim 10, wherein in case of a 3/8-TASK modulation format being used, the c.sub.0 corresponding to a data symbol 0 is obtained, the c.sub.0 being {0 0 0 1 1 0 1 1}.

16. The apparatus of claim 10, wherein in case of a 5/32-TASK modulation format being applied, a number of the data symbols are 32, and wherein the 32 data symbols are mapped to 32-length ternary sequences.

17. The apparatus of claim 10, wherein the length of each of the ternary sequences is 2.sup.k.

18. The apparatus of claim 10, wherein the set of ternary sequences comprises a ternary sequence c.sub.0 and a ternary sequence c.sub.m, the c.sub.m being cyclic shifted from the c.sub.0 by m locations, the m being an integer.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0014] The aforementioned aspects and other features of the present invention will be explained in the following description, taken in conjunction with the accompanying drawings, wherein:

[0015] FIG. 1 is a block diagram of an exemplary communication system, according to one embodiment of present invention.

[0016] FIG. 2 is a block diagram depicting data processing operation in an exemplary communication system, according to one embodiment of present invention.

[0017] FIG. 3 is a flow diagram illustrating a method of transmitting data, according to one embodiment of present invention.

[0018] FIG. 4 is a flow chart illustrating a method of obtaining one or more ternary sequences corresponding to data to be transmitted

[0019] FIG. 5 is a flow chart illustrating a method of generating a base ternary sequence, according to one embodiment of present invention.

[0020] FIG. 6 is a flow diagram illustrating a method of generating a perfect ternary sequence from the seed sequence, according to one embodiment of present invention.

[0021] FIG. 7 is a flow diagram illustrating a method of generating a near perfect ternary sequence, according to one embodiment of present invention.

[0022] FIG. 8 is block diagram of a transmitter, according to one embodiment of present invention.

[0023] FIG. 9 is block diagram of a base ternary sequence generating module, according to one embodiment of present invention.

[0024] FIG. 10 is block diagram of a receiver, according to one embodiment of present invention.

[0025] FIG. 11 is a block diagram of an exemplary communication device showing various components for implementing embodiments of the present invention.

MODE FOR THE INVENTION

[0026] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments. The present invention can be modified in various forms. Thus, the embodiments of the present invention are only provided to explain more clearly the present invention to the ordinarily skilled in the art of the present invention. In the accompanying drawings, like reference numerals are used to indicate like components.

[0027] The specification may refer to an, one or some embodiment(s) in several locations. This does not necessarily imply that each such reference is to the same embodiment(s), or that the feature only applies to a single embodiment. Single features of different embodiments may also be combined to provide other embodiments.

[0028] As used herein, the singular forms a, an and the are intended to include the plural forms as well, unless expressly stated otherwise. It will be further understood that the terms includes, comprises, including and/or comprising when used in this specification, specify the presence of stated features, integers, steps, operations, elements and/or components, but do not preclude the presence or addition of one or more other features integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term and/or includes any and all combinations and arrangements of one or more of the associated listed items.

[0029] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0030] FIG. 1 is a block diagram of an exemplary communication system, according to one embodiment of present invention. According to one embodiment of present invention, the communication system comprises a transmitter 101 and one or more receivers. The receiver according to one embodiment of present invention is one of coherent receiver such as 102A, 102B . . . 102N and non-coherent receiver such as 103A, 103B . . . 103N. The transmitter 101 and receivers are connected through the wireless channel.

[0031] The data transmitted from the transmitter 101 is received and processed by the coherent receiver 102A, 102B . . . 102N and non-coherent receiver 103A, 103B . . . 103N simultaneously. The transmitter 101 transmits the data over ternary alphabet {0,1,+1}. The coherent receiver 102A, 102B . . . 102N demodulates the received signal over the ternary alphabet {0,1,+1} while the non-coherent receiver demodulates the received signal over the binary alphabet {0,1}.

[0032] The coherent receivers and the non-coherent receivers are represented inter-changeably by reference numerals 102 and 103 respectively or coherent receivers 102A. 102B . . . 102N and non-coherent receivers 103A, 103B . . . 103N for convenience throughout the specification.

[0033] FIG. 2 is a block diagram depicting data processing operation in an exemplary communication network, according to one embodiment of present invention.

[0034] In block 201 of FIG. 2, the data to be transmitted in digital form is represented. At the transmitter 101, the data is divided into a number of data-blocks of length k referred to as data-symbols. Therefore, N=2k data symbols are encoded to N distinct ternary sequences. This encoding requires number of distinct ternary sequences to be equal to N. For example, when the symbol size k=3, each of N=8 symbols are uniquely encoded onto one of N=8 ternary sequences.

[0035] The transmitter draws the data-symbols from the symbol set s, where

S={s.sub.0, s.sub.1, . . . , s.sub.N-1}, N=2.sup.k.

[0036] These data-symbols are mapped onto one of the N possible ternary sequences from the code set C={c.sub.0, . . . , c.sub.N-1}. The mapping is represented as follows:

s.sub.mS.Math.c.sub.gC(1)

[0037] Let us define interval set Z.sub.N={0,1,2 . . . N1}. Note that m, gZ.sub.N. The corresponding ternary sequences are transmitted simultaneously to the non-coherent receiver 103A and coherent receiver 102A.

[0038] When a ternary sequence is transmitted by the transmitter 101, the coherent receiver 102A receives the ternary sequence as it is. The non-coherent receiver 103A receives the absolute of the ternary sequence transmitted from the transmitter 101, i.e. the transmitted ternary sequence with the 1's received as +1's. Therefore, in order to transmit the same ternary sequence to the coherent receiver 102A and non-coherent receiver 103A effectively, the ternary sequences should belong to a ternary code set C that satisfies the following properties.

[0039] a. The sequences in the ternary code set C should be maximally apart.

[0040] b. The sequences in the corresponding binary code set |C| consisting of sequences obtained as the absolute of corresponding sequences in the ternary code set C should be maximally apart.

[0041] The design of ternary code set C is achieved by designing a single sequence with good autocorrelation properties over the binary alphabet {0,1} and the ternary alphabet {0,1,+1}.

[0042] This sequence is referred as base ternary sequence hereafter in the complete specification.

[0043] The ternary code set C is obtained as the collection of all cyclic shifts of the said base ternary sequence. Let the base ternary sequence be represented as t.sub.b , then the code set C is given by

C={c.sub.g:c.sub.g=L.sup.g{t.sub.b}, gZ.sub.N}(2)

[0044] Here, L.sup.g{t.sub.g} is the cyclic shift by g operator which cyclically shifts the base ternary sequence by g elements. It may be noted that the cyclic shift is applicable in any direction and whenever more than one cyclic shift is considered, it is implied all cyclic shifts are in the same direction.

[0045] The mapping in equation (1) can be rewritten as s.sub.m.Math.c.sub.g=L.sup.g{t.sub.b}.

[0046] We can now define a one to one mapping from the symbols set s to Z.sub.N as

g=f(s.sub.m)(3)

[0047] Here, f(x) is any one to one mapping which maps the symbol s.sub.mS to the cyclic shift gZ.sub.N. For instance, g=f(s.sub.m) can be the decimal equivalent of binary symbol s.sub.m. Likewise, g=f(s.sub.m) can be the decimal equivalent of the Gray mapping of symbol s.sub.m or any other one to one mapping that maps the data-symbol s.sub.mS to the cyclic shift .sub.N. Therefore, each data-symbol is mapped to a unique cyclic shift of the base ternary sequence.

[0048] The inverse mapping f.sup.1(x) is defined as

s.sub.m=f.sup.1(g)(4)

[0049] In all the following discussions, we refer to the mapping in equation (3) as the one to one mapping and mapping described by equation (4) as the inverse of one to one mapping.

[0050] FIG. 3 is a flow diagram illustrating a method of transmitting data, according to one embodiment of present invention. At step 301, a base ternary sequence is retrieved and stored in all the transmitters and receivers. At step 302, one or more ternary sequences corresponding to data-symbols to be transmitted are obtained from the base ternary sequence. This step is explained in detail in FIG. 4. At step 303, the ternary sequence is transmitted to the receiver.

[0051] At step 304 of FIG. 3, the receiver correlates the received signal with all cyclic shifts of the base ternary sequence, if the receiver is a coherent receiver 102A, 102B . . . 102N. Likewise, the non-coherent receiver 103A, 103B . . . 103N demodulates the received signal by correlating the received signal with all cyclic shifts of the absolute of the base ternary sequence.

[0052] At step 305, each of transmitted data-symbols is detected based on the cyclic shift corresponding to maximum correlation values among all the N correlation values corresponding to all N cyclic shifts by mapping back said cyclic shift to the data-symbol using the inverse of one to one mapping.

[0053] In one embodiment, the transmission and reception can be explained as follows. The transmitted signal corresponding to symbol s.sub.mS (equivalently, c.sub.gC) is represented as:

c.sub.g(t)=.sub.n=0.sup.N1c.sub.g[n]p(tnT.sub.c)(5)

[0054] Here, p(t) is the pulse shaping waveform and c.sub.g[0], c.sub.g[1], . . . , c.sub.g[N1] refer to the elements of the ternary sequence c.sub.g. The chip duration is represented by T.sub.c. The transmitted signal corresponding to the ternary sequence c.sub.gC (equivalently symbol s.sub.mS) corrupted by Additive white Gaussian noise (AWGN) and other channel impairments is received at the receiver.

[0055] For instance, let y.sup.c.sub.g(t) and y.sup.nc.sub.g(t) be the baseband equivalent of the received signal at the coherent receiver 102 and non-coherent receiver 103, respectively, corresponding to the transmitted signal c.sub.g(t). It may be noted that y.sup.nc.sub.g(t)=|y.sup.c.sub.g(t)|.

[0056] For clarity, in the following discussions, the signal y.sup.c.sub.g(t) and y.sup.nc.sub.g(t) are referred as the received ternary sequence corresponding to the transmitted ternary sequence c.sub.gC. The received ternary sequence y.sup.c.sub.g(t) is demodulated by correlating y.sup.c.sub.g(t) with all the cyclic shifts of the base ternary sequence, if the receiver is a coherent receiver. Likewise, the received ternary sequence y.sup.nc.sub.g(t) is demodulated by correlating y.sup.nc.sub.g(t) with all the cyclic shifts of absolute of the base ternary sequence.

[0057] This is described as follows.

gZ.sub.N as

Corr.sub.g=.sub.0.sup.Ty.sup.c.sub.g(t)c.sub.g(t)dt, gZ.sub.N(6)

[0058] Likewise, for non-coherent receiver, we have

Corr.sub.g=.sub.0.sup.Ty.sup.nc.sub.g(t)|c.sub.g(t)|dt, gZ.sub.N(7)

where,

|c.sub.g(t)|=.sub.n=0.sup.N1|c.sub.g[n]|p(tnT.sub.c).(8)

[0059] The data-symbol is detected based on the single cyclic shift corresponding to maximum correlation values among all the N correlation values corresponding to N cyclic shifts. If we have the maximum correlation value as Corr.sub.max corresponding to a cyclic shift g=g.sub.estimate, then the data-symbol is detected as

s.sub.m.sup.est=f.sup.1(g.sub.estimate)(9)

[0060] FIG. 4 is flow chart illustrating a method of obtaining one or more ternary sequences corresponding to data-symbols to be transmitted from the base ternary sequence. At step 401, the transmitter divides the data to be transmitted into one or more data-symbols having a pre-defined length. At step 402, each symbol from the set of data-symbols S is mapped onto one of the N possible ternary sequences from the code set C obtained as cyclic shift of base ternary sequence. The process of mapping and inverse mapping are explained in detail in equation 3 and equation 4.

[0061] FIG. 5 is a flow chart illustrating a method of generating a base ternary sequence, according to one embodiment of present invention. At step 501, a seed sequence of a pre-defined length is selected. The seed sequence can be an m-sequence or complement of an m-sequence. The length of seed sequence is N1, where N=2.sup.n is the desired length of the base ternary sequence. The weight of the sequence is N/2 if the seed sequence is an m-sequence and the weight is (N2)/2 if the seed sequence is complement of an m-sequence.

[0062] At step 502, it is determined whether the weight of selected seed sequence is a perfect square. In present invention, the weight of the sequence is the number of non-zero elements in a sequence. According to one embodiment of present invention, if the weight of the selected seed sequence is perfect square, then a perfect ternary sequence is generated from the seed sequence as shown in step 503. The method of generating a perfect ternary sequence from a seed sequence is explained in detail in FIG. 6. If the weight of the selected seed sequence is not a perfect square, then a near perfect ternary sequence is generated from the seed sequence as shown in step 504. The method of generation of a near perfect ternary sequence from a seed sequence according to step 504 is explained in detail in FIG. 7.

[0063] At step 505, a pre-defined value is inserted in a pre-defined location of the perfect ternary sequence or in the near perfect ternary sequence for generating the base ternary sequence. The pre-defined value is determined based on the seed sequence selected for the perfect ternary sequence generation. The location for insertion of pre-defined value is the location such that the MSAC of the resulting base ternary sequence and absolute of the base ternary sequence is the least across all possible locations. There exist two scenarios, one in which the value 1 is inserted in the perfect ternary sequence or in the near perfect ternary sequence if the selected seed sequence used for the generation of perfect ternary sequence is an m-sequence. In another scenario, the pre-defined value inserted in the near perfect ternary sequence is the value 1 if the selected seed sequence is complement of an m-sequence.

[0064] FIG. 6 is a flow diagram illustrating the method of generating a perfect ternary sequence from the seed sequence, according to one embodiment of present invention. At step 601, one preferred pair of m-sequence is obtained using the seed sequence. The first m-sequence of the preferred pair is the seed sequence itself. The second m-sequence of the preferred pair is the m-sequence obtained as the pre-defined decimation of the seed sequence. The said pre-defined decimation that obtains another m-sequence from a given m-sequence is known art. In this context, a preferred pair of m-sequences of period P=N1, where N=2 is a pair of m-sequence x and y with the crosscorrelation sequence (x,y) assuming the values from the

[00001]$\mathrm{set}.Math.\left\{-1,-12^{\frac{n+1}{2}}\right\}.$

The k.sup.th element of the sequence (x,y) is given by

(x,y)[k]=.sub.i=0.sup.P1(1).sup.(x.sup.i.sup.y.sup.(i+k)mod P.sup.), 0kP1(10)

[0065] At step 602, the correlation sequence (x,y) of the preferred pair is obtained using equation (10).

[0066] At step 603, an offset correlation sequence .sup.(x,y) from the corresponding correlation sequence (x,y) is obtained. The offset correlation sequence is obtained by adding the value 1 to each element in the correlation sequence. That is, .sup.(x,y)=1+(x,y).

[0067] The elements of .sup.(x,y) assume the values

[00002]${}^{\left(x,y\right)}\left\{0,2^{\frac{n+1}{2}}\right\}$

[0068] At step 604, the perfect ternary sequence is generated based on the offset correlation sequence. In order to generate the perfect ternary sequence, offset correlation sequence .sup.(x,y)=1+(x,y) is divided by

[00003]$2^{\frac{n+1}{2}}$

resulting in a sequence (x,y) with elements {0,1}.

[0069] The method steps described in step 602, step 603 and step 604 is illustrated with the following example for obtaining a perfect ternary sequence of length 7.

[0070] This is demonstrated in the following example with the m-sequence of period 7. Let the m-sequence x be selected as the seed sequence and the m-sequence y together with m-sequence x form a preferred pair.

[0071] Let x={0 1 1 1 0 1 0}

[0072] AND, y={0 1 0 1 1 1 0}

[0073] Then, we have the cross correlation (x,y) given by

(x,y)={1 1 5 3 3 1 3}

.sup.(x,y)=1+(x,y)={0 0 4 4 4 0 4}

[0074] And, consequently the sequence (x,y) is obtained as

[00004]$\frac{1+\left(x,y\right)}{4}=\left\{\begin{array}{ccccccc}0& 0& -1& 1& 1& 0& 1\end{array}\right\}$

[0075] The sequence (x,y) is a perfect ternary sequence with (x,y)={4000000}. Also note that the sequence (x,y) is also a cyclic shift of the absolute of the seed m-sequence x.

[0076] FIG. 7 is a flow diagram illustrating a method of generating a near perfect ternary sequence, according to one embodiment of present invention. The near perfect ternary sequence is generated from the seed sequence if weight of the seed sequence is different from a perfect square. At step 701, one or more candidate sequences are obtained by inverting value of one or more positions corresponding to 1's in the seed sequence for a pre-defined ratio. In this context, inverting changes the 1 to 1. According to one embodiment of present invention, candidate sequences are obtained by inverting all possible combinations of 1's in the sequence such that the ratio of number of 1+s to +1's in the obtained sequences are in the pre-defined ratio range. The said pre-defined ratio range refers to all ratios between and .

[0077] At step 702, at least one sequence out of the candidate sequences is selected based on the least value of mean squared autocorrelation coefficient (MSAC) as the near perfect ternary sequence. The MSAC is being computed as the mean of N1 out?of-phase squared autocorrelation coefficients. Therefore, a near perfect ternary sequence is obtained by carrying a computer search over these ratios. The sequence with least value of mean squared autocorrelation (MSAC) is selected.

[0078] The mean squared autocorrelation of a sequence of length P is defined as:

[00005]$\begin{array}{cc}{}_{\mathrm{MSAC}}=\frac{1}{\left(N-1\right)}.Math.\underset{=1}{\overset{P-1}{.Math.}}.Math.{R\left(\right)}^2& \left(11\right)\end{array}$

[0079] Here, P=N1 is the length of the seed sequence and R() is the periodic autocorrelation of the sequence at delay , given by

R()=.sub.i=0.sup.P1x.sub.iy.sub.i+(12)

[0080] The base ternary sequences for length 8, 16 and 32 are shown in Table1 when the seed sequence is an m-sequence.

TABLE-US-00001 TABLE 1 Perfect ternary sequence/Near perfect ternary Length Base Ternary sequence sequence 8 1 1 1 0 0 1 0 0; 1 1 1 0 0 1 0 0 1 1 1 0 0 1 0; 1 0 1 1 1 0 0 0; 0 1 0 1 1 1 0 0; 0 0 1 0 1 1 1 0 16 1 1 0 0 1 0 0 0 1 0 1 1 1 1 1 1 1 0 1 0 0; 0 1 0 1 1 0 1 1 1 1 0 1 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 1 1 1 1 0 1 0 1 0 1 1 1 1 1 0 0 1 0 0 0 0 1 0 1 1 0 0 1 0 0 32 1 1 1 1 1 0 0 0 1 1 0 0 1 0 1 1 0 0 1 1 1 0 1 1 1 0 1 0 1 1 1 1 0 0 0 1 1 0 1 1 0 0 0 0 1 0 0 1 0 1 0 1 0 1 0 0 0 0 1 1 0 0 0

[0081] The base ternary sequences for length 8, 16 and 32 are shown in Table2 when the seed sequence is complement of an m-sequence. Please note that multiple base ternary sequences with similar MSAC are obtained and all are given in Table1 and Table 2.

TABLE-US-00002 TABLE 2 Near perfect ternary Length Base Ternary sequence sequence 8 0 0 0 1 1 0 1 1; 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 16 1 0 0 0 0 1 0 1 0 0 0 0 1 0 1 0 0 1 1 0 1 1 1 0 0 1 1 0 1 1; 1 1 1 0 0 0 0 1 0 1 0 0 1 1 0 1 1; 1 1 1 0 0 0 0 1 0 1 0 0 1 1 0 1 32 1 0 0 1 0 1 1 0 0 1 1 1 1 0 1 1 1 1 1 0 1 0 1 0 1 0 0 0 1 0 0 0 0 1 0 0 1 1 0 1 1 1 0 0 0 1 0 0 0 0 0 1 1 0 0 1 1 0 0 1 0 1 1

[0082] The sequences in Table 2 have less number of consecutive non-zero elements, which may be desired in receiver design. From all the sequences listed in Table 2, sequences with uniform distribution of zero and non-zero elements are selected to obtain the consolidated list of base ternary sequences shown in Table 3.

TABLE-US-00003 TABLE 3 Perfect ternary sequence/Near Length Base Ternary sequence perfect ternary sequence 8 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 16 1 1 0 0 0 0 1 0 1 0 0 0 0 1 0 1 1 0 0 1 1 0 1 1 0 0 1 1 0 1 1 32 1 0 0 1 0 1 1 0 1 1 1 1 0 1 0 0 1 1 1 1 0 1 0 1 0 0 0 1 0 0 1 1 0 0 0 1 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 1 1 0 0 1 0 1 1 1

[0083] In an exemplary embodiment of present invention, the cyclic shifts of the base ternary sequences of length 8, 16 and 32 presented in the Table3. These are used for encoding the data-symbols of size k=3, k=4 and k=5, respectively before transmission. These base ternary sequences in Table 3 are referred as 3/8-OOK, 4/16-OOK and 5/32-OOK, respectively. Here, OOK stands for ON-OFF keying. Table 4 represents the base ternary sequences in Table 3 with the respective nomenclature.

TABLE-US-00004 TABLE 4 Basic Ternary k length Nomenclature spreading sequence 3 8 3/8-OOK, 0 0 0 1 1 0 1 1 4 16 4/16-OOK 1 1 0 0 0 0 1 0 1 0 0 1 1 0 1 1 5 32 5/32-OOK 1 0 0 1 0 1 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 0 1 1 1 0 0 0 0 0 1 1

[0084] According to the embodiments of the present disclosure, the nomenclature of the sequence 3/8-OOK, 4/16-OK and 5-32-OOK as referred in Table 4, can be also be provided with alternative nomenclature series such as 3/8 Ternary OOK (3/8-TOOK), 4/16 Ternary OOK (4/16-TOOK) and 5/32 Ternary OOK (5/32-TOOK) and 3/8 Ternary ASK (3/8-TASK), 4/16 Ternary ASK (4/16-TASK) and 5/32 Ternary ASK (5/32-TASK) respectively. Here ASK refers to Amplitude shift keying.

[0085] Table 5 shows an example of mapping the data-symbols for k=3 onto cyclic shifts of the base ternary sequence of length 8, wherein each cyclic-shift of the base ternary sequence is obtained as the decimal equivalent of the corresponding binary representation of the data-symbols. As described earlier, any other one to one mapping described by equation (3) as mentioned in FIG. 2 may be used to map the data-symbols onto different cyclic shifts of the base ternary sequence.

TABLE-US-00005 TABLE 5 Data- Cyclic shift symbol (Decimal equivalent) Ternary sequences 000 0 0 0 0 1 1 0 1 1 001 1 1 0 0 0 1 1 0 1 010 2 1 1 0 0 0 1 1 0 011 3 0 1 1 0 0 0 1 1 100 4 1 0 1 1 0 0 0 1 101 5 1 1 0 1 1 0 0 0 110 6 0 1 1 0 1 1 0 0 111 7 0 0 1 1 0 1 1 0

[0086] The autocorrelation function of base ternary sequence at an arbitrary delay k could be expressed as follows

R(k)=xp+qx+R.sup.a(Nk+1)+R.sup.a(k)(13)

[0087] In the above expression, if x a binary value, equal to 0, when the base ternary sequence is obtained from a perfect ternary sequence.

[0088] Likewise x is equal to 1, when the base ternary sequence is obtained from the near perfect ternary sequence.

[0089] The elements p and q represent those elements which align with the element x at any delay k. The term R.sup.a(k) is the aperiodic autocorrelation coefficient of the defined as

R.sup.a(k)=.sub.i=0.sup.Nk1c.sub.ic.sub.i+k(14)

[0090] Here, c={c.sub.0, c.sub.1, c.sub.2, . . . , c.sub.N1} is the sequence for which the aperiodic autocorrelation coefficient is being computed.

[0091] An example of generation of perfect ternary sequence {00-11101} is explained below with an example.

[0092] Consider that x is inserted before the third bit to result in sequence as shown below.

[0093] {00x-11101}

[0094] For arbitrary shift k=5, then the relative positioning of elements of the sequence and its shifted replica as:

[0095] 0 0 x 1 1 1 0 1

[0096] 1 1 1 0 1 0 0 x

[0097] The autocorrelation at delay k=5, is given below:

R(k)=x1+1x+R.sup.a(3)+R.sup.a(5)

[0098] In the above computation, it happens that p=q=1.

[0099] When the base ternary sequence is obtained from a perfect ternary sequence, we have x=0. Therefore, R(k) is modified as

R(k)=R.sup.a(Nk+1)+R.sup.a(k)(15)

[0100] In order to limit the maximum value of (k) for k[1, N1], it is sufficient to minimize the value of R.sup.a(k)k[1, N1] by selecting appropriate phase of the seed sequence. However, no known result for phase of the seed sequence is known in the literature to minimize the aperiodic autocorrelation across both the binary and the ternary alphabets. However, if only a binary alphabet is considered the autocorrelation property of the sequence is determined by the aeriodic autocorrelation property of the binary sequences. This fact is used to compute the autocorrelation of binary sequences obtained by extension of known sequences such as the extended m-sequences.

[0101] The insertion of x=0 at location corresponding to minimum value of MSAC of the resulting base ternary sequence and the absolute of the base ternary sequence ensures that the equation (15) is least for different values of the delay k.

[0102] FIG. 8 is block diagram of a transmitter, according to one embodiment of present invention. According to one embodiment of present invention, the transmitter includes a data input module 801, symbol generating module 802, ternary sequence generating module 803, a base ternary sequence retrieving module 804, cyclic shift generation module 805 and transmitting module 806.

[0103] In one embodiment of present invention, the data to be transmitted is fed to the data input module 801. The data input module 801 is operatively coupled with the symbol generating module 802. The data in binary format is divided into pre-defined length in order to generate data-symbols. The symbol generating module 802 performs the above mentioned operation.

[0104] According to one embodiment of present invention, the base ternary sequence is stored in the transmitter 101. The base ternary sequence retrieving module 804 retrieves the base ternary sequence and feeds it into the ternary sequence generating module 803. The ternary sequence generating module 803 is coupled with base ternary sequence retrieving module 804 and symbol generating module 802. The ternary sequence generating module 803 generates one or more ternary sequence from the base ternary sequence by mapping each symbol onto corresponding ternary sequences obtained as cyclic shifts of the base ternary sequence based on one to one mapping described in equation (3) in the description of FIG. 2.

[0105] The transmitting module 806 according to one embodiment of present invention transmits the generated ternary sequences to the coherent receiver 102A and non-coherent receiver 103A.

[0106] FIG. 9 is block diagram of a base ternary sequence generating module, according to one embodiment of present invention. The generation of base ternary sequence comprises selection of seed sequence, generation of perfect ternary sequence, near perfect ternary sequence etc.

[0107] In one exemplary embodiment of present invention, the base ternary sequence generating module 900 comprises a seed sequence selection module 901, a perfect ternary sequence generation module 902, a near perfect ternary sequence generating module 903 and pre-defined value insertion module 904.

[0108] The seed sequence selection module 901 selects a seed sequence for the generation of base ternary sequence. The seed sequence can be an m-sequence or complement of an m-sequence. The selected seed sequence is of length N1, where N is desired length of base ternary sequence to be generated.

[0109] If the weight of the sequence is a perfect square, then the seed sequence is fed into perfect ternary sequence generation module 902. If the weight of the seed sequence is not a perfect square, then the selected seed sequence is fed to the near perfect ternary sequence generation module 903.

[0110] The generation of perfect ternary sequence using the perfect ternary sequence generation module 902 comprises obtaining a preferred pair of m-sequence using the seed sequence. Further, the perfect ternary sequence generating module 902 obtains the correlation sequence of the preferred pair. The correlation sequence is obtained as the cross correlation function between the two sequences of the preferred pair. Then, an offset correlation sequence is obtained from the corresponding correlation sequence and the perfect ternary sequence is generated based on the offset correlation sequence.

[0111] The generation of near perfect ternary sequence by a near perfect ternary sequence generation module 903 includes, when weight of the seed sequence is different from a perfect square. The generation of near perfect ternary sequence

[0112] comprises obtaining one or candidate sequences by inverting all possible combinations of 1's in the seed sequence such that the ratio of number of 1's to +1's in the obtained sequences are in the pre-defined ratio range and selecting at least one sequence out of the candidate sequences based on the least value of mean squared autocorrelation coefficient (MSAC) as the near perfect ternary sequence.

[0113] The pre-defined value insertion module 905 inserts a pre-defined value in a pre-defined location of one of the perfect ternary sequence and the near perfect ternary sequence for generating the base ternary sequence. The pre-defined location for insertion of pre-defined value is the location such that the MSAC of the resulting base ternary sequence and absolute of the base ternary sequence is the least across all possible locations. The pre-defined value inserted is 0, if the seed-sequence is an m-sequence. The pre-defined value inserted is 1 if the seed-sequence is complement of an m-sequence.

[0114] FIG. 10 is a block diagram of a receiver 102, according to one embodiment of present invention. The receiver can be a coherent or non-coherent type. The typical receiver comprises a signal receiving module 1001, a demodulating module 1002, a cyclic-shift-sequence input module 1003 and a symbol detection module 1004.

[0115] The signal receiving module 1001 receives the signal transmitted from the transmitter 101. The received signal is demodulated using the demodulation module 1002. The demodulation is performed by correlating the received signal with all the cyclic shifts of the base ternary sequence if the receiver is a coherent receiver. If the receiver is a non-coherent receiver, then demodulation is performed by correlating the received signal with all the cyclic shifts of the absolute of the base ternary sequence. The cyclic shifts of the base ternary sequence and absolute of base ternary sequence is provided by a ternary sequence input module 1003. The values of the correlations are fed into a symbol detection module 1004. The symbol detection module 1004 identifies the data-symbols from the cyclic shift corresponding to maximum value of correlation by mapping back the cyclic shift to the data-symbol using the inverse of one to one mapping.

[0116] FIG. 11 is a block diagram of an exemplary communication device showing various components for implementing embodiments of the present invention. The communication device 1100 can be a transmitter or a receiver. In FIG. 11, the communication device 1100 includes a processor 1101, a memory 1104, a read only memory (ROM) 1102, a transceiver 1106, and a bus 1103.

[0117] The processor 1102, as used herein, means any type of computational circuit, such as, but not limited to, a microprocessor, a microcontroller, a complex instruction set computing microprocessor, a reduced instruction set computing microprocessor, a very long instruction word microprocessor, an explicitly parallel instruction computing microprocessor, a graphics processor, a digital signal processor, or any other type of processing circuit. The processor 1102 may also include embedded controllers, such as generic or programmable logic devices or arrays, application specific integrated circuits, single-chip computers, smart cards, and the like.

[0118] The memory 1104 and the ROM 1102 may be volatile memory and non-volatile memory. The memory 1104 includes a base ternary sequence generating module 1105 generating a base ternary sequence according to one or more embodiments described in FIG. 5. A variety of computer-readable storage media may be stored in and accessed from the memory elements. Memory elements may include any suitable memory device(s) for storing data and machine-readable instructions, such as read only memory, random access memory, erasable programmable read only memory, electrically erasable programmable read only memory, hard drive, removable media drive for handling compact disks, digital video disks, diskettes, magnetic tape cartridges, memory cards, and the like.

[0119] Embodiments of the present subject matter may be implemented in conjunction with modules, including functions, procedures, data structures, and application programs, for performing tasks, or defining abstract data types or low-level hardware contexts. The base ternary sequence generating module 1105 may be stored in the form of machine-readable instructions on any of the above-mentioned storage media and may be executable by the processor 1102. In one embodiment, the program may be included on a compact disk-read only memory (CD-ROM) and loaded from the CD-ROM to a hard drive in the non-volatile memory. The transceiver 1106 is capable of transmitting and receiving data. The bus 1103 acts as interconnect between various components of the communication device 104.

[0120] The present embodiments have been described with reference to specific example embodiments. It will be evident that various modifications and changes may be made to these embodiments without departing from the broader spirit and scope of the various embodiments. Furthermore, the various devices, modules, and the like described herein may be enabled and operated using hardware circuitry, firmware, and/or software embodied in a machine readable medium. Although the embodiments herein are described with various specific embodiments, it will be obvious for a person skilled in the art to practice the invention with modifications. However, all such modifications are deemed to be within the scope of the claims. It is also to be understood that the following claims are intended to cover all of the generic and specific features of the embodiments described herein and all the statements of the scope of the embodiments which as a matter of language might be said to fall there between.