Stacked Schottky diode

10276730 ยท 2019-04-30

Assignee

Inventors

Cpc classification

International classification

Abstract

A stacked Schottky-diode having a stack with a top side and a bottom side. The stack has at least three semiconductor layers, and a first connection contact layer materially connected to the bottom side of the stack. A second connection contact layer is connected to the top side of the stack, wherein the second connection contact layer forms a Schottky contact. The second connection contact layer is disposed in a partial region of the top side and the second connection contact layer is bounded by edges. The first semiconductor layer, formed as an n.sup.+ layer, is placed on the bottom side of the stack and the first semiconductor layer. A second semiconductor layer, formed as an n.sup. layer, is placed on the first semiconductor layer. A third semiconductor layer formed as a p.sup. layer is placed on the second semiconductor layer.

Claims

1. A stacked Schottky diode comprising: a stack with a top side and a bottom side, the stack comprising at least three semiconductor layers; a first connection contact layer that is materially connected to the bottom side of the stack; and a second connection contact layer that is connected to the top side of the stack, the second connection contact layer comprises a metal or a metal compound and forms a Schottky contact, the second connection contact layer disposed in a partial region of the top side and the second connection contact layer is bounded by edges; a first semiconductor layer formed as an n.sup.+ layer, is placed on the bottom side of the stack, the first semiconductor layer having a dopant concentration of at least 10.sup.19 N/cm.sup.3 and a layer thickness between 50 m and 400 m, the first semiconductor layer comprising a GaAs compound; a second semiconductor layer formed as an n.sup. layer, is placed on the first semiconductor layer, the second semiconductor layer having a dopant concentration between 10.sup.12 and 10.sup.16 N/cm.sup.3 and a layer thickness between 10 m and 300 m, the second semiconductor layer comprising a GaAs compound; and a third semiconductor layer formed as a p.sup. layer, is placed on the second semiconductor layer, the third semiconductor layer having a dopant concentration between 10.sup.12 and 10.sup.16 N/cm.sup.3 and a layer thickness between 10 nm and 10 m, the third semiconductor layer comprising a GaAs compound, wherein the stack has a plurality of p.sup.+ regions, each spaced apart from one another, wherein the p.sup.+ regions are formed as ribs running parallel to the top side of the stack, wherein the p.sup.+ regions have a dopant concentration of 5.Math.10.sup.18 to 5.Math.10.sup.20 N/cm.sup.3, wherein the p.sup.+ regions extend from the top side of the stack into the second semiconductor layer, wherein all edges of the second connection contact layer run within p.sup.+ regions, and wherein the third semiconductor layer extends across the second semiconductor layer and is in direct contact with an entirety of a top surface of the second semiconductor layer.

2. The Schottky diode according to claim 1, wherein the three semiconductor layers are arranged in the given sequence and are materially connected to one another.

3. The Schottky diode according to claim 1, wherein a fourth semiconductor layer, formed as an n.sup. layer, is placed on the third semiconductor layer and the fourth semiconductor layer has a dopant concentration between of 10.sup.12 N/cm.sup.3 and 10.sup.16 N/cm.sup.3 and a layer thickness between 0.005 m and 10 m, and wherein the fourth semiconductor layer comprises a GaAs compound, and wherein the fourth semiconductor layer is formed on the top side of the stack and the p.sup.+ regions extend through the fourth semiconductor layer.

4. The Schottky diode according to claim 1, wherein the stack is formed monolithically.

5. The Schottky diode according to claim 1, wherein the p.sup.+ regions are produced via a mask and ion implantation.

6. The Schottky diode according to claim 1, wherein p.sup.+ regions have distances between them in a range between 3 m to 30 m.

7. The Schottky diode according to claim 1, wherein the Schottky diode has at least five p.sup.+ regions spaced apart from one another.

8. The Schottky diode according to claim 1, wherein the p.sup.+ regions are arranged along the edges and below the second connection contact layer, and wherein the ribs each have the same distance to one another.

9. The Schottky diode according to claim 1, wherein the second contact layer covers the top side of the stack only partially and/or the first contact layer covers the bottom side of the stack completely or except for a narrow edge region of less than 1 mm.

10. The Schottky diode according to claim 1, wherein a first partial stack is provided, wherein the first partial stack comprises the p.sup. layer, wherein a second stack is provided, wherein the second partial stack comprises a n.sup. layer and n.sup.+ layer, and wherein the first partial stack is connected to the second stack by a wafer bonding process.

11. The Schottky diode according to claim 1, wherein the p.sup.+ regions extend through the third semiconductor layer into the second semiconductor layer.

12. A stacked Schottky diode comprising: a stack with a top side and a bottom side, the stack comprising at least three semiconductor layers; a first connection contact layer that is materially connected to the bottom side of the stack; and a second connection contact layer that is connected to the top side of the stack, the second connection contact layer comprises a metal or a metal compound and forms a Schottky contact, the second connection contact layer disposed in a partial region of the top side and the second connection contact layer is bounded by edges; a first semiconductor layer formed as an n.sup.+ layer, is placed on the bottom side of the stack, the first semiconductor layer having a dopant concentration of at least 10.sup.19 N/cm.sup.3 and a layer thickness between 50 m and 400 m, the first semiconductor layer comprising a GaAs compound; a second semiconductor layer formed as an n.sup. layer, is placed on the first semiconductor layer, the second semiconductor layer having a dopant concentration between 10.sup.12 and 10.sup.16 N/cm.sup.3 and a layer thickness between 10 m and 300 m, the second semiconductor layer comprising a GaAs compound; and a third semiconductor layer formed as a p.sup. layer, is placed on the second semiconductor layer, the third semiconductor layer having a dopant concentration between 10.sup.12 and 10.sup.16 N/cm.sup.3 and a layer thickness between 10 nm and 10 m, the third semiconductor layer comprising a GaAs compound, wherein the stack has a plurality of p.sup.+ regions, each spaced apart from one another, wherein the p.sup.+ regions are formed as ribs running parallel to the top side of the stack, wherein the p.sup.+ regions have a dopant concentration of 5.Math.10.sup.18 to 5.Math.10.sup.20 N/cm.sup.3, wherein the p.sup.+ regions extend from the top side of the stack into the second semiconductor layer, wherein all edges of the second connection contact layer run within p.sup.+ regions, wherein the second semiconductor layer directly contacts and is disposed entirely above a top surface of the first semiconductor layer, and wherein the third semiconductor layer is directly above and abutting the second semiconductor layer.

13. The Schottky diode according to claim 12, wherein the p.sup.+ regions extend through the third semiconductor layer into the second semiconductor layer.

14. A stacked Schottky diode comprising: a stack with a top side and a bottom side, the stack comprising at least three semiconductor layers; a first connection contact layer that is materially connected to the bottom side of the stack; and a second connection contact layer that is connected to the top side of the stack, the second connection contact layer comprises a metal or a metal compound and forms a Schottky contact, the second connection contact layer disposed in a partial region of the top side and the second connection contact layer is bounded by edges; a first semiconductor layer formed as an n.sup.+ layer, is placed on the bottom side of the stack, the first semiconductor layer having a dopant concentration of at least 10.sup.19 N/cm.sup.3 and a layer thickness between 50 m and 400 m, the first semiconductor layer comprising a GaAs compound; a second semiconductor layer formed as an n.sup. layer, is placed on the first semiconductor layer, the second semiconductor layer having a dopant concentration between 10.sup.12 and 10.sup.16 N/cm.sup.3 and a layer thickness between 10 m and 300 m, the second semiconductor layer comprising a GaAs compound; and a third semiconductor layer formed as a p.sup. layer, is placed on the second semiconductor layer, the third semiconductor layer having a dopant concentration between 10.sup.12 and 10.sup.16 N/cm.sup.3 and a layer thickness between 10 nm and 10 m, the third semiconductor layer comprising a GaAs compound, wherein the stack has a plurality of p.sup.+ regions, each spaced apart from one another, wherein the p.sup.+ regions are formed as ribs running parallel to the top side of the stack, wherein the p.sup.+ regions have a dopant concentration of 5.Math.10.sup.18 to 5.Math.10.sup.20 N/cm.sup.3, wherein the p.sup.+ regions extend from the top side of the stack into the second semiconductor layer, wherein all edges of the second connection contact layer run within p.sup.+ regions, and wherein a top surface of the p.sup.+ regions is coplanar with a top surface of the third semiconductor layer.

15. A stacked Schottky diode comprising: a stack with a top side and a bottom side, the stack comprising: a first semiconductor layer, formed as an n.sup.+ layer, disposed on the bottom side of the stack, the first semiconductor layer comprising a GaAs compound; a second semiconductor layer, formed as an n.sup. layer, disposed on and above the first semiconductor layer, the second semiconductor layer comprising a GaAs compound; and a third semiconductor layer, formed as a p.sup. layer, disposed on and above the second semiconductor layer, the third semiconductor layer comprising a GaAs compound; a first connection contact layer that is materially connected to the bottom side of the stack; and a second connection contact layer that is connected to the top side of the stack, the second connection contact layer comprises a metal or a metal compound and forms a Schottky contact, the second connection contact layer disposed only in a partial region of the top side, wherein the stack has a plurality of p.sup.+ regions, each spaced apart from one another, and wherein the p.sup.+ regions are formed as ribs running parallel to the top side of the stack.

16. The Schottky diode according to claim 15, wherein the third semiconductor layer is disposed on and above the second semiconductor layer.

17. The Schottky diode according to claim 15, wherein the second semiconductor layer directly contacts and is disposed entirely above a top surface of the first semiconductor layer, and wherein the third semiconductor layer directly contacts and is disposed entirely above a top surface of the second semiconductor layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus, are not limitive of the present invention, and wherein:

(2) FIG. 1 shows a schematic view of an embodiment of the invention of a stacked Schottky diode;

(3) FIG. 2 shows a schematic view of an embodiment of the invention of a stack of a stacked Schottky diode;

(4) FIG. 3 shows a schematic view of an embodiment of the invention of a stacked Schottky diode;

(5) FIG. 4 shows a top view of an embodiment of the Schottky diode of the invention in FIG. 3.

DETAILED DESCRIPTION

(6) The diagram in FIG. 1 shows a view of a first embodiment, a stacked Schottky diode 10 having a stack 30 having at least three semiconductor layers 20, 22, 24, with a top side 32 and a bottom side 34, a first connection contact layer 40 materially connected to the bottom side 34 of the stack 30 and a metallic second connection contact layer 50, materially connected to a partial area of top side 32 of the stack, for forming a Schottky contact.

(7) First semiconductor layer 20 of stack 30 is placed as an n.sup.+ layer on bottom side 34 of stack 30 and has a dopant concentration of at least 10.sup.19 N/cm.sup.3 and a layer thickness between 50 m and 400 m.

(8) Second semiconductor layer 22 of stack 30 is placed on first semiconductor layer 20 and is materially connected to first semiconductor layer 20.

(9) Second semiconductor layer 22 is formed as an n.sup. layer and has a dopant concentration in a range of 10.sup.12 to 10.sup.16 cm.sup.3 and a layer thickness of 10 m to 300 m.

(10) Third semiconductor layer 24 of stack 30 is formed as a p.sup. layer and is materially connected to second semiconductor layer 22. Third semiconductor layer 24 has a dopant concentration in a range of 10.sup.12-10.sup.16 cm.sup.3 and a layer thickness of 0.01 m to 10 m.

(11) All three semiconductor layers 20, 22, 24 comprise a GaAs compound.

(12) Stack 30 additionally has two p.sup.+ regions 60, 62. The two p.sup.+ regions 60, 62 each have a dopant concentration of 5.Math.10.sup.18 to 5.Math.10.sup.20 cm.sup.3 and are formed as ribs spaced apart from one another, wherein each p.sup.+ region 60, 62, therefore each rib, extends in a direction perpendicular to top side 32 of stack 30 from top side 32 of stack 30 into n.sup. layer 22 and forms a strip in a first direction parallel to top side 32 of stack 30.

(13) In order to form the Schottky contact, second connection contact layer 50 covers a part of top side 32 of stack 30, wherein the part comprises a first surface region, located between the two p.sup.+ regions 60, 62, and in each case only one partial region, adjacent to the first surface region, of the two p.sup.+ regions, and second connection contact layer 50 is materially connected to third semiconductor layer 24.

(14) A further embodiment of a stack 30 of a Schottky diode 10 of the invention is shown in the diagram of FIG. 2. Only the differences from the illustration in FIG. 1 will be explained below.

(15) Stack 30 has a fourth semiconductor layer 26. Fourth semiconductor layer 26 is formed as an n layer with a dopant concentration of 1012-1016 cm3 and a layer thickness of 0.005 m to 10 m and also comprises a GaAs compound.

(16) The n.sup. layer is materially connected to the underlying p.sup. layer and forms the top side of the stack. The p.sup.+ region extends in each case through the n.sup. layer.

(17) A further embodiment of a Schottky diode 10 of the invention is shown as a side view or as a top view in the diagrams in FIGS. 3 and 4, respectively. Only the differences from the illustration in FIG. 1 will be explained below.

(18) The Schottky diode has seven rib-shaped p.sup.+ regions 60.1 to 60.7 spaced apart from one another. The part of surface 32, which part is materially connected to second connection contact layer 50 in order to form a Schottky contact, extends from first p.sup.+ region 60.1 up to seventh p.sup.+ region 60.7, wherein first p.sup.+ region 60.1 and seventh p.sup.+ region 60.7 are each covered only partially by the metal layer.

(19) The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are to be included within the scope of the following claims.