Receiver path distortion mitigation using adaptive filter feedback
10277381 ยท 2019-04-30
Assignee
Inventors
Cpc classification
H04L5/1461
ELECTRICITY
H04L5/0048
ELECTRICITY
International classification
H04B1/48
ELECTRICITY
H04L5/14
ELECTRICITY
Abstract
A duplex communication system includes a duplexer for transmitting and receiving signals, a transmitter part connected to the duplexer, and a receiver part connected to the duplexer, the receiver part comprising an amplifier for amplifying a received signal to provide an amplified received signal and a demodulator for downconverting the amplified received signal, and a second-order intermodulation distortion (IMD2) compensation module for compensating for second-order intermodulation distortion. The system also includes an adaptive filtering module that obtains a transmitter reference signal, generates filter coefficients for the IMD2compensation module and also adjusts a direct current (DC) bias of the demodulator based on the reference signal.
Claims
1. A duplex communication system comprising: a duplexer for transmitting a transmit signal and receiving a receive signal; a transmitter part connected to the duplexer, for providing the transmit signal; a receiver part connected to the duplexer, the receiver part comprising: an amplifier for receiving and amplifying the receive signal to provide an amplified receive signal; a demodulator for downconverting the amplified receive signal to provide a downconverted receive signal; and an even-order intermodulation distortion (IMD) compensation module for computing a digital correction for reducing even-order intermodulation distortion of the downconverted receive signal; an adaptive filtering module coupled to the transmitter part for obtaining a transmitter reference signal, obtaining an IMD signal y.sub.IMD based on the obtained transmitter reference signal, and providing the IMD signal y.sub.IMD to the IMD compensation module for computing the correction: and a feedback loop from the adaptive filter to the demodulator; wherein the adaptive filtering module is further configured to adjust a direct current (DC) bias of the demodulator based on the transmitter reference signal via the feedback loop.
2. The system of claim 1, wherein the adaptive filtering module comprises an adaptive filter for computing the y.sub.IMD signal as:
y.sub.IMD=w.sub.n.sup.Ha.sub.n wherein a.sub.n is a vector comprised of squared last M transmitted samples a[n], a[n1]. . . , a[nM] of the transmit signal, defined as:
a.sub.n=[|a[n]|.sup.2,|a[n1]|.sup.2, . . . ,|a[nM+1|.sup.2].sup.T and w.sub.n represents a weight coefficient vector including filter coefficients of the adaptive filtering module; wherein the IMD compensation module performs second-order intermodulation (IMD2) compensation according to the equation:
y[n]=r[n]k.sub.Txk.sub.Rxy.sub.IMD wherein: r[n] represents a received signal from a frontend of the receiver part; y[n] represents a compensated signal after IM2 compensation; k.sub.Tx represents a gain related to the transmitter part; k.sub.Rx represents a gain related to the receiver part; and w.sub.n.sup.H represents a conjugate transpose of the weight coefficient vector w.sub.n.
3. The system of claim 2 wherein the filter coefficients are updated using a least mean squares (LMS) technique according to:
w.sub.n+1=w.sub.n+a.sub.ny*[n] wherein represents an adaptation rate.
4. The system of claim 3 wherein the filter coefficients are updated by using a recursive least squares (RLS) according to:
5. The system of claim 1 wherein the adaptive filtering module is configured for adjusting the DC bias by computing a DC estimate and a DC removal according to, in which k represents a DC adaptation rate, s[n] represents the DC estimate, a[n] represents the transmit signal and [n] represents the DC removal:
DC Estimate : s[n]=k|a[n]|.sup.2+(1k)s[n1]
DC Removal : [n]=|a[n]|.sup.2s[n]
6. The system of claim 1 further comprising an error signal processing unit to perform operations on an error signal to provide error signal feedback to the adaptive filtering module.
7. The system of claim 1 wherein the transmitter part comprises a QAM modulator and wherein the demodulator in the receiver part is a QAM demodulator.
8. The system of claim 1, further comprising an antenna coupled to the duplexer, wherein the antenna and duplexer are configured as part of a frequency division duplex (FDD) microwave transceiver.
9. The system of claim 1 wherein the demodulator downconverts the received signal to baseband, whereby the system functions as a zero intermediate frequency transceiver.
10. The system of claim 5 wherein the DC removal is performed on both the reference signal and r[n].
11. The system of claim 1 wherein the receiver part comprises a local oscillator coupled to the demodulator for downconverting the amplified received signal, a low pass filter downstream of the demodulator, an analog-to-digital converter for digitizing a filter signal and a channel filter.
12. The system of claim 11 wherein the transmitter part comprises a channel filter, a digital-to-analog converter to convert a digital signal to an analog signal, a low pass filter for filtering the analog signal, a modulator coupled to a local oscillator for upconverting the signal and a power amplifier for amplifying the signal for delivery to the duplexer and antenna.
13. A method of reducing even-order intermodulation distortion (IMD) in a duplex communication system having a duplexer for transmitting and receiving signals, the method comprising: receiving a signal using the duplexer; amplifying the received signal to provide an amplified received signal; downconverting the amplified received signal using a demodulator; digitally compensating for even-order intermodulation distortion (IMD) using a compensation module that coordinates with an adaptive filtering module, wherein the adaptive filtering module performs acts of: obtaining a transmitter reference signal; generating filter coefficients for the IMD compensation module based on the reference signal; adjusting a direct current (DC) bias of the demodulator based on the reference signal via a feedback loop from the adaptive filter to the demodulator.
14. The method of claim 13 wherein the adaptive filtering module performs second-order intermodulation distortion (IMD2) compensation according to the equation:
y[n]=r[n]k.sub.Txk.sub.Rxw.sub.n.sup.Ha.sub.n where a.sub.n is a vector that represents the last M transmitted samples such that:
a.sub.n=[|a[n]|.sup.2, . . . ,|a[nM+1|.sup.2].sup.T and where: w.sub.n represents a weight coefficient vector including the filter coefficients for the adaptive filter; r[n] represents a received signal from a receiver frontend; y[n] represents a compensated signal after IM2 compensation; k.sub.Tx represents a gain related to the transmitter part; k.sub.Rx represents a gain related to the receiver part; w.sub.n.sup.H represents a conjugate transpose of the weight coefficient vector w.sub.n.
15. The method of claim 14 wherein the filter coefficients are updated using a least mean squares (LMS) technique according to:
w.sub.n+1=w.sub.n+a.sub.ny*[n] wherein represents an adaptation rate.
16. The method of claim 14 wherein the filter coefficients are updated by using a recursive least squares (RLS) according to:
17. The method of claim 13 wherein the adaptive filtering module adjusts the DC bias by computing a DC estimate and a DC removal according to, in which k represents a DC adaptation rate, s[n] represents the DC estimate, a[n] represents the transmit signal and [n] represents the DC removal:
DC Estimate : s[n]=k|a[n]|.sup.2+(1k)s[n1]
DC Removal : [n]=|a[n]|.sup.2s[n]
18. The method of claim 13 comprising adjusting the DC bias by monitoring the energy of the filter taps of the adaptive filter module until a local minimum energy is found.
19. A frequency division duplex microwave transceiver comprising: a duplexer for transmitting and receiving signals; a transmitter part connected to the duplexer; and a receiver part connected to the duplexer, the receiver part comprising an amplifier for amplifying a received signal to provide an amplified received signal and a QAM demodulator for downconverting the amplified received signal directly to baseband, and a second-order intermodulation distortion (IMD2) compensation module for digitally compensating for second-order intermodulation distortion (IMD2); and an adaptive filtering module that obtains a transmitter reference signal, generates filter coefficients for the IMD2 compensation module and also adjusts a direct current (DC) bias of the demodulator based on the reference signal via a feedback loop from the adaptive filter to the demodulator.
20. The transceiver of claim 19 wherein the adaptive filtering module performs the IMD2 compensation according to the equation:
y[n]=r[n]k.sub.Txk.sub.Rxw.sub.n.sup.Ha.sub.n where a.sub.n is a vector that represents the last M transmitted samples such that:
a.sub.n=[|a[n]|.sup.2,|a[n1]|.sup.2, . . . ,|a[nM+1|.sup.2].sup.T w.sub.n represents is a weight coefficient vector including the filter coefficients for the adaptive filter; r[n] represents a received signal from a receiver frontend; y[n] represents a compensated signal after IM2 compensation; k.sub.Tx represents a gain related to the transmitter part; k.sub.Rx represents a gain related to the receiver part; w.sub.n.sup.H represents a conjugate transpose of the weight coefficient vector w.sub.n.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) These and other features of the disclosure will become more apparent from the description in which reference is made to the following appended drawings.
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DETAILED DESCRIPTION OF EMBODIMENTS
(13) The following disclosure contains, for the purposes of explanation, numerous specific embodiments, implementations, examples and details in order to provide a thorough understanding of the disclosure. It is apparent, however, that the embodiments may be practiced without these specific details or with an equivalent arrangement. In other instances, some well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the embodiments of the disclosure. The description should in no way be limited to the illustrative implementations, drawings, and techniques illustrated below, including the exemplary designs and implementations illustrated and described herein, but may be modified within the scope of the appended claims along with their full scope of equivalents.
(14) In the embodiment shown by way of example in
(15) In the receiver part the low-noise amplifier (LNA) 28 amplifies an analog signal received from the shared antenna 12 and duplexer 14. The receiver mixer 30 (demodulator) and local oscillator 32 downconvert the analog signal to baseband. The low-pass filter (LPF) 34 filters the downconverted signal. The analog-to-digital converter (ADC) 36 converts the analog signal to a digital stream of data. The channel filter 38, e.g. a RRC filter, then filters the digital data stream numerically.
(16) The communication system depicted by way of example in
(17) On the receive path, the antenna 12 receives a signal r(t). The duplexer 14 routes the received signal r(t) from the antenna to the LNA 28. A portion of the transmit signal a(t) also leaks via the duplexer 14 to the LNA 28. The signal at the input of the LNA 28 thus includes the received signal r(t) from the antenna 12, as well as a transmit leakage signal from the power amplifier 26. The LNA 28 amplifies its input signal and provides an amplified signal. The receiver mixer 30 demodulates the amplified signal with a receive LO signal from the receiver LO 32, thus providing baseband I 35A and Q 37A signals. The receive LO signal is at a frequency of f.sub.RX, which is determined by a receiver frequency for the selected channel. The analog low-pass filter (LPF) 34 filters the baseband I 35A and Q 37A analog signals to remove unwanted frequency components of the mixed signal, and provides filtered analog I 35A and Q 37A signals at the output. The LPF 34 may also perform anti-alias filtering for the subsequent digitization process. The analog-to-digital converter (ADC) 36 digitizes the filtered analog I 35A and Q 37A signals and outputs digital I 35 and Q 37 signals. A digital filter, e.g. the RRC channel filter 38, filters the received I 35 and Q 37 signals and outputs digitally filtered I and Q signals. The RRC channel filter 38 may attenuate noise and other unwanted components generated by the digitization process. A receive (RX) data processor, not shown, processes the filtered I and Q signals to provide decoded data.
(18) In the embodiment illustrated in
(19) For the purposes of this specification, the expression reducing in the context of reducing IM2 (or IMD2) shall be understood as meaning minimizing, attenuating, diminishing, mitigating or compensating for IM2 (or IMD2).
(20) In the illustrated embodiments, the receiver chain is implemented as a homodyne receiver with a direct-to-baseband architecture. In the direct-to-baseband architecture, also referred to as a zero intermediate frequency (ZIF) transceiver, the received signal is frequency downconverted from RF directly to baseband in one stage, as shown in
(21) The system depicted in
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(25) As shown in
(26) In the illustrated embodiment, the adaptive filtering module 40 obtains an IMD signal y.sub.IMD based on the obtained transmitter reference signal and provides the IMD signal y.sub.IMD to the IMB compensation module 50 for computing the correction. The adaptive filtering module 40 adjusts a direct current (DC) bias of the demodulator 30 based on the transmitter reference signal. The adaptive filtering module 40 comprises an adaptive filter for computing the y.sub.IMD signal as:
y.sub.IMD=w.sub.n.sup.Ha.sub.n
(27) In the illustrated embodiment, the IM2 compensation is performed according to the following equation in which bolded characters represent vectors:
y[n]=r[n]k.sub.Txk.sub.Rxy.sub.IMD
or, equivalently, as:
y[n]=r[n]k.sub.Txk.sub.Rxw.sub.n.sup.Ha.sub.n
(28) where w.sub.n represents a weight coefficient vector including the adaptive filter coefficients (filter coefficients)
(29) r[n] represents the received signal from the receiver frontend
(30) y[n] represents the compensated signal after IM2 compensation
(31) k.sub.Tx represents the gain related to the Tx RF chain (transmitter part)
(32) k.sub.Rx represents the gain related to Rx RF chain (receiver part)
(33) w.sub.n.sup.H represents the conjugate transpose (Hermitian) of the weight coefficient vector w.sub.n.
(34) The a.sub.n vector is calculated as:
a.sub.n=[|a[n]|.sup.2,|a[n1]|.sup.2, . . . ,|a[nM+1|.sup.2].sup.T
(35) In the foregoing, a.sub.n is a vector that represents the last M transmitted samples.
(36) The filter coefficients may be updated using a least mean squares (LMS) technique as follows:
w.sub.n+1=w.sub.n+a.sub.ny*[n]
(37) In the above equation, represents an adaptation rate. It is noted that <<1 for stability and >=0 for negative (desired) feedback.
(38) The filter coefficients can alternatively be updated by using a recursive least squares (RLS) optimization technique as follows:
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wherein:
c.sub.n=R.sub.n1.sup.1a.sub.n is an auxiliary vector for recursive calculation of the filter coefficients;
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is a gain vector for updating the filter coefficients at an n-th time instant;
R.sub.n is an autocorrelation matrix of an input signal; and
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is an inverse of the autocorrelation matrix R.sub.n.
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(43) In at least one embodiment of this method, the DC offset of the signal is corrected digitally by estimating this offset and by subtracting it digitally from the signal. It is to be noted that the bias voltage is not computed directly, but rather the voltage is changed and effect of this change is measured by observing the energy in the filter taps of the adaptive filtering module 40. The bias voltage (DC bias) is changed until a local minimum energy is observed.
(44) The DC offset removal or lessening may be performed using a first-order infinite impulse response (IIR) filter. The DC estimate and DC removal are defined, respectively, using the following two equations, in which k represents a DC adaptation rate (wherein 0<k<<1 for the circuit to work), s[n] represents the DC estimate, a[n] represents the transmit signal and [n] represents the DC removal:
DC Estimate: s[n]=k|a[n]|.sup.2+(1k)s[n1]
DC Removal: [n]=|a[n]|.sup.2s[n]
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(53) The system and method disclosed herein is able to remove transmitter-induced second-order intermodulation (IM2) distortion using adaptive filtering techniques and by providing feedback for tuning the mixer in the RF frontend. Unlike conventional methods requiring dedicated RF circuits, the system and method disclosed herein operates fully in digital baseband, simplifies the RF design and reduces overall product cost. The accuracy of adaptive IM2 compensation provided by this system and method can support high-order modulation schemes (e.g. 4 K-8 KQAM) in microwave transmissions. For example, the adaptive IM2 compensation disclosed herein enables very high-order QAM modulation schemes (4 K-QAM and 8 K-QAM) using a SiGe Radio Frequency Integrated Circuit (RFIC) or equivalent. Another advantage is that no additional system resources such as pilot overhead or training time is required. Therefore, it is non-disruptive to data reception while operating.
(54) The system and method disclosed herein may be used to compensate for distortion arising not only from IM2 but also its harmonics, IM4, IM6, IM8, etc. Together, IM2, IM4, IM6, IM8, etc. are referred to herein as even-order intermodulation.
(55) The IMD reduction or minimization techniques, systems and methods described herein may be implemented in hardware, firmware, software, or a combination thereof. For a hardware implementation, the processing units used for IMD detection and reduction (or minimization) may be implemented within one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, micro-controllers, microprocessors, electronic devices, other electronic units designed to perform the functions described herein, a computer, or a combination thereof.
(56) For a firmware and/or software implementation, the techniques may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described herein. The firmware and/or software code may be stored in a memory and executed by a processor.
(57) A device or apparatus implementing the techniques described herein may be a standalone unit or incorporated within another device. The device may be a standalone integrated circuit (IC), a group of ICs that may include memory ICs for storing data and/or instructions, an ASIC such as a mobile station modem (MSM), a module that may be embedded within other devices, a cellular phone, wireless device, handset, or mobile unit, or base station transceiver, etc.
(58) It is to be understood that the singular forms a, an and the include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to a device includes reference to one or more of such devices, i.e. that there is at least one device. The terms comprising, having, including, entailing and containing, or verb tense variants thereof, are to be construed as open-ended terms (i.e., meaning including, but not limited to,) unless otherwise noted. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of examples or exemplary language (e.g. such as) is intended merely to better illustrate or describe embodiments of the invention and is not intended to limit the scope of the invention unless otherwise claimed.
(59) While several embodiments have been provided in the present disclosure, it should be understood that the disclosed systems and methods might be embodied in many other specific forms without departing from the scope of the present disclosure. The present examples are to be considered as illustrative and not restrictive, and the intention is not to be limited to the details given herein. For example, the various elements or components may be combined or integrated in another system or certain features may be omitted, or not implemented.
(60) In addition, techniques, systems, subsystems, and methods described and illustrated in the various embodiments as discrete or separate may be combined or integrated with other systems, modules, techniques, or methods without departing from the scope of the present disclosure. Other items shown or discussed as coupled or directly coupled or communicating with each other may be indirectly coupled or communicating through some interface, device, or intermediate component whether electrically, mechanically, or otherwise. Other examples of changes, substitutions, and alterations are ascertainable by one skilled in the art and could be made without departing from the inventive concept(s) disclosed herein.