INTEGRATED CIRCUIT OPTICAL PACKAGE

Abstract

A cap is mounted to a support substrate, the cap including a cap body and an optical shutter. The cap and support substrate define a housing. An electronic chip is disposed in the housing above the support substrate. A face of the electronic chip supports an optical device that is optically coupled with the optical shutter. The cap body is thermally conductive. Within the housing, a thermally conductive linking structure is coupled in a thermally conductive manner between the cap body and the electronic chip. The thermally conductive linking structure surrounds the electronic chip. A thermal interface material fills a portion of the housing between the thermally conductive linking structure and the cap body.

Claims

1. An integrated circuit package, comprising: a support substrate; a cap including a cap body attached on the support substrate and an optical shutter attached on the cap body; wherein the cap body is thermally conductive; wherein the cap with the support substrate defines a housing; an electronic chip disposed within the housing in a position above the support substrate, said electronic chip having a face supporting an optical device that is optically coupled with the optical shutter; and a thermally conductive linking structure located within said housing, said thermally conductive linking structure having a first end coupled in a thermally conductive manner to the cap body and having a second end coupled in a thermally conductive manner to the face of the electronic chip.

2. The package according to claim 1, wherein the thermally conductive linking structure forms a ring surrounding the optical device.

3. The package according to claim 2, wherein the ring is discontinuous.

4. The package according to claim 1, wherein the thermally conductive linking structure comprises a plurality of thermally conductive elements protruding from said face of the chip and connected to an underside of the cap body by a thermally conductive attachment.

5. The package according to claim 4, wherein the electronic chip is disposed above the support substrate according to an assembly of a flip chip type and said face of the electronic chip is a rear face of the electronic chip.

6. The package according to claim 4, wherein said face of the electronic chip is a front face of the electronic chip, wherein a rear face of the electronic chip is disposed over the support substrate and further comprising electrical connection wires configured to connect the front face of the electronic chip to the support substrate.

7. The package according to claim 1, wherein said thermally conductive linking structure surrounds a first portion of said housing containing the optical device and wherein a second portion of said housing is located between the thermally conductive linking structure and the cap body, and further comprising a thermal interface material filling the second portion of the housing.

8. An integrated circuit package, comprising: a support substrate; a cap including a cap body attached on the support substrate; wherein the cap body is thermally conductive; wherein the cap with the support substrate defines a housing; an electronic chip disposed within the housing in a position above the support substrate, said electronic chip having a face; and a thermally conductive linking structure located within said housing, said thermally conductive linking structure having a first end thermally coupled to an underside of the cap body and having a second end thermally coupled to the face of the electronic chip.

9. The package according to claim 8, wherein the thermally conductive linking structure is shaped in the form of a ring.

10. The package according to claim 9, wherein said ring for the thermally conductive linking structure surrounds an optical device of the electronic chip.

11. The package according to claim 9, wherein the ring is discontinuous.

12. The package according to claim 8, wherein the thermally conductive linking structure comprises a plurality of thermally conductive elements, wherein each thermally conductive element comprises a first end thermally coupled to the underside of the cap body and a second end thermally coupled to the face of the electronic chip.

13. The package according to claim 8, wherein the electronic chip is disposed above the support substrate according to an assembly of a flip chip type and said face of the electronic chip is a rear face of the electronic chip.

14. The package according to claim 8, wherein said face of the electronic chip is a front face of the electronic chip, wherein a rear face of the electronic chip is disposed over the support substrate and further comprising electrical connection wires configured to connect the front face of the electronic chip to the support substrate.

15. The package according to claim 8, wherein said thermally conductive linking structure surrounds a first portion of said housing, wherein a second portion of said housing is located between the thermally conductive linking structure and the cap body, and further comprising a thermal interface material filling the second portion of the housing.

16. A method for manufacturing an integrated circuit optical package, comprising: providing an electronic chip having a face supporting an optical device; producing a thermally conductive linking structure in a housing defined by a support substrate and a cap, wherein the cap includes a thermally conductive cap body attached on the support substrate and an optical shutter attached on the thermally conductive cap body; wherein the optical device is optically coupled with the optical shutter; and thermally conductive coupling a first end of the thermally conductive linking structure to the cap body and thermally conductive coupling a second end of the thermally conductive linking structure to the electronic chip disposed in the housing.

17. The method according to claim 16, wherein producing the thermally conductive linking structure comprises producing the thermally conductive linking structure as a ring surrounding the optical device.

18. The method according to claim 17, wherein the ring is a discontinuous ring.

19. The method according to claim 17, wherein producing the thermally conductive linking structure comprises producing a plurality of thermally conductive elements protruding from said face of the electronic chip; and wherein thermally conductively coupling the thermally conductive linking structure comprises attaching a first end of each thermally conductive element to said face of the electronic chip and attaching a second end of each thermally conductive element to the cap body.

20. The method according to claim 16, further comprising attaching the electronic chip on the support substrate by an assembly of a flip chip type, wherein said face of the electronic chip is a rear face.

21. The method according to claim 20, further comprising, prior to producing the thermally conductive linking structure, producing an electrically conductive connection on a front face of the chip; and after producing the thermally conductive linking structure: attaching the electronic chip on the support substrate using said electrically conductive a connection and covering the electrically conductive connection with an underfill; and attaching the cap body on the support substrate; and wherein thermally conductively coupling comprises coupling the thermally conductive linking structure with the cap body.

22. The method according to claim 16, further comprising attaching the electronic chip on the support substrate by a rear face of the electronic chip, wherein said face supporting the optical device is a front face of the electronic chip.

23. The method according to claim 22, further comprising, after producing the thermally conductive linking structure: forming electrical connection wires between the front face of the electronic chip and the support substrate; attaching the cap body on the support substrate; and thermally conductively coupling the thermally conductive linking structure with the cap body.

24. The method according to claim 16, wherein the thermally conductive linking structure surrounds a first portion of said housing containing the electronic chip, wherein a second portion of said housing is located between the thermally conductive linking structure and the cap body, and further comprising filling the second portion of the housing with a thermal interface material.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Other advantages and features of the invention will become apparent upon examination of the detailed description of non-limiting implementations and embodiments, and of the appended drawings, wherein:

[0034] FIG. 1 is a cross sectional view of an integrated circuit optical package;

[0035] FIG. 2 is a top view that illustrates an outline of protruding elements;

[0036] FIG. 3 is a cross sectional view of an integrated circuit optical package;

[0037] FIG. 4 is a cross sectional view of an integrated circuit optical package;

[0038] FIG. 5 is a flow diagram illustrating a method for manufacturing an optical package of the type illustrated in FIG. 1; and

[0039] FIG. 6 is a flow diagram illustrating a method for manufacturing an optical package of the type illustrated in FIG. 3.

DETAILED DESCRIPTION

[0040] In FIG. 1, the reference BT designates an integrated circuit optical package.

[0041] This package BT includes a support substrate 1 of structure that is conventional and known per se, as well as a cap 2 defining, with the support substrate, a housing 3.

[0042] The cap 2 includes here a cap body 20, made of a thermally conductive material, for example made of copper, attached on the support substrate here by a bead of glue 10.

[0043] The cap 2 also includes an optical shutter 21 attached on the cap body 20.

[0044] This optical shutter may be a window able to be optically transparent or filtering or have miscellaneous features such as the polarization for example, but not exclusively.

[0045] It is also possible that the optical shutter 21 comprises a lens.

[0046] The package BT also includes an electronic integrated circuit chip 4 disposed in the housing 3 above the support substrate 1. In the example of embodiment of FIG. 1, the chip 4 is attached on the support substrate according to an assembly of the flip chip type.

[0047] In other words, the front face FAV of the chip is electrically connected on metal tracks of the support substrate by electrical connection means 5, such as for example solder beads or balls embedded in an underfill 6 as known by the person skilled in the art.

[0048] The underfill 6 is intended to fill the voids existing between the connection balls 5. This underfill is electrically insulating and makes it possible to avoid possible short circuits. It also makes it possible to absorb a portion of the mechanical stresses.

[0049] The rear face FAR of the chip, opposite the front face FAV, supports an optical device 7 that is optically coupled with the optical shutter means 21.

[0050] The optical device 7 may be, in this example, a light emitting device, for example a laser diode network.

[0051] The optical package BT also includes in the housing 3 a thermally conductive linking structure 8 coupled in a thermally conductive manner between the cap body 20 and the electronic chip 4.

[0052] In this example, the thermally conductive linking structure includes a plurality of thermally conductive elements, for example made of copper, 8, protruding from the rear face FAR of the chip and integral with the cap body 20 by, for example solder pads 9 made of tin and/or silver.

[0053] As shown in FIG. 2 which illustrates the outline of the protruding elements 8, for example pillars, on the rear face FAR of the chip, it can be seen that these protruding elements form a discontinuous ring 80, delimiting a first portion 31 of the housing 3 wherein is located the optical device 7.

[0054] The ring 80 therefore surrounds this optical device.

[0055] The ring 80 also defines a second portion 32 of the housing located between the ring and the cap body 20.

[0056] In the example of embodiment of FIG. 1, this second portion 32 of the housing is empty.

[0057] The copper pillars 8 are, for example, directly in contact with the silicon of the chip 4. These pillars 8, as well as the solder pads 9 and the cap body 20 form a heat dissipation path making it possible to improve the thermal dissipation of the package.

[0058] It will be noted that the embodiment herein is not limited to an assembly of the chip of the flip chip type, as schematically illustrated in FIG. 1, but may also apply to an assembly of the chip by means of its rear face as schematically illustrated in FIG. 3.

[0059] Only the differences between FIG. 2 and FIG. 3 will now be described.

[0060] In the package BT1 of FIG. 3, the pillars 8 protrude this time from the front face FAV of the chip and the contact pads located on the front face of the chip FAV are electrically connected on metal tracks of the support substrate by means of the electrically conductive linking wire WB.

[0061] The assembly of the chip is therefore here an assembly of the wire bonding type.

[0062] The rear face FAR of the chip is attached on the support substrate 1 by means for example of a conventional glue layer 11.

[0063] The optical device 7 may be a light emitting device or a light receiving device.

[0064] The wires WB are located outside of the pillars 8.

[0065] So as to further improve the thermal dissipation of the package, it is provided, as illustrated in FIG. 4 on which is found an assembly of the chip of the flip chip type, to fill the second portion 32 of the housing with a thermal interface material (TIM) 50 by means of a hole 22 arranged in the cap body 20.

[0066] The thermal interface materials are indeed known to the person skilled in the art. By way of non-limiting example, it is possible for example to use the material from the company DOW known under the name DOWSIL DA-6534 that is a material having a significant thermal conductivity, typically 6.8 Watts per meter and per degree Kelvin.

[0067] Of course, filling the second portion 32 of the housing is also compatible with an assembly of the wire bonding type of the chip such as illustrated in FIG. 3.

[0068] In the case where the thermally conductive linking structure 8 has the form of a discontinuous ring, as illustrated for example in FIG. 2, a spacing will be selected between the various pillars of the ring that is small enough to prevent introduction of the thermal interface material into the first portion 31 of the housing containing the optical device 7, during the phase of filling the second portion 32 of the housing with this thermal interface material.

[0069] As an indication, a spacing of between 10 micrometers and 30 micrometers may be selected.

[0070] Reference will now be made more particularly to FIG. 5 to describe an implementation of a method for manufacturing an optical package of the type illustrated in FIG. 1.

[0071] In step S50, on the front faces of all of the chips produced on a semiconductor wafer, the connection balls 5 are produced in a conventional manner and known per se. As an indication, it may be possible to use a similar method to that which will be described subsequently in step S53.

[0072] Generally, the thickness of the semiconductor wafer is relatively thick. In addition, when it is necessary for certain applications, to reduce this thickness, a reduction of thickness of the semiconductor wafer is carried out in step S51, in a conventional manner and known per se.

[0073] Then, in step S52, on the front faces equipped with bump contacts of all of the chips of the wafer, a support used as a handle is attached, with the aid for example of a film or a thermally degradable glue.

[0074] Of course, steps S51 and S52 may be inverted.

[0075] In step S53, the production of the copper pillars 8 is carried out topped by their solder pads.

[0076] More specifically, on the rear face of the entire wafer an electrolytic seed layer is formed.

[0077] Then, above this seed layer, a photosensitive resin layer is deposited.

[0078] Then, through conventional steps of photolithography, resin insulation and revelation, recesses are formed in the photosensitive resin recesses defining the places for the future copper pillars.

[0079] Subsequently, the wafer is plunged into a copper bath so as to increase the copper by plating in the recesses of the resin.

[0080] Subsequently, a bath of tin and/or silver is used so as to form the solder pads that top the copper pillars.

[0081] Then, the photosensitive resin is removed and the portion of the seed layer located outside of the copper pillars is etched so as to for example reveal the silicon of the wafer.

[0082] Then, in step S54, the handle support is removed with the aid of heat treatment or by laser then, in step S55, the sawing of the wafer is carried out so as to individualize (i.e., singulate) the electronic chips provided on their front face with connection balls 5 and on their rear face with copper pillars 8 topped with solder pads.

[0083] Subsequently, in step S56 the soldering of the electronic chip on the support substrate in an oven then the delivery of the underfill 6 is carried out, in a conventional manner and known per se.

[0084] In step S57, the cap body is attached on the package with the aid of a bead of glue.

[0085] In this regard, heat treatment can be performed, for example at 260° C., so as to perform this attachment of the cap on the substrate and simultaneously melt the solder pads so as to secure the copper pillars 8 with the cap body 20.

[0086] Subsequently, a step S58 of hardening the glue located between the cap body and the substrate (glue curing) is carried out.

[0087] Then, optionally, it is possible, in step S59, to carry out the filling of the second portion 32 of the housing with the thermal interface material after having drilled the cap body 20.

[0088] Alternatively, the cap body may be drilled during its manufacture.

[0089] Reference will now be made more particularly to FIG. 6 to describe an implementation of the manufacturing method making it possible to obtain a package BT1 similar to that illustrated in FIG. 3.

[0090] This time, in step S60, on the front face of all of the chips of the wafer, the copper pillars 8 topped with solder pads are produced in a similar way to that described in step S53.

[0091] Then, in S61 the cutting of the semiconductor wafer is carried out so as to individualise the chips.

[0092] In step S62, outside of the copper pillars, the soldering of the electrically conductive linking wires is performed connecting the contact pads of the front face of the chip with metal ranges of the support substrate (wire bonding).

[0093] Then, in step S63, the attachment of the cap on the substrate is carried out in a similar way to that described above.

[0094] In step S64, the treatment for hardening the glue is carried out and optionally, the second portion 32 of the housing is filled with the thermal interface material in step S65.