ANALOGUE SIGNAL OUTPUT CIRCUIT

Abstract

The present application provides a high-efficiency low-distortion power output circuit and a high-frequency low-distortion power output circuit including a modulator, these power output circuits being configured so that an input digital value can be directly connected to an antenna. In the power output circuit, one ends of a plurality of physical elements are commonly connected to an output terminal. The other ends of the physical elements are each switchably connected to a first or second reference voltage source via a corresponding one of switching elements. This circuit is characterized by having a switch control circuit. The switch control circuit performs such control that a predetermined number of switching elements are alternately operated while the remaining number of switching elements are connected to any of the reference voltage sources or a switching element configured for interconnection is added. The power output circuit including the modulator has a switch control circuit configured to control the predetermined number of switching elements according to a digital baseband signal.

Claims

1. A power output circuit in which one ends of a plurality of physical quantity elements are commonly connected to an output terminal and the other ends of the physical quantity elements are each switchably connected to a first or second reference voltage source via a corresponding one of switching elements, comprising: a switch control circuit, wherein the switch control circuit performs such control that a predetermined number of switching elements are alternately operated while the remaining number of switching elements are connected to any of the reference voltage source and a midpoint potential thereof or a switching element configured to interconnect between the physical quantity elements is added.

2. The power output circuit in which two power output circuits according to claim 1 are in differential connection, comprising: a switch control circuit configured to commonly connect the remaining number of switching elements, thereby generating the midpoint potential.

3. The power output circuit in which two power output circuits according to claim 1 are in differential connection, comprising: a switch control circuit, wherein the switch control circuit uses the switching element(s) for interconnection, thereby interconnecting corresponding ones of the physical quantity elements during differential operation.

4. The power output circuit according to claims 1, comprising: a switch control circuit configured to alternately operate, with different phases, multiple groups obtained by division of the predetermined number of switching elements, or a switch control circuit configured to perform control equivalent to the control of alternately operating the multiple groups.

5. The power output circuit according to claims 1, comprising: a switch control circuit configured to the predetermined number of switching elements according to an input digital baseband signal.

6. The power output circuit or the power output circuit including a modulator according to claims 1, wherein each physical quantity element is a resistor, and a capacitor is added in parallel with a load.

7. The power output circuit or the power output circuit including a modulator according to claims 1 or, wherein each physical quantity element is a capacitor, and an inductor is added in series with a load.

8. A power output circuit in which one ends of a plurality of capacitors are commonly connected to an output terminal and the other ends of the capacitors are each switchably connected to a first or second reference voltage source via a corresponding one of switching elements, comprising: a switch control circuit, wherein the switch control circuit performs such control that a predetermined number of switching elements are alternately operated while the remaining number of switching elements are connected to any of the reference voltage sources.

Description

DESCRIPTION OF EMBODIMENTS

First Embodiment

[0023] FIG. 5a illustrates a circuit diagram of a first embodiment of the present application.

[0024] In this circuit, one end of each of physical quantity elements E.sub.1, E.sub.2 is connected to a reference voltage V.sub.ref or a reference point GND thereof via a corresponding one of switching elements S.sub.1, S.sub.2 according to a digital input Ii for controlling such a switch. GND may be replaced with V.sub.ref. This circuit is configured such that an output is taken from a point O.sub.1 commonly connected to the other ends of E.sub.1, E.sub.2, and then is provided to a load R.sub.L. This circuit is characterized in that the switching elements S.sub.1, S.sub.2 are controlled such that voltage waveforms V.sub.1, V.sub.2 as illustrated in FIG. 5b are obtained. V.sub.1 is a voltage obtained in such a manner that the switching element S.sub.1 is connected to V.sub.ref at a first half cycle and is connected to GND at a subsequent half cycle. V.sub.2 is a signal obtained in such a manner that such a voltage is delayed by /3 radian=60 at a phase shifter S.sub.ft. These power sources V.sub.1, V.sub.2 with the switched pulse-shaped waveforms can be used to rewrite FIG. 5a to FIG. 5c.

[0025] Moreover, in this example, E.sub.1 and E.sub.2 have an equal physical quantity.

[0026] A resistance value and a capacitance value are broadly used as the physical quantity. However, the physical quantity is not limited to these values, and may be an inductance, a current source, etc.

[0027] In the case of using the resistance value as the physical quantity, it is not avoidable that a capacitor is inserted in parallel with a load (not shown) to form a low-pass filter.

[0028] In the case of using the capacitance value as the physical quantity, it is not avoidable, as in Patent Literature 2, that for cancelling out a capacitive reactance, an inductance is inserted in series with a load (not shown) to generate resonance.

[0029] A MOS transistor is broadly used as the switching element, but the switching element is not limited to the MOS transistor.

[0030] By equivalent conversion of FIG. 5c according to the Thevenin's theorem, FIG. 5d is obtained. In this circuit, a voltage source V.sub.t is a load open end voltage represented as follows:

V.sub.t=(V.sub.1+V.sub.2)/2

By calculation using the waveforms of FIG. 5b, a waveform of FIG. 5e is obtained.

[0031] Moreover, E.sub.t is a parallel value between the physical quantities E.sub.1, E.sub.2.

[0032] This waveform is nothing less than a DC-shifted waveform obtained provided that t.sub.1=T, t.sub.2=T in FIG. 2 of Non-Patent Literature 1.

[0033] A result obtained by Fourier series expansion of this waveform is as follows:

(2/){1+sin+()sin5+( 1/7)sin7+( 1/11)sin11+. . . }

A third harmonic is cancelled out.

[0034] In the case of using the resistance as the physical quantity, only a harmonic, i.e., 14 dB fifth harmonic, is contained, and higher-order harmonics as compared to the fifth harmonic are much smaller. Thus, as illustrated in FIG. 5f, a capacitor C.sub.L indicated by a dashed line is connected in parallel with the load R.sub.L to form a primary low-pass filter. Only with this configuration, the fifth harmonic is further attenuated by about 14 dB, for example. Consequently, a carrier-to-noise ratio C/N of about 28 dBc in total can be obtained. Higher-order harmonic components as compared to the fifth harmonic are much smaller.

[0035] As necessary, a capacitor for DC component blocking may be inserted (not shown).

[0036] As illustrated in FIG. 5g, in a case where the capacitance is used as the physical quantity and an inductor L.sub.L is added to generate resonance, only a 1/Q fifth harmonic with 1/25=28 dB is further contained. For example, when Q=10, C/N=48 dBc. Higher-order harmonics as compared to the fifth harmonic are much smaller.

[0037] When the harmonics can be removed to such an extent, a direct output via an antenna might be made while complying with laws and standards. That is, a power output circuit of FIG. 1 can be realized. Even if such a circuit is insufficient, such insufficiency can be, in most cases, solved only by post-positioning of a simple filter. This provides a sufficient industrial merit.

[0038] As necessary, the capacitor for DC component blocking may be inserted (not shown).

[0039] In FIG. 5a, it is industrially important to cancel out a third harmonic by a combination of square waves. In the present embodiment, only two elements with the equal physical quantity are used, and other elements for linear operation are not used. Thus, distortion is extremely low.

[0040] Note that the method for producing a switch control signal with a delay of /3 radian=60 will be described as an example. For example, a clock signal with a sixfold frequency is generated in advance, and then, is divided to frequency. In this manner, an accurate phase delay of /3 radian=60 can be produced. Alternatively, a phase difference of /3 radian=60 can be easily produced in such a manner that a ring oscillator is formed such that three delay circuits are placed in a ring and that outputs form various output points.

[0041] The switches can be controlled in every /4 radian=45 . In this case, the third harmonic in Fourier series expansion can be canceled using 0, 1, 1+0.404, 1, 0, 1, 1 0.404, 1, 0. This can be met by preparation of a physical quantity element with a size of 0.404 and addition of the switch control of adding such a physical quantity element. Similarly, the switch control can be generally realized in every /m radian (m >2).

[0042] In FIG. 5a, an output amplitude is unambiguously determined according to the reference voltage source V.sub.ref, and therefore, is constant in principle. That is, only a carrier wave with a constant carrier wave output amplitude is available for a frequency-modulated wave, a phase-modulated wave, and a telegraph wave according to ON/OFF of the carrier wave.

[0043] The reference voltage source V.sub.ref is replaced with a voltage obtained by DA conversion of a relatively-low-frequency baseband signal, and as a result, a high-frequency signal with an amplitude corresponding to such a voltage can be directly generated. That is, an amplitude-modulated wave and a double-sideband-modulated wave can be output.

[0044] However, a baseband DA converter and/or A-class operation of a buffer amplifier for DA converter needs to be performed. For this reason, this configuration should be power-hungry, and is not efficient. An invention with an enhanced efficiency will be described below as countermeasures against the above-described issue.

Second Embodiment

[0045] FIG. 6a illustrates a circuit diagram of a second embodiment of the present application. In this circuit, N physical quantity elements E.sub.1 to E.sub.N can be each switched to either of a reference power source V.sub.ref or a reference point GND thereof by a corresponding one of switching elements S.sub.1 to S.sub.N. In this circuit, commonly-connected other ends of the physical quantity elements serve as an output. Description of the same elements as those of FIG. 5a will not be repeated.

[0046] First, all of the physical quantity elements have the same physical quantity value E.sub.u. The following case is assumed. Of the N physical quantity elements, N/2+x physical quantity elements E1 to E.sub.N/2+2x are connected to the V.sub.ref side, and the remaining N/2x physical quantity elements E.sub.N/2+2x+1 to E.sub.N are connected to the GND side. When FIG. 6a is rewritten to FIG. 6b by means of a power source according to a switch state, and is converted into a circuit of FIG. 6c by application of the Thevenin's theorem, an open-end voltage V.sub.t is represented as follows:

V.sub.t=V.sub.ref(N/2+x)/N=V.sub.ref(0.5+x/N)

Moreover, an equivalent physical quantity Et is constantly a value when N elements with E.sub.u are connected in parallel. For example, when N=64 and x=31 to +31, this is a normal 6-bit DA converter. An optional output voltage of 0 to V.sub.ref can be obtained with a resolution of 6 bit according to a digital value x.

[0047] First, in the above-described example, 2x physical quantity elements E.sub.1 to E.sub.2x are, at high speed, switched to V.sub.ref at a first half cycle, and is switched to GND at a subsequent half cycle. The remaining N/2x physical quantity elements E.sub.2x+1 to E.sub.N/2+2x are constantly connected to V.sub.ref. The N/2x physical quantity elements E.sub.N/2+2x+1 to E.sub.N are constantly connected to GND. With this configuration, a high-frequency power output with an amplitude of V.sub.ref.Math.x/N can be obtained as the open-end output voltage V.sub.t. This is output to a load R.sub.L according to the Thevenin's theorem. In this case, a square wave is output to the load R.sub.L. Thus, for forming a low-pass filter, connection of a capacitor C.sub.L is recommended.

[0048] Note that instead of the square-wave-shaped output, an optional sinusoidal high-frequency output can be obtained in such a manner that a digitalized sinusoidal signal is sequentially provided for the number x of elements, for example. An optional modulated wave can be also output by using, as x, a value obtained by desired modulation calculation in a digital domain.

[0049] FIG. 6d illustrates an example of a circuit in a case where the physical quantity elements of the circuits of FIGS. 6a to 6c are resistors. The capacitor C.sub.L forming the low-pass filter is added in parallel with the load R.sub.L. This circuit is a DA converter itself. When 50 is selected as the equivalent physical quantity E.sub.t, this circuit can be directly connected to standard transmission path and measuring instrument. The equivalent physical quantity E.sub.t can be set according to an antenna characterisitc impedance, such as 75, 200, or 300.

[0050] FIG. 6d has a disadvantage that a power efficiency is low. According to simple calculation, when a load resistance is R.sub.L, the equivalent physical quantity E.sub.t is equal to R.sub.L, and a voltage of V.sub.ref is applied, the maximum V.sub.ref peak-to-peak sinusoidal wave is output at an open end. Thus, upon connection of a matched load, V.sub.ref/2 pp is obtained, and {(V.sub.ref/2)/(2sqrt(2))}.sup.2/R.sub.L=V.sub.ref.sup.2/32R.sub.L is, in effective value equivalent, obtained as the maximum output power (an AC component) transmitted to the load. For example, the output power in the case of V.sub.ref=1V and R.sub.L=50 is 0.625 mW =4 dBm.

[0051] On the other hand, upon no signal output, i.e., x=0, DC current flows from V.sub.ref to GND although AC output power is zero. In an equivalent manner, a first resistor 2R.sub.L is connected to V.sub.ref, and a second resistor 2R.sub.L is connected to GND. Thus, a useless static power of V.sub.ref.sup.2/4R.sub.L is consumed. In fact, this leads to eight times higher than the maximum output power.

[0052] In the case of LSI of an analogue circuit, a differential configuration is generally employed for reducing noise influence. In fact, power output circuits of Patent Literature 1 and FIG. 3 also have a differential configuration.

[0053] A new circuit overcoming the disadvantage of FIG. 6d in the case of the differential configuration will be proposed as FIG. 6e.

[0054] First, in FIG. 6e, physical quantity elements are resistors as in FIG. 6. 2x physical quantity elements E.sub.1 to E.sub.2x connected to a positive output O.sub.1 are, at high speed, switched to V.sub.ref at a first half cycle, and are switched to GND at a subsequent half cycle. The remaining N2x physical quantity elements E.sub.2x+1 to E.sub.N are constantly in a physical quantity element interconnection. Similarly, 2x physical quantity elements E.sub.1 to E.sub.2x connected to a negative output O.sub.2 are switched to GND at the first half cycle, and are switched to V.sub.ref at the subsequent half cycle. The remaining N/2x physical quantity elements E.sub.2X+1 to E.sub.N are constantly in inter-resistor connection.

[0055] With this configuration, the potential of each portion connected between the physical quantity elements via the switching elements S.sub.2x+1 to S.sub.N, S.sub.2x+1 to S.sub.N is an average value of O.sub.1 and O.sub.2. Because of differential operation, such an average value is equal to an average value of V.sub.ref and GND, i.e., a midpoint potential V.sub.ref. V.sub.ref=V.sub.ref/2 is satisfied.

[0056] The potential of each portion connected between the resistors is equal to the midpoint potential V.sub.ref. Thus, a circuit configured such that all of these portions are interconnected with each other and are connected to a reference power source of V.sub.ref/2 as in FIG. 6f is equivalent to the above-described circuit. This is because the portions with the same potential, i.e., the portions with a zero-potential difference, are connected together, and therefore, no current flows through this connection according to the Ohm's law and no state change is brought due to the presence or absence of this connection. The upper half of FIG. 6f as a positive side and the lower half of FIG. 6f as a negative side are equivalent respectively to two power output circuits connected between V.sub.ref and V.sub.ref and between V.sub.ref and GND.

[0057] On the other hand, in the circuits of FIGS. 6e and 6f, AC output power is zero upon no signal output, i.e., x=0. Needless to say, a potential difference between positive and negative output terminals O.sub.1 and O.sub.2 is zero. Thus, the potential difference is zero between the resistors connected via the switching elements S.sub.2x+1 to S.sub.N, S.sub.2x+1 to S.sub.N. No current flows between these resistors, and no useless static power is consumed. There is an advantage that a power efficiency can be amazingly improved as compared to the example described in paragraph 0024.

[0058] Moreover, in FIG. 6e, control is collectively performed for an even number of switches in increments of 2x for convenience of description. In this example, when 2x is replaced with y, control for y switches and N/2y switches can be performed, and the y switches can be controlled one by one. That is, there is an advantage that the number of switches can be reduced to half. Although not described in the following embodiments, similar conversion can be made in the case of performing the switch control in increments of 2x, needless to say.

[0059] Note that no current eventually flows through each portion connected between the switching element S.sub.2x+to S.sub.N and the switching element S.sub.2x+1 to S.sub.N. Thus, this example is not limited to the state in which the V.sub.ref terminal is connected to the reference power source V.sub.ref/2 as in FIG. 6f. A state in which the V.sub.ref terminal remains open is equivalent to the above-described state. Alternatively, a state in which the V.sub.ref terminal is bypassed by an added bypass capacitor and a state in which the V.sub.ref terminal is connected to the reference power source V.sub.ref/2 via a great resistor are also equivalent to the above-described state.

[0060] Moreover, in FIGS. 6d to 6f, one end of each single resistor is connected to V.sub.ref or GND via the switching element, for example. Instead, switching may be performed such that a plurality of resistors are connected to V.sub.ref or GND or are opened via different switching elements. In this case, there is an advantage that through-current upon switching can be reduced.

[0061] FIG. 6g illustrates an example of a circuit in a case where the physical quantity elements of the circuits of FIGS. 6a to 6c are capacitors. A resonance inductor is inserted in series with the load R.sub.L. As will be clearly seen from the equivalent circuit of FIG. 6c, this circuit is a circuit including an N gradation voltage source, a resonance circuit having an equivalent capacitor and an inductor, and a load T.sub.L. For example, when N=1024, such a circuit is equivalent to a 10-bit DA converter, and can make, with a resolution of about 0.1%, an optional analogue output including a sinusoidal wave and a modulated wave. Moreover, such an equivalent circuit is the same as an E-class circuit, and it can be expected that the equivalent circuit exhibits an extremely-high efficiency.

[0062] Based on the above-described discussion, FIG. 6g is nothing less than an output of an E-class amplifier super-multilevel with a high efficiency, such a super-multilevel output having never been possible to obtain. This means a lot to an industrial area, and means that high-efficiency low-distortion products can be produced in a broad area including not only wireless communication but also wired communication and DC/AC converters, for example.

[0063] In paragraph 0020, the number x of switching elements to be turned ON/OFF has been described. Actual switch control can be easily realized in such a manner that the signal to be switched in every half cycle as described above is gated by an output of a well-known circuit called a thermometer decoder configured to make, to a high level, the number of signals according to the number x of elements. In addition, the following methods are conceivable, for example. As another example, switching element control terminals are collectively connected in increments of one, two, four, eight, . . . terminals in advance, and then the signal to be switched in every half cycle is gated in terms of a binary code of x. As the other example, physical quantity elements with a size corresponding to a single element, a size corresponding to two elements in parallel, a size corresponding to four elements in parallel, and a size corresponding to eight elements in parallel are produced in advance, and then, these elements are switched by switching elements controlled in terms of the binary code of x. A combination of these methods and other methods may be employed, and the present application is not limited to the methods described as examples.

Third Embodiment

[0064] Next, a power output circuit including a modulator will be described as a third embodiment of the present application with reference to FIG. 7a. FIG. 7a is, as a circuit diagram, substantially the same as that of FIG. 6a. Note that the method for controlling switching elements S.sub.1 to S.sub.N has the following features.

[0065] First, in FIG. 7a, x physical quantity elements E.sub.x+1 to E.sub.1 are, with a high-speed carrier wave, switched to V.sub.ref at a first half cycle, and are switched to GND at a subsequent half cycle. Other x physical quantity elements E.sub.2x to E.sub.x+1 are similarly switched with a signal obtained in such a manner that the high-speed carrier wave is delayed by /3 radian=60. The remaining N/2x physical quantity elements E.sub.2x+1 to E.sub.N/2+2x are constantly connected to V.sub.ref. N/2x physical quantity elements E.sub.N/2+2x+1 to E.sub.N are connected to GND.

[0066] With this configuration, a high-frequency power output with an amplitude of V.sub.ref.Math.x/N can be obtained as an open-end output voltage V.sub.t.

[0067] As described above, when an output waveform is subjected to Fourier series expansion, a third harmonic is cancelled out, and fifth, seventh, eleventh, . . . harmonics are contained. Thus, a harmonic attenuation degree similar to that described in 0013 can be obtained. When a relatively-low frequency baseband signal is provided for the number x of elements, an amplitude-modulated wave (precisely, a double-sideband-modulated wave) of this signal by means of the high-speed carrier wave is obtained.

[0068] This circuit is characterized in that this circuit is a high-frequency power output circuit also having a modulator function. That is, as illustrated in FIG. 7a, a relatively-low-speed digital baseband signal is input as a digital value x. Then, 2x switches set according to such a value are alternately controlled at high speed. This can realize a compact power output circuit allowing direct output to an antenna.

[0069] In this embodiment, FIGS. 7d to 7e using at least a resistance as a physical quantity or FIGS. 7f to 7g using a capacitance as the physical quantity can be used. Note that the physical quantity is not limited to above. Moreover, a high-efficiency power output circuit as in the second embodiment can be realized in such a manner that every N2x switches S.sub.2x+1 to S.sub.N, S.sub.2x+1 to S.sub.N are, using circuits of FIGS. 7e and 7g, not connected to V.sub.ref and V.sub.ref, but are interconnected with each other.

[0070] In fact, when switch operation described in 0032 has been finely analyzed in the differential circuits of FIGS. 7e and 7g, it has been found that the x physical quantity elements E.sub.x+1 to E.sub.1 are, in a range of 0 to /3 radian, connected to V.sub.ref and the other x physical quantity elements E.sub.2x to E.sub.x+1 are connected to GND. It is obvious that connection between the physical quantity elements E.sub.2x to E.sub.1 and E.sub.2x to E.sub.1 is changed to interconnection by control of the switching elements S.sub.1 to S.sub.2X during this period, and therefore, current flowing through these physical elements can be zero during this period. The same applies to a period of to 4/3.

[0071] As described above, more power consumption reduction can be realized by more detailed switch control.

[0072] As described in 0017, a clock signal with a sixfold frequency is, for example, generated in advance, and then, is subjected to frequency division. In this manner, a signal with a phase delay of /3 radian=60 can be produced. From this signal, a switch control signal can be produced according to a simple logic. Alternatively, a ring oscillator configured such that three delay circuits are arranged in a ring pattern may be used.

[0073] Although not specifically shown in the figure, elements configured to perform high-speed switching between the reference power source V.sub.ref and GND may be, in addition to above, provided as a switch control method, for example. Further, these elements may be collectively connected via x switching elements to be relatively slowly switched with a baseband signal, and then, may be connected to elements to be switched at high speed.

[0074] With this configuration, there is an advantage that the switches to be operated at high speed can be limited.

[0075] As described in 0002, the technique of modulating, with a high-speed signal with a phase difference of /2 radian=90, two signals called I and Q in FIG. 2 has been broadly used.

[0076] This can be realized in such a manner that two power output circuits including modulators as in the third embodiment of the present application are connected in parallel to perform switch control for each of I and Q. Note that the contents of this circuit include a group of series connections of 2N (4N in the case of differential operation) physical elements and switches. Thus, the two power output circuits including the modulators may be collectively produced together to accurately perform control for the number of switches of each circuit.

INDUSTRIAL APPLICABILITY

[0077] According to the invention of the present application, a high-efficiency power output circuit with less harmonic interference can be configured to defy conventional wisdom without using a transistor configured to operate in a linear region. Moreover, few elements causing distortion are provided, and therefore, distortion is extremely low.

[0078] With this configuration, necessity for a power amplifier circuit employing analogue operation and having been required so far can be eliminated. Specifically, an output of wireless equipment equipped with the power output circuit of the invention of the present application can be directly connected to an antenna, leading to significant cost down.

BRIEF DESCRIPTION OF THE DRAWINGS

[0079] FIG. 1 illustrates an example of a block diagram of a wireless transmitter employing the present application;

[0080] FIG. 2 illustrates an example of a block diagram of a prior typical wireless transmitter;

[0081] FIG. 3 illustrates an example of a prior typical wired communication pulse output circuit having a pre-emphasis function;

[0082] FIG. 4 illustrates an example of a prior typical E-class power amplifier circuit;

[0083] FIG. 5 illustrates a first embodiment of the present application, FIG. 5a illustrates a basic circuit diagram, FIG. 5b illustrates an internal waveform applied by switching, FIG. 5c illustrates an equivalent circuit using a power source, FIG. 5d illustrates an equivalent circuit employing the Thevenin's theorem, FIG. 5e illustrates an internal waveform employing the Thevenin's theorem, FIG. 5f illustrates an example using resistors, and FIG. 5g illustrates an example using capacitors;

[0084] FIG. 6 illustrates a second embodiment of the present application, FIG. 6a illustrates a basic circuit diagram, FIG. 6b illustrates an equivalent circuit using a power source, FIG. 6c illustrates an equivalent circuit employing the Thevenin's theorem, FIG. 6d illustrates an example using resistors, FIG. 6e illustrates a high-efficiency example using resistors, FIG. 6f illustrates another high-efficiency example using resistors, and FIG. 6g illustrates a high-efficiency example using capacitors and allowing variable output and power consumption reduction; and

[0085] FIG. 7 illustrates a third embodiment of the present application, FIG. 7a illustrates a basic circuit diagram, FIG. 7b illustrates an equivalent circuit using a power source, FIG. 7c illustrates an equivalent circuit employing the Thevenin's theorem, FIG. 7d illustrates an example using resistors, FIG. 7e illustrates a high-efficiency example using resistors, FIG. 7f illustrates another high-efficiency example using resistors, and FIG. 7g illustrates a high-efficiency example using capacitors and allowing variable output and power consumption reduction.

DESCRIPTION OF REFERENCE SIGNS

[0086] E.sub.1 to E.sub.N N pieces of physical quantity elements

[0087] E.sub.1 to E.sub.N N pieces of physical quantity elements

[0088] S.sub.1 to S.sub.n N pieces of switching elements

[0089] S.sub.1 to S.sub.n N pieces of switching elements

[0090] Sft phase shifter

[0091] V.sub.ref, V.sub.ref reference voltage sources

[0092] GND reference voltage (ground)

[0093] O.sub.1, O.sub.2 output terminals

[0094] V.sub.1, V.sub.2 voltage sources

[0095] V.sub.t equivalent voltage source

[0096] I.sub.1 input signal

[0097] R.sub.L, R.sub.L1, R.sub.L2 load resistors

[0098] C.sub.L, C.sub.L1, C.sub.L2 capacitors

[0099] L.sub.L, L.sub.L1, L.sub.L2 inductor