PLASMA REACTOR HAVING DIGITAL CONTROL OVER ROTATION FREQUENCY OF A MICROWAVE FIELD WITH DIRECT UP-CONVERSION

Abstract

A plasma reactor for processing a workpiece has a microwave source with a digitally synthesized rotation frequency using direct digital up-conversion and a user interface for controlling the rotation frequency.

Claims

1. A plasma reactor comprising: a cylindrical microwave cavity overlying a workpiece processing chamber, and first and second coupling apertures in a sidewall of said cylindrical microwave cavity spaced apart by an angle; a system-controlling clock to generate a system clock signal; and a microwave source having a microwave frequency and comprising a microwave controller having respective microwave outputs coupled to respective ones of said first and second coupling apertures, said microwave controller including digital circuitry configured to receive the system clock signal and generate therefrom two digital outputs, at least one of the two digital outputs being a combination of a first component having an first frequency that is lower than the microwave frequency and a second component having a second frequency that is lower than the first frequency, a digital-to-analog converter coupled to said two digital outputs to generate two analog outputs corresponding to said two digital outputs, and an up-converter coupled to said two analog outputs to convert the two analog outputs to the microwave frequency to provide said microwave outputs.

2. The reactor of claim 1, wherein the digital circuitry is configured to generate first and second digital modulation signals at the second frequency and a first digital carrier signal at the first frequency.

3. The reactor of claim 2, wherein the digital circuitry includes a first multiplier to multiply the first digital carrier signal by the first digital modulation signal to generate a first of the two digital outputs.

4. The reactor of claim 3, wherein the digital circuitry includes a second multiplier to multiply the second digital carrier signal by the first digital modulation signal to generate a second of the two digital outputs.

5. The reactor of claim 2, wherein the digital circuitry is configured to a second digital carrier signal at the first frequency.

6. The reactor of claim 4, wherein the first digital carrier signal provides a first of the two digital outputs.

7. The reactor of claim 6, wherein the digital circuitry includes a first multiplier to multiply the first digital carrier signal by the first digital modulation signal, a second multiplier to multiply the second digital carrier signal by the second digital modulation signal, and an adder to add outputs of the first multiplier and the second multiplier to provide a second of the two digital outputs.

8. The reactor of claim 2, wherein the digital circuitry includes a first multiplier to multiply the first digital carrier signal by the first digital modulation signal, and a second multiplier to multiply the first digital carrier signal by a constant, and an adder to add outputs of the first multiplier and the second multiplier, the second digital modulation signal, and a first adder to add outputs of the first multiplier and the second multiplier to provide a first of the two digital outputs.

9. The reactor of claim 8, wherein the digital circuitry includes a third multiplier to multiply the second digital carrier signal by the second digital modulation signal, and a fourth multiplier to multiply the second digital carrier signal by the constant, and a second adder to add outputs of the third multiplier and the fourth multiplier to generate a second of the two digital outputs.

10. The reactor of claim 2, wherein said first and second digital modulation signals comprise, respectively, a cosine-form component I and a sine-form component Q.

11. The reactor of claim 10, wherein digital circuitry includes a first RAM containing successive samples of said cosine-form component I, a second RAM containing successive samples of said sine-form component Q, and a first clock pointer directed at the successive samples of I and Q in synchronism with said second frequency.

12. The reactor of claim 11, wherein said digital circuitry comprises a third RAM containing successive samples of said first digital carrier signal, and a second clock pointer directed at the successive samples of said digital carrier signal in synchronism with said first frequency.

13. The reactor of claim 1, wherein said angle is 90 degrees.

14. The reactor of claim 1, further comprising a user interface for allowing a user to specify said second frequency.

15. The reactor of claim 1, wherein the system-controlling clock includes a phase locked loop module to generate the system clock signal.

16. The reactor of claim 15, wherein the phase locked loop is configured to generate an up-conversion signal at an up-conversion frequency, and the up-converter receives the up-conversion signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] So that the manner in which the exemplary embodiments of the present invention are attained can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. It is to be appreciated that certain well known processes are not discussed herein in order to not obscure the invention.

[0034] FIG. 1A is an elevational view of a reactor employed in one embodiment.

[0035] FIG. 1B is a plan view corresponding to FIG. 1A.

[0036] FIG. 1C depicts a modification of the embodiment of FIG. 1B including an ignition electrode.

[0037] FIG. 2 is a block diagram of a system in one embodiment.

[0038] FIG. 3 is a block diagram of a signal processing component in the system of FIG. 2.

[0039] FIG. 4 is a block diagram of a portion of the system of FIG. 3.

[0040] FIGS. 5A through 5H depict microwave field behavior for different values of a user-selected phase angle between the two microwave signals coupled to the circular cavity.

[0041] FIG. 6 is a block diagram of a portion of the system of FIG. 3 in accordance with a second embodiment.

[0042] FIG. 7 is a block diagram of a portion of the system of FIG. 3 in accordance with a third embodiment.

[0043] FIG. 8 is a block diagram of a system for generating a rotating microwave field using direct digital up-conversion.

[0044] FIG. 8A is a simplified block diagram of a functionality common to DDUP IC's employed in the system of FIG. 8.

[0045] FIG. 9 is a block diagram of an FPGA of the system of FIG. 8 configured for amplitude modulation.

[0046] FIG. 10 is a block diagram of an FPGA of the system of FIG. 8 configured for phase modulation.

[0047] FIG. 11 is a block diagram of an FPGA of the system of FIG. 8 configured for simultaneous slow and fast rotational modes.

[0048] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.

DETAILED DESCRIPTION

[0049] In order to resolve the issue of plasma uniformity at high chamber pressures at which the plasma is unable to follow fast rotations of the microwave field, embodiments described below provide new modes of microwave cavity excitation. A first mode is a slow rotation mode excited by amplitude modulation. A second mode is a slow pulsing mode excited by phase modulation. In these modes, the modulation frequency can be arbitrarily low, typically 0.1-1000 Hz, which corresponds to the rotation period of 1 ms-10 s. At such low rotation frequencies, a localized plasma under high chamber pressure can follow the rotation, thus enabling a uniform distribution of plasma ion density.

[0050] FIG. 1A is a simplified side view of a plasma reactor 100 including a processing chamber 110 enclosed by a wall 111 and containing gas under vacuum pressure and a workpiece support 112 for supporting a workpiece 114. A cylindrical cavity 120 overlying the processing chamber 110 is enclosed by a side wall 121a, a ceiling 121b and a floor 122 having slots 124 shown in FIG. 1B. The walls 121a and 111 can be connected by metal structures, depending upon application. A dielectric plate 130 provides a vacuum seal under the floor 122. The dielectric plate 130 is preferably formed of a material that is transparent to microwave radiation. FIG. 1C depicts an embodiment in which the floor 122 has an opening 810 and an auxiliary ignition electrode 820 is disposed in the opening 810 with a vacuum seal (not shown). The auxiliary ignition electrode 820 is driven by an RF source 830 of an RF frequency in a range of 100 Hz-10 MHz. The RF source 830 may include an impedance match (not illustrated). The floor 122 and/or the wall 111 of the processing chamber 110 can function as a ground plane with respect to the auxiliary ignition electrode 820. Alternatively, an auxiliary ignition electrode can be located on the wall 111 by providing an additional opening and vacuum seal. The electrode 820 and the ground plane are separated only by the opening 810. In summary, the auxiliary ignition electrode 820 together with the ground plane (i.e., the floor 122 and/or the wall 111 of the cavity 110) form a capacitively coupled RF igniting circuit to help ignition of plasma that is ultimately sustained by microwave power.

[0051] FIG. 2 shows a system of dual microwave injection into the cylindrical cavity 120. Two identical microwave modules Set-1 and Set-2 are connected to the cylindrical cavity 120 at spatially orthogonal positions, P and Q. The opposite ends of the modules Set-1 and Set-2 are connected to a dual digital phase and amplitude generator 340. The dual digital phase and amplitude generator 340 supplies microwave seed signals RF1out and RF2out to the modules Set 1 and Set 2, respectively. In each module Set-1 and Set-2, the seed signal is amplified by an amplifier 350, and is transmitted to a circulator 352 and a tuner 354, typically 3-stub tuner, for impedance matching. Coaxial transmission lines 356 conduct microwave power from the output of the amplifier 350 to the tuner 354. In this example, a coaxial-to-waveguide transformer 358 is inserted between the tuner 354 and a coupling aperture 360 of the cylindrical cavity 120. However, if a pole or loop antenna is adopted instead of the coupling aperture, the transformer 358 is not needed. A dummy load 362 is connected to one port of the circulator 352 where reflected power may be dumped to protect the amplifier 350. The microwaves are introduced into the cylindrical cavity 120 through the coupling aperture 360 of each module Set-1 and Set-2, and excite the TE.sub.111 mode in the cylindrical cavity 120. In FIG. 2, denotes an azimuthal coordinate, where =0 is at point P, and =/2 is at Q. denotes a temporal phase angle difference of the microwave seed signal RF2out referenced to the microwave seed signal RF1out.

Slow rotation mode by amplitude modulation:

[0052] The TE.sub.111 mode can be provided by proper selection of the radius and height of the cylindrical cavity 120 at a given angular frequency of the dual digital phase and amplitude generator 340. When microwaves are injected through the coupling aperture at P in this condition, clockwise and anti-clockwise rotating waves are simultaneously launched with equal probabilities. The axial magnetic field component H.sub.z of TE.sub.111 mode at a position (r, , z) can be written using Bessel function J.sub.1 of the first kind as

H.sub.Z=A[cos(t)+cos(+t)]J.sub.1(r)cos(z),(1)

where A is the amplitude, is the axial wave number determined by the cavity height, and is the radial wavenumber defined by

[00001]${}^2={\left(\frac{}{c}\right)}^2-{}^2.$

Considering the fixed positions of r and z, equation (1) can be rewritten in a normalized form as

.sub.P=a[cos(t)+cos(t+.sub.h)]=2a coscost.(2)

[0053] In the same manner, the wave launched from the coupling aperture at position Q can be written with a phase delay as:

.sub.Q=b[sin(t+/2)+cos(+t/2)]=2b sin cos(t).(3)

[0054] In the case of in-phase injection (=0) of the carrier frequency , the simultaneous dual injection from P and Q yields the resultant field:

=.sub.P+.sub.Q=2(a cos+b sin)cost(4)

[0055] For slow rotation, the amplitudes a and b are modulated at a low angular frequency .sub.a (<<) as

a=ccos.sub.at(5)

b=ccos(.sub.at)(6)

where is the phase difference in the modulation. Then eq. (4) is reduced to:

=Acos(.sub.at+)cost(7)

where the amplitude A and the phase are given by

[00002]$\begin{array}{cc}A=2.Math.c.Math.\sqrt{1+\sin .Math..Math.2.Math..Math..Math.\cos .Math..Math.}& \left(8\right)\\ \tan .Math..Math.=-\frac{\sin .Math..Math..Math..Math.\sin .Math..Math.}{\cos .Math..Math.+\sin .Math..Math..Math..Math.\cos .Math..Math.}& \left(9\right)\end{array}$

In a special case of

[00003]$=\frac{}{2}$

(positive quadrature), a simpler relation applies:

=2ccos(.sub.at)cost.(10)

In the case of

[00004]$=-\frac{}{2}$

(negative quadrature), equations (7), (8) and (9) reduce to a similar relation:

=2ccos(+.sub.at)cost.(11)

Equations (10) and (11) respectively express the clockwise and anti-clockwise rotation of field at the low modulation frequency .sub.a.

[0056] The foregoing description is provided in terms of the axial magnetic component H.sub.z. However, all other components of the magnetic field as well as the electric field rotate together with H.sub.z.

[0057] To excite the clock-wise rotating wave represented by equation 10 (or equation 11), waves launched from P and Q should have forms proportional to equation 5 and equation 6 with the carrier angular frequency , and

[00005]$=\frac{}{2}.Math..Math.\left(\mathrm{or}.Math.-\frac{}{2}\right),$

respectively:

.sub.P=cos.sub.at cost(12)

and

.sub.Q=sin.sub.atcost(13)

The wave field inside the cylindrical cavity 120 rotates with the angular frequency .sub.a, the direction (clockwise or anti-clockwise) depending upon the sign in equation (13). Introducing initial phases .sub.l for and .sub.h for , equations (12) and (13) can be expressed in a more general form as

.sub.P=cos(.sub.at+.sub.l)cos(t+.sub.h)

and

.sub.Q=sin(.sub.at+.sub.l)cos(t+.sub.h)

where .sub.l and .sub.h are arbitrary initial phases. Without losing generality, .sub.l is set at 0 in the remainder of this description, providing the following simplification:

.sub.P=cos.sub.at cos(t+.sub.h)(14)

.sub.Q=sin.sub.atcos(t+.sub.h)(15)

[0058] Conventional analog amplitude modulators can generate the input signals represented by equations (14) and (15). However, in such analog modulators, it is difficult to change the rotation frequency .sub..sub.a=.sub.a/2. Embodiments herein employ a digital controller, such as a field programmable gate array (FPGA) using different random access memories (RAMs) to generate the desired waveforms, in order to this issue. However, to implement equations (14) and (15) in a digital controller, time scale differences between sin.sub.a.sup.t and cos(t+.sub.h) should be considered carefully. Otherwise, an undesirably large amount of RAM may be required to implement the terms of cos.sub.a.sup.t and sin.sub.a.sup.t.

[0059] The dual digital phase and amplitude generator 340 generates the microwave signals RF1out and RF2out furnished to the modules Set1 and Set2. The internal structure of the amplitude generator 340 is depicted by the block diagram of FIG. 3, in accordance with one embodiment. The following description of FIG. 3 refers to equations (14) and (15), but only the version of equation (15) corresponding to the plus sign is considered, for simplicity. A system-controlling clock, .sub.sys, and an up-conversion frequency .sub.mixRef are generated in a PLL (phase locked loop) module 600. User-chosen values of .sub.h, B, .sub.106 related to equations (14) and (15) are entered via a user interface, which may be implemented as a computer or PC 602, where B is proportional to . Those data are transferred to a FPGA (field programmable gate array) 604 driven by .sub.sys. The FPGA 604 generates two digital signals, in1 and in2 of an intermediate frequency, in a manner discussed below. The digital signals in1 and in2 are transmitted separately to a DAC (digital to analog converter) 608. The DAC 608 converts the digital signals in1 and in2 to analog IF (intermediate frequency) signals defined by B cos.sub.at cos(.sub.ift+.sub.h) and B sin.sub.at cos(.sub.ift+.sub.h), respectively. The intermediate angular frequency is .sub.if=2.sub.if. The two analog IF signals Bcos.sub.at cos(.sub.ift+.sub.h) and Bsin.sub.at cos(.sub.ift+.sub.h) are up-converted to the microwave angular frequency =2 by an up-converter 612, using the up-conversion frequency .sub.mixRef, to produce the output signals of equations (14) and (15). These output signals are labelled in FIG. 3 as RFout1 and RFout2, and are coupled through the respective modules Set-1 and Set-2 to the respective coupling apertures 360 at positions P and Q of the cylindrical cavity 120 of FIG. 2.

[0060] FIG. 4 is a block diagram of one embodiment of the FPGA 604. A RAM 610 uses the system controlling clock, .sub.sys, to generate a first digital IF carrier

[00006]$\cos .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{sys}}}.Math.n_{\mathrm{sys}}+{}_h\right),$

where N.sub.sys=2.sup.n is the carrier wave modulus and n.sub.sys is the count of the carrier wave. The value of n is chosen by the user, and typically n may be in a range of 5 to 7.

[0061] The amplitude modulation waves necessary for slow rotation of the microwave field are generated by RAMs 620 and 622 using a low clock of a frequency .sub.lclk (=N.sub.lclk.sub.) corresponding to the desired low frequency of rotation. In one embodiment, .sub.lclk=N.sub.lclk.sub.106. Typically, N.sub.lclk=2.sup.m. The integer m is arbitrary. One typical choice is N.sub.sys=2.sup.N=N.sub.lclk.

[0062] The RAM 620 produces a cosine-form (in-phase) component, I, with the slow wave count n.sub.lclk and the slow wave modulus N.sub.lclk as

[00007]$I=B.Math..Math.\cos .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{lclk}}}.Math.n_{\mathrm{lclk}}+{}_h\right).$

[0063] The low clock count n.sub.lclk functions as an address pointer to successive locations in the RAM 620 storing successive samples of I.

[0064] The RAM 622 produces a sine-form (quadrature) component, Q, in accordance with the low clock count n.sub.lclk and the low clock modulus N.sub.lclk as

[00008]$Q=B.Math..Math.\sin .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{lclk}}}.Math.n_{\mathrm{lclk}}+{}_h\right).$

[0065] The low clock count n.sub.lclk functions as an address pointer to successive locations in the RAM 622 storing successive samples of Q.

[0066] A digital multiplier 630 combines the cosine-form component, I, with the digital IF carrier from the RAM 610 to produce the digital signal in1. A digital multiplier 640 combines the sine-form component, Q, with the digital IF carrier from the RAM 610 to produce the digital signal in2.

[0067] As described above with reference to FIG. 3, the DAC 608 converts the digital signals in1 and in2 to analog IF (intermediate frequency) signals defined by B cos.sub.at cos(.sub.ift+.sub.h) and B Sin.sub.at cos(.sub.ift+.sub.h), respectively. As described above with reference to FIG. 3, the analog IF signal is up-converted by the up-converter 606 to the corresponding microwave signals RF1out and RF2out. The microwave signals RF1out and RF2out are coupled to the cylindrical cavity 120 of FIG. 2.

Slow rotation and oscillation mode by phase modulation:

[0068] Considering the case of constant amplitude a=b in equations (2) and (3), the resultant field becomes:

=.sub.P+.sub.Q=2a[cos cos t+sincos(t)].(16)

In a special case of

[00009]$=\frac{}{2},$

equation (16) reduces to

=2a cos(t).(17)

[0069] Equation (17) signifies the circular clockwise/anti-clockwise rotation at the microwave frequency . In this case, the injected microwaves at P and Q are respectively expressed by considering a coupling effect as in equations (12) and (13),

.sub.P=cos(t+.sub.h)(17-2)

and

.sub.Q=sin(t+.sub.h).(17-3)

In case of arbitrary phase , equation (16) can be simplified as

=C cos(t+) (18)

where

C=2a{square root over (1+sin2cos)}(19)

and

[00010]$\begin{array}{cc}\tan .Math..Math.=-\frac{\sin .Math..Math..Math..Math.\sin .Math..Math.}{\cos .Math..Math.+\sin .Math..Math..Math..Math.\cos .Math..Math.}.& \left(20\right)\end{array}$

[0070] A linear phase modulation may be introduced into equations (18)-(20) by introducing the following:

=.sub.pt (where .sub.p).(21)

In such a case, is ramped over time, and the amplitude C expressed in eq. (19) shows different distributions of the microwave field in polar coordinates for successive values of as depicted in FIGS. 5A through 5H. From FIGS. 5A through 5H, it is seen that the resulting microwave field distribution successively alternates between rotation and oscillation, as is ramped over time.

[0071] Oscillation and slow rotation at a rotation frequency of .sub.p is obtained by driving the microwave inputs at locations P and Q of FIG. 2 by the following signals:

.sub.P=cos(t+.sub.h)(22)

and

.sub.Q=cos(t+.sub.h.sub.pt)=[cos(t+.sub.h)cos.sub.pt+sin(t+.sub.h)sin.sub.pt](23)

In this case, the wave in the cavity alternates oscillation and rotation with frequency .sub.p, resulting in a pulsing mode.

[0072] Conventional analog phase modulation implements equation (22). However, the choice of .sub.p is limited. In the digital implementation of equations (22) and (23), the time scale difference between and .sub.p should be taken into consideration. In order to generate the signals of equations (22) and (23), the FPGA 604 of FIG. 3 has the internal structure depicted in FIG. 6, which is a modification of the structure of FIG. 4. In FIG. 6, the RAMs 610, 620 and 622 function in the manner described above with reference to FIG. 4. The RAM 623 of FIG. 6 provides the constant a. An additional RAM 612 in the embodiment of FIG. 6 uses the system controlling clock, .sub.sys, to generate a second digital IF carrier:

[00011]$\sin .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{sys}}}.Math.n_{\mathrm{sys}}+{}_h\right),$

where N.sub.sys=2.sup.n is the carrier wave modulus and n.sub.sys is the count of the carrier wave.

[0073] The RAMs 620 and 622 store signals generating the linear modulation represented by equation 23 of cos.sub.pt and sin.sub.pt, where .sub.p is the desired slow rotation/oscillation frequency. The respective modulation signals are co-functions of one another because they contain corresponding sin and cosine terms.

[0074] The output of the RAM 610 is used as the digital signal in1. A digital multiplier 660 multiplies the outputs of the RAMs 610 and 620 together. A digital multiplier 662 multiplies the outputs of the RAMs 612 and 622 together. An adder 664 adds the products of the digital multipliers 660, 662 and 663 together and provides the resulting sum as the digital signal in2. The digital signals in1 and in2 thus generated are converted by the digital-to-analog converter 608 to corresponding analog signals which are processed in the manner described above with reference to FIG. 4 to produce the microwave signals RFout1 and RFout2.

Superposition of the Three Modes:

[0075] In the foregoing, three modes have been described: (a) fast rotation mode with angular frequency as the carrier frequency (equations (17-2) and (17-3)); (b) slow rotation mode with angular frequency () (equations (14) and (15)); and (c) slow pulsing mode with angular frequency .sub.p with .sub.p (equations (22) and (23)). In the amplitude modulation of equations (14) and (15), for example, one may modify the amplitude as (1+sin.sub.at) for the constant , and add the phase modulation term .sub.pt, yielding the following set of equations:

.sub.Pcos.sub.atcos(t+.sub.h)(24-1)

.sub.Q=(1+sin .sub.at)cos(t+.sub.h.sub.pt)(24-2)

This type of dual injection includes the three rotation modes referred to above. When combining modes (a) and (b), the FPGA of FIG. 6 is modified to the structure shown in FIG. 7.

Direct Digital Up-Conversion:

[0076] FIGS. 8 through 11 illustrate embodiments employing direct digital up-conversion (DDUP), in place of up-conversion from an intermediate frequency. In the embodiments of FIGS. 8 through 11, no conversion to an intermediate frequency is needed. What is now described is how to produce the microwave signals RFout1 and RFout2 which are fed to the cylindrical cavity 120 of FIG. 2 using direct digital up-conversion. The FPGA 604 of FIG. 8 is adapted to synthesize lower frequency digital signals from which the microwave field signals RFout1 and RFout2 are produced. In the embodiment of FIG. 8, the FPGA 604 can produce an in-phase digital component and a quadrature digital component of each lower frequency amplitude modulation signal. Each amplitude modulation signal is a precursor of the corresponding one of the microwave field signals RFout1 and RFout2.

[0077] In FIG. 8, the digital-to-analog converter (DAC) 608 converts low-frequency digital signals to analog signals. The DAC 608 has digital inputs 1-A, 1-B, 2-A and 2-B and analog outputs 1-Iin, 1-Qin, 2-Iin, and 2-Qin, respectively. The digital signals at the digital inputs 1-A, 1-B, 2-A and 2-B are converted to corresponding analog signals at the analog outputs 1-Iin, 1-Qin, 2-Iin, and 2-Qin, respectively.

[0078] The digital in-phase component corresponding to RFout1 corresponds to the digital input 1-A while the digital quadrature component corresponding to RFout1 corresponds to the digital input 1-B. Similarly, the digital in-phase component corresponding to RFout2 corresponds to the digital input 2-A while the digital quadrature component corresponding to RFout2 corresponds to the digital input 2-B.

[0079] Two DDUP integrated circuits (DDUP ICs) are employed to directly up-convert low-frequency amplitude modulation signals to a microwave carrier frequency . The DDUP IC 607-1 combines the analog output 1-Iin with an in-phase component of the microwave frequency to produce a first product. The DDUP IC 607-1 further combines the analog output 1-Qin with a quadrature component of the microwave frequency , to produce a second product. The DDUP IC 607-1 adds the first and second products to produce the microwave signal RF1out.

[0080] The DDUP IC 607-2 combines the analog output 2-Iin with an in-phase component of the microwave frequency co to produce a third product. The DDUP IC 607-2 combines the analog output 2-Qin with a quadrature component of the microwave frequency , to produce a fourth product. The DDUP IC 607-2 adds the third and fourth products to produce the microwave signal RF2out. This functionality of each DDUP IC is illustrated in FIG. 8A, depicting a typical DDUP IC (e.g., the DDUP IC 607-1) as having a combining (mixer) function 802 for mixing the in-phase analog signal with the in-phase component of the microwave frequency, another combining function 804 for mixing the quadrature analog signal with the quadrature component of the microwave frequency, and an adder 806 for adding the two products from the mixer functions 802 and 804.

[0081] The FPGA 604 of FIG. 8 includes four random access memories (RAMs) 620, 720, 622 and 722 with outputs connected to respective ones of the four digital inputs 1-A, 1-B, 2-A and 2-B of the DAC 608, as shown in FIG. 9. FIG. 9 depicts one configuration of the FPGA 604 for implementing the mode of producing a slowly rotating microwave field by amplitude modulation.

[0082] In the mode of FIG. 9, the RAM 720 has zero content, so that no signal is applied to the digital input 1B of the DAC 608, while the RAM 722 has zero content so that no signal is applied to the digital input 2B of the DAC 608. In the mode of FIG. 9, the RAM 620 operates in the manner described above with reference to

[0083] FIG. 4 to produce a digital in-phase component of an amplitude modulation signal

[00012]$B.Math.\cos .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{lclk}}}.Math.n_{\mathrm{lclk}}\right)$

which is applied to the digital input 1A of the DAC 608. The DAC converts this signal to an analog amplitude modulation signal Bcos.sub.at at the analog output 1-Iin. The DDUP IC 607-1 mixes the analog modulation signal Bcos.sub.at with the microwave frequency in-phase component cos(t+.sub.h) to produce the microwave signal RF1out as:

RFout1=B cos.sub.at cos(t+.sub.h),

where is a mixing-gain, .sub.a is the user-selected slow rotation frequency and is the microwave frequency.

[0084] In the mode of FIG. 9, the RAM 622 operates in the manner described above with reference to FIG. 4 to produce a digital quadrature component of an amplitude modulation signal

[00013]$B.Math.\sin \left(2.Math..Math..Math.\frac{1}{N_{\mathrm{lclk}}}.Math.n_{\mathrm{lclk}}\right)$

which is applied to the digital input 2A of the DAC 608. The DAC 608 converts this signal to an analog amplitude modulation signal Bsin.sub.at at the analog output 2-Qin. The DDUP IC 607-2 mixes the analog modulation signal Bsin.sub.at with the microwave frequency in-phase component cos(t+.sub.h) to produce the microwave signal RF2out as:

RFout2=B sin.sub.at cos(t+.sub.h),

where is a mixing-gain, .sub.a is the user-selected slow rotation frequency and is the microwave frequency.

[0085] FIG. 10 depicts a configuration of the FPGA 604 for implementing the mode of producing a slowly rotating microwave field by a linear phase modulation. In the mode of FIG. 10, the RAM 620 provides a constant, a, to the digital input 1A of the DAC 608, which is transmitted to the analog output 1-Iin. The RAM 720 has zero content so that no signal is applied to the digital input 1B of the DAC 608 and no signal is present at the corresponding analog output 1-Qin of the DAC 608. In the mode of FIG. 10, the RAM 622 operates in the manner described above with reference to FIG. 4 to produce a digital in-phase component of an amplitude modulation signal

[00014]$a.Math.\cos .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{lclk}}}.Math.n_{\mathrm{lclk}}\right)$

[0086] which is applied to the digital input 2A of the DAC 608. The DAC 608 converts this signal to an analog amplitude modulation signal a cos.sub.at at the analog output 2-Iin.

[0087] The RAM 722 produces a digital quadrature component of an amplitude modulation signal

[00015]$a.Math.\sin .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{lclk}}}.Math.n_{\mathrm{lclk}}\right)$

[0088] which is applied to the digital input 2B of the DAC 608. The DAC 608 converts this signal to an analog amplitude modulation signal a sin.sub.at at the analog output 2-Qin.

[0089] The DDUP IC 607-1 mixes the constant, a, received from the output 1-Iin, with the microwave frequency in-phase component cos(t+.sub.h) to produce the microwave signal RF1out as:

RFout1=.Math.a cos(t+.sub.h),

where is a mixing-gain, is the microwave frequency.

[0090] The DDUP IC 607-2 mixes the analog modulation signal a.Math.cos.sub.at with the microwave frequency in-phase component cos(t+.sub.h) to produce a first product signal

.Math.a cos.sub.at cos(t+.sub.h),

where is a mixing-gain, .sub.a is the user-selected slow rotation frequency and is the microwave frequency.

[0091] The DDUP IC 607-2 mixes the analog modulation signal a.Math.sin.sub.at (present at the analog output 2-Qin) with the microwave frequency quadrature component sin(t+.sub.h) to produce a second product signal

.Math.a sin.sub.at sin(t+.sub.h),

where is a mixing-gain, .sub.a is the user-selected slow rotation frequency and is the microwave frequency.

[0092] The DDUP IC 607-2 adds the first and second product signals to produce the microwave output signal RFout2 as

RFout2=.Math.[cos.sub.at cos(t+.sub.h)+cos.sub.atcos(t+.sub.h)].

[0093] FIG. 11 depicts a configuration of the FPGA 604 for implementing a mode of producing fast and slow rotation of the microwave field at frequencies and .sub.a, respectively. In the mode of FIG. 11, the RAM 620 provides the sum of a constant A with the digital in-phase component of an amplitude modulation signal, as

[00016]$A+B.Math.\cos .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{lclk}}}.Math.n_{\mathrm{lclk}}\right)$

which is applied to the digital input 1A of the DAC 608. The DAC 608 converts this signal to an analog amplitude modulation signal A+Bcos.sub.at at the analog output 1-Iin. The RAM 720 has zero content so that no signal is applied to the digital input 1B of the DAC 608 and no signal is present at the corresponding analog output 1-Qin of the DAC 608.

[0094] In the mode of FIG. 11, the RAM 622 produces a digital quadrature component of an amplitude modulation signal

[00017]$B.Math.\sin .Math..Math.\left(2.Math..Math..Math.\frac{1}{N_{\mathrm{lclk}}}.Math.n_{\mathrm{lclk}}\right)$

which is applied to the digital input 2A of the DAC 608. The DAC 608 converts this signal to an analog amplitude modulation signal Bsin.sub.at at the analog output 2-Iin. The RAM 722 outputs a constant, A, which is applied to the digital input 2B of the DAC 608 and is passed through to the analog output 2-Qin.

[0095] The DDUP IC 607-1 mixes the analog amplitude modulation signal A+Bcos.sub.at at the analog output 1-Iin with the microwave frequency in-phase component cos(t+.sub.h) to produce the microwave signal RF1out as:

RFout1=[A+Bcos.sub.at]cos(t+.sub.h),

where is a mixing-gain, .sub.a is the user-selected slow rotation frequency and is the microwave frequency.

[0096] The DDUP IC 607-2 mixes the analog amplitude modulation signal Bsin.sub.at at the analog output 2-Iin with the microwave frequency in-phase component cos(t+.sub.h) to produce a first product signal B sin.sub.atcos(t+.sub.h), and where is a mixing-gain.

[0097] The DDUP IC 607-2 mixes the constant A at the analog output 2-Qin with the microwave frequency quadrature component sin(t.sub.h) to produce a second product signal A sin(t+.sub.h), where is a mixing-gain.

[0098] The DDUP IC 607-2 adds the first and second product signals together to produce the microwave output signal RF2out as:

RF2out =[B.Math.sin.sub.at cos(t+.sub.h)+A.Math.sin(t+.sub.h)]

where is a mixing-gain, .sub.a is the user-selected slow rotation frequency and is the microwave frequency.

[0099] The foregoing embodiments may be implemented by a computer (e.g., the computer 602) storing or accessing executable instructions for performing the function of an embodiment described above. The instructions may be accessed from a network or internet connection, from a disk or from other suitable media. By providing access by the computer to the executable instructions for performing the function or method, the computer is said to be programmed to perform the function or method.

Advantages:

[0100] Embodiments herein provide uniform processing results across a wide range of chamber pressures by rotating the microwave field of the plasma source. The microwave rotation is digitally synthesized so that the rotation frequency can be set as low as desired to enable the plasma to follow the rotation even at high chamber pressure.

[0101] While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.