Cycle slip resilient coded modulation for fiber-optic communications

Abstract

Disclosed is a method for decoding an optical data signal. Said optical data signal is phase and amplitude modulated according to a constellation diagram with at least eight constellation points representing non-binary symbols. Said decoding method comprises the following steps: carrying out a carrier phase recovery of a received signal ignoring the possible occurrence of phase slips, decoding said signal after phase recovery, wherein in said decoding, possible cycle slips occurring during phase recovery are modelled as virtual input to an equivalent encoder assumed by the decoding scheme. Further disclosed are a related encoding method as well as a receiver and a transmitter.

Claims

1. A method for decoding an optical data signal, said optical data signal having phase and amplitude modulation according to a constellation diagram with at least eight constellation points representing non-binary symbols, said method comprising the following steps: carrying out a carrier phase recovery of a received signal ignoring the occurrence of cycle slips, said cycle slips corresponding to unwanted abrupt phase jumps congruent with the rotational symmetry of the constellation, and decoding said signal after carrier phase recovery, wherein in said decoding, cycle slips occurring during carrier phase recovery are modelled as virtual equivalent phase slip input to an equivalent encoder assumed by the decoding scheme, wherein said equivalent encoder operates such that for each symbol the encoding result of the symbol with a given equivalent phase slip input, and the encoding result of the same symbol with zero equivalent phase slip input but subjected to a true cycle slip of a phase angle corresponding to said given equivalent phase slip is identical.

2. The method of claim 1, wherein said constellation diagram exhibits a /2 rotational symmetry in the complex plane, and in particular corresponds to a 8QAM or a 2-amplitude 4-phase shift keying constellation.

3. The method of claim 1, wherein the decoding step comprises an iterative procedure performed by a first soft decoder operating according to a first equivalent coding scheme on said non-binary symbols or on labels representing the same, and a second soft decoder operating according to a second coding scheme, said first and second soft decoders receiving probabilistic a priori input information and outputting probabilistic a posteriori information, wherein within an iteration an a priori input of the second soft decoder is based at least in part on an a posteriori output of the first soft decoder, and an a priori input of the first soft decoder is based at least in part on an a posteriori output of the second soft decoder.

4. The method of claim 3, wherein the a priori input to the first soft decoder further comprises an input related to the probability of cycle slips to occur.

5. The method of claim 3, wherein the first equivalent coding scheme is a differential coding scheme operating on said non-binary symbols or associated labels, where an encoding result of each symbol depends both on the symbol and on a previous symbol.

6. The method of claim 3, wherein the first equivalent coding scheme employs, in addition to the non-binary symbol to be encoded, an equivalent cycle slip input representing a corresponding cycle slip angle, wherein the first equivalent coding scheme on which the first soft decoder operates is such that for each symbol an encoding result of the symbol with a given equivalent cycle slip input, and an encoding result of the same symbol encoded with zero equivalent cycle slip input but subjected to a true cycle slip of said cycle slip angle, are identical.

7. The method of claim 3, wherein said constellation diagram comprises 4n constellation points consisting of n groups of four constellation points having identical amplitude and phase differences of multiples of /2, wherein said constellation points are labelled by integer numbers {0,1, . . . , 4n1}, wherein said labels are chosen such that for each two labels i, j corresponding to constellation points of a same group, where a phase of constellation point i differs from the phase of constellation point j by /2, the following relation applies: j=i+n MOD(4n), and wherein said first soft decoder operates on said labels.

8. The method of claim 3, wherein the first soft decoder employs a Maximum A Priori (MAP) symbol-by-symbol decoding.

9. The method of claim 3, wherein said first soft decoder outputs a posteriori probabilities for equivalent cycle slips, and wherein probabilities of particular cycle slips to occur are determined based on statistics of said outputted a posteriori probabilities of equivalent cycle slips.

10. The method claim 3, wherein said second coding scheme is a binary error control coding scheme.

11. The method of claim 3, wherein the information exchanged between the first and the second soft decoders is interleaved and de-interleaved, respectively.

12. The method of claim 3, wherein the decoding further employs a mapping between said non-binary symbols or labels representing the same and a bit sequence, wherein the mapping is chosen such that of any two symbols of identical amplitude and with a phase difference of /2, the corresponding bit sequence differs in at least two bit positions and/or on average by more than half of the bit positions.

13. The method of claim 1, wherein the decoding is carried out simultaneously for two different polarizations of said data signal.

14. The method of claim 13, wherein said method employs two of said first soft decoders, each receiving probabilistic information about non-binary symbols transmitted in a respective one of said two polarizations.

15. The method of claim 14, wherein the a posteriori outputs of the two first soft decoders, or data derived from said a posteriori outputs of the two first soft decoders, are combined prior to being inputted to the second soft decoder, and wherein the a posteriori output of the second soft decoder, or data derived from said a posteriori output of the second soft decoder, is split into two portions for input into a respective one of said first soft decoders.

16. The method of claim 1, wherein the aforementioned decoding is an inner decoding, which is followed by an outer decoding according to an outer coding scheme providing for forward error correction with an overhead of less than 15%, preferably less than 10% and most preferably less than 7%.

17. A receiver for receiving and decoding an optical data signal, said optical data signal having phase and amplitude modulation according to a constellation diagram with at least eight constellation points representing non-binary symbols, said receiver comprising: at least one phase recovery unit for carrying out a carrier phase recovery of a received signal ignoring the occurrence of cycle slips, said cycle slips corresponding to unwanted abrupt phase jumps congruent with the rotational symmetry of the constellation, and a decoder for decoding said signal after carrier phase recovery, wherein the decoder is configured such that in said decoding, cycle slips occurring during carrier phase recovery are modelled as virtual equivalent phase slip input to an equivalent encoder assumed by the decoding scheme, wherein said equivalent encoder operates such that for each symbol the encoding result of the symbol with a given equivalent phase slip input, and the encoding result of the same symbol with zero equivalent phase slip input but subjected to a true cycle slip of a phase angle corresponding to said given equivalent phase slip is identical.

18. The receiver of claim 17, wherein the decoder comprises a first soft decoder operating according to a first equivalent coding scheme on said non-binary symbols or on labels representing the same, and a second soft decoder operating according to a second coding scheme, wherein said first and second soft decoders are configured to receive probabilistic a priori input information and to output probabilistic a posteriori information, wherein said decoder is configured to carry out an iterative procedure, in which within an iteration an a priori input of the second soft decoder is based at least in part on an a posteriori output of the first soft decoder, and an a priori input of the first soft decoder is based at least in part on an a posteriori output of the second soft decoder.

19. The receiver of claim 18, wherein the a priori input to the first soft decoder (46) further comprises an input related to the probability of cycle slips to occur.

20. The receiver of claim 17, wherein the first equivalent coding scheme is a differential coding scheme operating on said non-binary symbols or associated labels, where the encoding result of each symbol depends both on the symbol itself and on the previous symbol, and in particular an accumulator.

21. The receiver of claim 17, wherein said second coding scheme is a binary error control coding scheme.

22. The receiver of claim 17, wherein said decoder is configured to carry out a decoding method according to claim 1.

23. The receiver of claim 17, wherein the aforementioned decoder is an inner decoder, wherein the receiver further comprises an outer decoder operating according to an outer coding scheme providing for forward error correction with an overhead of less than 15%, preferably less than 10% and most preferably less than 7%.

Description

SHORT DESCRIPTION OF THE FIGURES

(1) FIG. 1 is a block diagram of a transmitter comprising an outer and an inner encoder,

(2) FIG. 2 is a table summarizing the mapping between bit sequences and transition indices or labels representing non-binary symbols,

(3) FIG. 3 is a constellation diagram of an 8QAM constellation,

(4) FIG. 4 is a constellation diagram of a two-amplitude four-phase phase shift keying constellation,

(5) FIG. 5 is a block diagram of an accumulator employed by the inner encoder of the transmitter of FIG. 1,

(6) FIG. 6 is a block diagram of a receiver employing an inner decoder and an outer decoder,

(7) FIG. 7 is a block diagram showing the details of the inner decoder of the receiver of FIG. 6,

(8) FIG. 8 is a block diagram of an equivalent accumulator employed by the inner decoder of FIG. 7,

(9) FIG. 9 shows simulation results of bit error rate versus signal-to-noise ratio for the inner code on the 8QAM constellation in absence of cycle slips,

(10) FIG. 10 shows simulation results of bit error rate versus signal-to-noise ratio for the inner code on the two-amplitude four-phase phase shift keying constellation in absence of cycle slips,

(11) FIG. 11 shows simulation results of bit error rate versus signal-to-noise ratio for the inner code on the 8QAM constellation in presence of cycle slips,

(12) FIG. 12 shows simulation results of bit error rate versus signal-to-noise ratio for the inner code on the two-amplitude four-phase phase shift keying constellation in presence of cycle slips.

DESCRIPTION OF THE PREFERRED EMBODIMENT

(13) For the purposes of promoting an understanding of the principles of the invention, reference will now be made to the preferred embodiments illustrated in the drawings and specific language will be used to describe the same. It will nevertheless be understood that no limitation of the scope of the invention is thereby intended, such alterations and further modifications in the illustrated device and method and such further applications of the principles of the invention as illustrated therein being contemplated therein as would normally occur now or in the future to one skilled in the art to which the invention relates.

(14) FIG. 1 is a schematic block diagram of a transmitter 10 employing an encoding scheme according to one embodiment of the present invention. The transmitter 10 of FIG. 1 comprises an outer encoder 12 and an inner encoder 14. The outer encoder 12 receives digital data b and encodes the same according to an outer coding scheme having a small overhead of less than 10%. In particular, the outer encoder 12 may employ a Reed-Solomon code as recommended in ITU-T Recommendation G. 709, Interfaces for the Optical Transport Network (OTN), February 2012, Annex A having an overhead of only 6.69%. Alternatively, other codes described in ITU-T Recommendation G.975.1, Forward error correction for high bit-rate DWDM submarine systems, February 2004, Appendix I have a similar overhead of only 6.69% and can likewise be employed.

(15) The output bits of the outer encoder 12, represented by c in FIG. 1, are interleaved by an interleaver #1 shown at reference sign 16 to yield an interleaved bit stream represented by c, which is inputted into the inner encoder 14.

(16) At the entrance of the inner encoder 14, the bit sequence c is SPC-encoded by an SPC encoder 18 employing a single parity check forward error correction scheme. The SPC encoder 18 appends to each pair of input bits a single check bit computed as the exclusive OR of the two input bits.

(17) Groups of 6.Math.n (with n a positive integer) SPC-encoded bits are formed and forwarded to a subsequent interleaver #2 shown at reference sign 20, which like the interleaver #1 provides for a bit permutation.

(18) The output d of the interleaver #2 20 is divided by a splitter 22 into two blocks of 3.Math.n bits that are individually encoded differentially by differential decoders 24 and eventually transmitted over two orthogonal polarizations x and y.

(19) As is further seen in FIG. 1, each differential encoder 24 comprises a mapper 26 for mapping bits to transition indices. More precisely, each group of three subsequent input bits is mapped to a single transition index according to the transition table in FIG. 2, such that the entire block of 3.Math.n bits is mapped to a sequence of n transition indices. The transition indices are an example of the aforementioned labels for labelling constellation points of a constellation diagram representing non-binary symbols.

(20) FIG. 3 shows a constellation diagram for an 8QAM constellation that can be employed in the present invention. Next to each constellation point in the 8QAM diagram, the transition index or label is shown.

(21) FIG. 4 shows an alternative constellation diagram with likewise 8 constellation points representing non-binary symbols, which in case of FIG. 4 is represented by a 2-amplitude 4-phase shift keying constellation, where again the transition indices or labels are shown.

(22) The transition indices u.sub.x and u.sub.y of the two mappers 26 of the two differential encoders 24 are each inputted into a corresponding accumulator 28 shown in FIG. 5. The outputs a.sub.x and a.sub.y of accumulators 28 are inputted to a mapper 30 which maps the output of the accumulator 28, which is a label ranging again from {0, 1 . . . 7}, to a symbol or constellation point according to the scheme summarized in FIG. 3 or FIG. 4. According to the present disclosure, both the transition indices u.sub.x and u.sub.y and the labels a.sub.x, a.sub.y are regarded as labels representing non-binary symbols. However, for clarity reasons, the labels inputted to the accumulator 28 are specifically referred to as transition indices while the labels outputted by the accumulator 28 may be referred to specifically as addresses of a symbol, namely of a symbol that is actually transmitted over the optical fiber. This distinction in terminology is only used to refer to the function of the respective labels in the coding and decoding scheme, but no limitation is thereby intended.

(23) In FIG. 6, an overview of a receiver 32 according to an embodiment of the present invention is shown. The complex baseband signals may be represented with one sample per symbol. In FIG. 6, it is assumed that the usual demodulation steps and in particular the polarization discrimination has been applied already. As shown in FIG. 6, the receiver 32 has two carrier phase recovery units 34 for carrying out the phase recovery. The phase recovery can be carried out in a manner per se known from prior art such as from M G. Taylor, Phase estimation methods for optical coherent detection using digital signal processing IEEE Journal Lightwave Technology, vol. 22, no. 7, April 2009. Alternatively, the phase recovery can also be carried out prior to splitting the two polarizations in a manner described for example in M Kuschnerov, D. van den Borne, K Piyawanno, F. N. Hauske, C. R. S. Fludger, T. Duthel, T. Wuth, J. C. Geyer, C. Schulien, B. Spinnler, E.-D. Schmidt, B. Lankl, Joint-Polarization Carrier Phase Estimation for XPM-Limited Coherent Polarization-Multiplexed QPSK transmission with OOK-neighbors, ECOC 2008, Mo.4D.2, Brussels, Belgium, 21-25 Sep. 2008.

(24) The resulting samples are passed to an inner decoder 36 according to an embodiment of the present invention, which will be described in more detail with reference to FIG. 7.

(25) The inner decoder 36 outputs a posteriori probabilities for bits d. Taking advantage of the systematic nature of the SPC, the following block 38 discards the parity bits and delivers a posteriori probabilities or tentative decisions for the interleaved bits c, depending on whether an adjacent outer decoder 42 accepts soft or hard decisions, respectively. The interleaved bits c are de-interleaved with a de-interleaver #1 40 which is the inverse of the interleaver #1 16 of the transmitter 10 of FIG. 1. The aforementioned outer decoder 42 receives the de-interleaved stream and produces an estimate of the payload bits achieving a desired BER.

(26) In FIG. 7, the inner decoder 36 of the receiver 32 of FIG. 6 is shown in greater detail. As is shown in FIG. 7, the two complex input streams s.sub.x, s.sub.y are forwarded to the corresponding channel metric computers 44, which deliver under the Additive White Gaussian Noise (AWGN) assumption for each input sample s the eight probabilities

(27) $\begin{array}{cc}{p}_c\left(s,i\right)=\frac{1}{\sqrt{N_0}}\exp \left(-\frac{{.Math.s-a_i.Math.}^2}{N_0}\right)\left(i=0,1,\mathrm{.Math.},7\right).& \left(1\right)\end{array}$

(28) Herein, each probability p.sub.c(s,i) can be regarded as the probability that the signal corresponds to the state a.sub.i, where a.sub.0, a.sub.1, . . . , a.sub.7 are the eight complex symbols of the signal constellation shown in FIG. 3 or 4, respectively.

(29) The resulting streams of channel probabilities, i.e. eight probabilities per symbol interval and polarization, are the input to the subsequent iterative decoder, which consists of all the remaining blocks of the inner decoder 36 shown in FIG. 7. In FIG. 7, the iterations are implemented in a loop structure. In practice, however, they can be also rolled out in a pipeline structure or embodied in any functionally equivalent architecture. The iterative decoder works on a block of n symbols per polarization (or 6.Math.n bits altogether), as determined by the size of the second interleaver #2 20.

(30) The inner decoder 36 comprises two accumulator decoders 46 resembling first soft decoders and an SPC-decoder 48 resembling a second soft decoder. The two accumulator decoders 46 are intended to provide cycle slips resilience. Importantly, the accumulator decoders 46 are not decoders matching the true accumulators 28 as shown in FIG. 5. Instead, the accumulator decoders 46 are designed as decoders for an equivalent accumulator 28 shown in FIG. 8. As is seen by comparison of FIGS. 5 and 8, the equivalent accumulator 28 differs from the true accumulator 28, i.e. the accumulator 28 that is actually used in the transmitter, in that it receives a further input that is herein referred to as equivalent phase slip input representing a corresponding slip angle. Herein, cs can be an integer number of 0, 1, 2 and 3, corresponding to an equivalent phase slip of 0 (i.e. no phase slip), /2, and 3/2.

(31) As can be seen from the way the labels are assigned to the symbols or constellation points in FIGS. 3 and 4, adding the integer 2 to each label leads to a symbol having a phase increased by /2. In other words, adding the integer 2 (i.e. cs=1) in the equivalent accumulator 28 of FIG. 7 introduces an artificial phase slip by /2, adding an integer 4 (corresponding to cs=2) leads to an artificial phase slip of and adding an integer number 6 (corresponding to es=3) corresponds to adding a phase slip of 3/2. While the true cycle slips originate at the receiver 32 within the phase recovery carried out by the phase recovery units 34, according to the present invention they are modelled as a virtual input to the equivalent accumulator 28 which is assumed by the decoding scheme. This is an example of the general concept described in the introductory portion according to which possible cycle slips occurring during phase recovery are modelled as virtual input to an equivalent encoder assumed by the decoding scheme. Herein, the expression assumed by the decoding scheme is another way of saying that the actual decoders do not match the actual encoders at the corresponding transmitters, but an equivalent encoder that is assumed to be present at the transmitter and allows for modelling cycle slips as an equivalent input.

(32) Since the equivalent accumulator 28 can be regarded as a (unitary rate) non-binary recursive convolutional code, optimal Maximum A Posteriori (MAP) symbol-by-symbol decoding can be achieved with the classic BCJR algorithm described in L. R. Bahl, J. Cocke, F. Jelinek, and J Raviv, Optimal decoding of linear codes for minimizing symbol error rate, IEEE Trans. Inform. Theory, March 1974. To enable high-speed implementation, the standard scheduling of the BCJR algorithm based on a forward and a backward iteration can be replaced by a fully parallel flooding scheduling on an equivalent factor graph. The representation of a BCJR algorithm on a factor graph is for example described in F. R. Kschischang, B. J. Frey, and H-A. Loeliger, Factor graphs and the sum-product algorithm, IEEE Trans. on Inform. Theory, Febr. 2001.

(33) Referring again to FIG. 7, inputs to each accumulator decoder 46 are the channel probabilities and the a priori probabilities for the transition indices and cycle slips. During the first iteration, the a priori probabilities for all eight transitions u.sub.x and u.sub.y at each symbol interval are uniform. At the subsequent iterations, the a priori transition probabilities are obtained from the outcome of the SPC decoding provided by the SPC-decoder 48, which, as mentioned before, represents an example of a second soft decoder, operating according to a second coding scheme.

(34) The a priori cycle slip probabilities are assumed to be independent of the symbol interval and are not necessarily updated along the iterations. They can be initialized according to the expected performance of the carrier phase recovery and thereafter slowly be adapted on the basis of the cycle slip rate measured by a cycle slip counter indicated at reference sign 50 in FIG. 7.

(35) Each accumulator decoder 48 returns the a posteriori transition probabilities p.sub.p(u) and cycle slip probabilities p.sub.p(cs). The a posteriori transition probabilities p.sub.p(u) are passed to a transition-to-bits soft demapper 52. The cycle slip probabilities p.sub.p(cs) are passed to the cycle slip counter 50 to measure the cycle slip rate.

(36) For each polarization, the soft demapper 52 computes the Log-Likelihood Ratios (LLRs) for the SPC-encoded bits by inverting the mapping of FIG. 2. Starting from the leftmost bit the LLRs are

(37) $\begin{array}{cc}{}_2=\ln \frac{p_p\left(0\right)+p_p\left(3\right)+p_p\left(5\right)+P_p\left(6\right)}{p_p\left(1\right)+p_p\left(2\right)+p_p\left(4\right)+p_p\left(7\right)},& \left(2\right)\\ {}_1=\ln \frac{p_p\left(0\right)+p_e\left(3\right)+p_p\left(4\right)+P_p\left(7\right)}{p_p\left(1\right)+p_p\left(2\right)+p_p\left(5\right)+p_p\left(6\right)}\mathrm{and}& \left(3\right)\\ {}_0=\ln \frac{p_p\left(0\right)+p_p\left(2\right)+p_p\left(5\right)+P_p\left(7\right)}{p_p\left(1\right)+p_p\left(3\right)+p_p\left(4\right)+p_p\left(6\right)}.& \left(4\right)\end{array}$

(38) Subsequently, each a posteriori LLR is decremented by the corresponding a priori LLR to yield the so-called extrinsic LLRs, as is common in the theory of soft iterative decoding, see e.g. F. R. Kschischang, B. J Frey, and H-A. Loeliger, Factor graphs and the sum-product algorithm, IEEE Trans. on Inform. Theory, Febr. 2001. The extrinsication is achieved by the adders 54, which effectively operate as subtractors.

(39) The streams of extrinsic LLRs corresponding to the two polarizations are combined in a combiner block 56 that implements the inverse function of the splitter block 22 in the transmitter 10 of FIG. 1. The resulting sequence of 6.Math.n LLRs is de-interleaved by de-interleaver #2 58, which implements the inverse permutation of interleaver #2 20 in the transmitter 10 of FIG. 1.

(40) The resulting de-interleaved sequence of 6.Math.n LLRs serves as a priori information for the SPC decoder 48. For any SPC codeword consisting of three bits d.sub.k, d.sub.k+1 and d.sub.k+2, under the usual assumption of statistical independence of the a priori LLRs, MAP decoding can be implemented as

(41) $\begin{array}{cc}{}_p\left(d_k\right)={}_a\left(d_k\right)+\ln \frac{1+\exp \left({}_a\left(d_{k+1}\right)\right).Math.\exp \left({}_a\left(d_{k+2}\right)\right)}{\exp \left({}_a\left(d_{k+1}\right)\right)+\exp \left({}_a\left(d_{k+2}\right)\right)},& \left(5\right)\\ {}_p\left(d_{k+1}\right)={}_a\left(d_{k+1}\right)+\ln \frac{1+\exp \left({}_a\left(d_k\right)\right).Math.\exp \left({}_a\left(d_{k+2}\right)\right)}{\exp \left({}_a\left(d_k\right)\right)+\exp \left({}_a\left(d_{k+2}\right)\right)}\mathrm{and}& \left(6\right)\\ {}_p\left(d_{k+2}\right)={}_a\left(d_{k+2}\right)+\ln \frac{1+\exp \left({}_a\left(d_k\right)\right).Math.\exp \left({}_a\left(d_{k+1}\right)\right)}{\exp \left({}_a\left(d_k\right)\right)+\exp \left({}_a\left(d_{k+1}\right)\right)},& \left(7\right)\end{array}$
see J. Hagenauer, E. Offer, and L. Papke, Iterative decoding of binary block and convolutional codes, IEEE Trans. on Inform. Theory, March 1996, section II.A.

(42) If desired, the second term in the previous three equations (5) to (6) can be simplified as desired. In the simplest case, it can be approximated as follows:

(43) $\begin{array}{cc}\ln \frac{1+\exp \left(x\right).Math.\exp \left(y\right)}{\exp \left(x\right)+\exp \left(y\right)}\mathrm{sign}\left(x\right).Math.\mathrm{sign}\left(y\right).Math.\min \left[.Math.x.Math.,.Math.y.Math.\right].& \left(8\right)\end{array}$

(44) At the last iteration, the a posteriori LLRs computed by the SPC decoder 48 represent the output of the inner decoder 36. At any other iteration they are fed back and used according to a principle known as turbo decoding. To this purpose, they are decremented of the corresponding a priori LLRs by adder 60 to produce the extrinsic LLRs .sub.e(d), which, in analogy with the transmitter processing, are interleaved according to the second permutation, i.e. by interleaver #2 62, and split by a splitter 64 into two sequences of length 3.Math.n, one per polarization.

(45) Subsequently, two soft mappers 66 compute the probabilities of the transition indices on the basis of their input LLRs as

(46) $\begin{array}{cc}{p}_a\left(u\right)=\frac{\exp \left({.Math.}_{j{I}_0\left(u\right)}{}_e\left(d_j\right)\right)}{\left[1+\exp \left({}_e\left(d_0\right)\right)\right].Math.\left[1+\exp \left({}_e\left(d_1\right)\right)\right].Math.\left[1+\exp \left({}_e\left(d_2\right)\right)\right]},& \left(9\right)\end{array}$
where d.sub.0, d.sub.1 and d.sub.2 are the bits associated with the transition index u and I.sub.0(u) is the subset of {0, 1, 2} containing the index of the zero bits in the binary triplet associated with u according to the mapping of FIG. 2. For example, I.sub.0(u)={0, 1, 2}, I.sub.0(1)={ }, I.sub.0(2)={0}, . . . I.sub.0(7)={0,1}. The output of the soft demappers consists of eight probabilities per symbol interval and polarization, which are used as a priori probabilities during the next run of the accumulator decoder 46.

(47) The most complex blocks in the inner decoder 36 are the accumulator decoders 46. As compared to a standard BCJR algorithm for differential encoding, as for example that employed in S. L. Howard and C. Schlegel, Differential turbo-coded modulation with APP channel estimation, IEEE Trans. Comm., vol. 54, no. 8, August 2006, the proposed modification implies a higher computational burden. Although the number of states in the trellis diagram of the differential code remains eight, the introduction of a virtual input to model the cycle slips implies a four-fold increase in the number of edges. However, since in practice the carrier phase recovery generates only cycle slips by /2, the virtual input cs can be chosen, without any penalty, within the reduced set {0, 1, 3}. Thus, by disregarding the -cycle slip, a 25% reduction of the number of trellis edges can be achieved.

(48) As explained before, the mapping of FIG. 2 together with the addressing schemes of FIGS. 3 and 4 results into an anti-Gray mapping of the quadrant transitions, i.e. the transitions between symbols of identical amplitude. This can be easily verified by observing that whenever two transition indices differ by a multiple of 2, the Hamming distance of the associated binary triplets is two. As a consequence, each cycle slip produces the maximum number of violations in the SPC code, which helps the iterative process to localize it and correct it.

(49) FIG. 9 shows the bit error rate (BER) as a function of energy per bit to noise spectral density E.sub.b/N.sub.0 for the 8QAM constellation diagram of FIG. 3, in absence of cycle slips, for different block lengths n (ranging from 20.000 to 50.000) and different numbers of iterations (ranging from 20 to 100).

(50) FIG. 10 shows the same type of data for the two-amplitude four-phase shift keying constellation of FIG. 4 with a randomly chosen interleaver #2 (see reference sign 62 in FIG. 2). The code shows in both cases a very steep turbo cliff, but also a pronounced error floor whose level depends on the interleaver length. A better choice of the interleaver can, however, improve the error floor. If a 16-fold byte interleaved Reed-Solomon code as described in ITU-T Recommendation G. 709, Interfaces for the Optical Transport Network (OTN), February 2012 is used as the outer code, and the interleaver #1 (see reference sign 16 in FIG. 1) has sufficient depth, a BER of 810.sup.5 after the inner code is translated to a final BER of 10.sup.15. Thus, taking into account the rate loss of approximately 0.28 dB due to the Reed-Solomon code, the whole system achieves a BER of 10.sup.15 at a ratio of energy per bit to noise spectral density E.sub.b/N.sub.03.3 dB for 8QAM and E.sub.b/N.sub.03.8 dB for two-amplitude four-phase shift keying. Compared to the value of E.sub.b/N.sub.015.0 dB required by uncoded non-differential QPSK, the net coding gain (NCG) is 11.7 dB and 11.2 dB for 8QAM and for two-amplitude four-phase shift keying, respectively. The required rate overhead for the outer coding is only 255/239-16.69%. Note that for QPSK the theoretical maximum NCG with this rate overhead amounts to 11.1 dB, and that the most advanced viable FEC solutions need an overhead in excess of 20% to attain an NCG of 11.7 dB.

(51) FIGS. 11 and 12 show simulation results corresponding to that of FIGS. 9 and 10, but in presence of cycle slips. Up to a cycle slip probability of 10.sup.3, no significant performance degradation can be observed. Only at a cycle slip probability of 10.sup.2 the algorithm starts breaking down. However, such a high cycle slip probability would only be achieved if the equivalent laser linewidth were in the range of 1% of the symbol rate, which corresponds to an absolutely unrealistic value of approximately 280 MHz. Therefore, it can be concluded that the proposed solution is practically immune to the cycle slips generated in the carrier phase recovery.

(52) The embodiments described above and the accompanying figures merely serve to illustrate the method according to the present invention, and should not be taken to indicate any limitation of the method. The scope of the patent is solely determined by the following claims.

LIST OF ABBREVIATIONS

(53) 8PSK 8-ary Phase-Shift Keying

(54) AWGN Additive White Gaussian Noise

(55) BER Bit Error Rate

(56) DWDM Dense WDM

(57) EM Expectation-Maximization

(58) FEC Forward Error Correction

(59) LLR Log-Likelihood Ratio

(60) MAP Maximum A Posteriori

(61) NCG Net Coding Gain

(62) PDM Polarisation Division Multiplexing

(63) QAM Quadrature Amplitude Modulation

(64) QPSK Quaternary Phase-Shift Keying

(65) ROADM Reconfigurable Optical Add-Drop Multiplexer

(66) SNR Signal-to-Noise Ratio

(67) SPC Single Parity Check

(68) WDM Wavelength Division Multiplexing

LIST OF REFERENCE SIGNS

(69) 10 transmitter 12 outer encoder 14 inner encoder 16 interleaver 18 SPC encoder 20 interleaver #2 22 splitter 24 differential decoder 26 mapper 28 accumulator 28 equivalent accumulator 30 mapper 32 receiver 34 units for phase recovery 36 inner decoder 38 forming block 40 de-interleaver #1 42 outer decoder 44 channel metric computers 46 accumulator decoders 48 SPC-decoder 50 cycle slip counter 52 transition-to-bits soft demapper 54 adders 56 combiner block 58 de-interleaver #2 60 adder 62 interleaver #2 64 splitter 66 soft mappers