Power amplifying device

Abstract

An outphasing power amplifying device includes a switching signal generating circuit configured to generate a switching pulse signal for switching a class-D power amplifier from two types of sinusoidal wave generated based on amplitude and phase of a modulated wave to be transmitted. The switching signal generating circuit includes: a sin calculation unit and a cos calculation unit for converting phase information of the two types of sinusoidal wave into a quadrature format; a DA converter for converting the quadrature-format phase information; a first filter for removing an aliasing component from the analogue signal; an analogue quadrature modulator for generating a sinusoidal wave from the analogue signals by using a local signal; a second filter for allowing a radio frequency and a component in the vicinity thereof to pass therethrough; and a comparator for converting the sinusoidal wave into a switching pulse signal by comparison with a reference voltage.

Claims

1. An outphasing power amplifying device including a full-bridge class-D power amplifier, comprising: a switching signal generating circuit configured to generate a switching pulse signal for switching the class-D power amplifier from two types of sinusoidal wave generated based on an amplitude and a phase of a modulated wave to be transmitted, wherein the switching signal generating circuit includes: a sin calculation unit and a cos calculation unit which are configured to convert phase information of the two types of sinusoidal wave into a quadrature format; a DA converter configured to convert the quadrature-format phase information from each of the sin calculation unit and the cos calculation unit into an analogue signal; a first filter configured to remove an aliasing component from the analogue signal inputted from the DA converter; an analogue quadrature modulator configured to generate a sinusoidal wave from the analogue signals inputted from the first filter by using a local signal; a second filter configured to allow a predetermined radio frequency and a component in the vicinity thereof in the sinusoidal wave inputted from the analogue quadrature modulator to pass therethrough; and a comparator configured to convert the sinusoidal wave inputted from the second filter into a switching pulse signal by comparison with a reference voltage.

2. The power amplifying device of claim 1, wherein the quadrature-format phase information is updated at a predetermined interval based on the modulated wave to be transmitted.

3. An outphasing power amplifying device including a full-bridge class-D power amplifier, comprising: a switching signal generating circuit configured to generate a switching pulse signal for switching the class-D power amplifier from two types of sinusoidal wave generated based on an amplitude and a phase of a modulated wave to be transmitted, wherein the switching signal generating circuit includes: a DDS (Direct Digital Synthesizer) configured to update a phase accumulator at a predetermined frequency based on phase information of the two types of sinusoidal wave and output an amplitude value of a sinusoidal wave corresponding to the phase of the phase accumulator; a DA converter configured to convert the amplitude value of the sinusoidal wave inputted from the DDS into an analogue signal; a second filter configured to remove a clock component from the analogue signal inputted from the DA converter; and a comparator configured to convert the analogue signal inputted from the second filter into a switching pulse signal by comparison with a reference voltage.

4. The power amplifying device of claim 3, wherein a phase shift value added to an output of the phase accumulator is updated at a predetermined interval based on the modulated wave to be transmitted.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a block diagram showing an example of a configuration of a switching signal generating circuit of a power amplifying device according to a first embodiment of the present invention.

(2) FIG. 2 is a block diagram showing an example of a configuration of a switching signal generating circuit of a power amplifying device according to a second embodiment of the present invention.

(3) FIG. 3 is a block diagram showing a basic configuration of DDS.

(4) FIG. 4 shows an outphasing power amplifying device using a full-bridge class-D power amplifier.

(5) FIG. 5 shows an example in which switching signals are applied to four gate terminals G1 to G4.

(6) FIG. 6 is a block diagram showing a configuration of a switching signal generating circuit for generating the switching signals applied to the four gate terminals G1 to G4 shown in FIG. 4.

DETAILED DESCRIPTION OF THE EMBODIMENTS

First Embodiment

(7) Hereinafter, a power amplifying device according to a first embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a block diagram showing an example of a configuration of a switch signal generating circuit of a power amplifying device according to the first embodiment of the present invention. In the first embodiment, it is assumed that a switching signal generated by the switch signal generating circuit is connected to a full-bridge class-D power amplifier shown in FIG. 4. Like reference numerals will be used for like parts in FIGS. 1 and 6.

(8) As shown in FIG. 1, the switching signal generating circuit of the first embodiment includes a modulation unit 1, an interpolation unit 2, an amplitude calculation unit 3, an amplitude-phase conversion unit 4, a multiplier 5, a phase calculation unit 6, an adder 7, a cos calculation unit 8, a sin calculation unit 9, a DA converter 10, a filter 13, a local signal generator 11, an analogue quadrature modulator 12, a filter 13, a comparator 14 and an inversion unit 15. In the conventional switching signal generating circuit of the first embodiment, first, the modulation unit 1 generates a modulated signal to be transmitted and the interpolation unit 2 upsamples the modulated signal to a rate of a carrier wave frequency (or a frequency close thereto).

(9) After the upsampling in the interpolation unit 2, the amplitude calculation unit 3 and the phase calculation unit 6 converts each sample into a polar form (amplitude value, phase value).

(10) After the conversion into the polar form, the amplitude-phase conversion unit 4 converts the amplitude value into an angle value . The relative relationship of the control pulses for G1 and G3 is controlled by the angle value . Further, the relative relationship is controlled by advancing the control pulse for G1 by /2 and delaying the control pulse for G3 by /2. Therefore, the angle value is reduced to a half by the multiplier 5. At this time, the conversion is performed such that a desired amplitude can be reproduced after the filtering in the filter 102 shown in FIG. 4.

(11) The adder 7 generates a phase of a control pulse for G1 (+/2) and a phase of a control pulse for G3 (/2+) by using the angle value /2 obtained from the multiplier 5 and the phase value obtained from the phase calculation unit 6. The updating rate of the phase information is determined based on the result of the upsampling in the interpolation unit 2.

(12) The cos calculation unit 8 and the sin calculation unit 9 convert the respective phase information into a quadrature format. The DA converter 10 converts the result into analog signals. A known technique is used for processing in the cos calculation unit 8 and the sin calculation unit 9 and it is not an essential part of the present invention, so that the description thereof will be omitted.

(13) The respective phase information of the quadrature format are inputted into the analogue quadrature modulator 12 after the aliasing component is removed by the filter 13. As for a signal source of the local signal of the analogue quadrature modulator 12, the local signal generator 11 for outputting a desired radio frequency is also used.

(14) The output of the analogue quadrature modulator 12 is inputted to the comparator 14 through the filter 13 that allows the radio frequency and components in the vicinity thereof to pass. The filter 13 preferably has a group delay d/d of about zero in the radio frequency. For example, the filter 13 is designed as an LPF having Bessel's characteristics in which the phase change is smooth.

(15) In the comparator 14, the output of the filter 13 is compared with the reference voltage and the sinusoidal wave is converted into a switching pulse signal. When the DC component of the output of the filter 13 is completely removed, a duty ratio of the generated pulse signal can become 50% by setting the reference voltage to 0V.

(16) In FIG. 4, the polarities of the signals applied to the G1 and G2 terminals and the G3 and G4 terminals basically have the relationship in which one is ON and the other is OFF. Therefore, the inversion unit 15 performs an inversion process corresponding to G2=G1 and G4=G3.

(17) As described above, in accordance with the power amplifying device of the first embodiment of the present invention, in the switching signal generating process, it is possible to eliminate constraints on the operating clock of the digital circuit in generating a pulse and increase the radio frequency range to which the outphasing power amplification can be applied.

Second Embodiment

(18) Hereinafter, a power amplifying device according to a second embodiment of the present invention will be described with the accompanying drawings. FIG. 2 is a block diagram showing an example of a configuration of the switching signal generating circuit according to the second embodiment of the present invention. In the second embodiment, it is assumed that a switching signal generated in the switching signal generating circuit is connected to the full-bridge class-D power amplifier shown in FIG. 4. Like reference numerals will be used for like parts shown in FIGS. 1, 2 and 6.

(19) As shown in FIG. 2, the switching signal generating circuit of the second embodiment includes a modulation unit 1, an interpolation unit 2, an amplitude calculation unit 3, an amplitude-phase conversion unit 4, a multiplier 5, a phase calculation unit 6, an adder 7, a DDS (Direct Digital Synthesizer) 16, a DA converter 10, a filter 13, a comparator 14 and an inversion unit 15.

(20) In the switching signal generating circuit of the second embodiment, the processes up to the generation of two types of phase information in the adder 7 and the processes performed after the filter 13 are the same as those in the switching signal generating circuit of the first embodiment. Therefore, redundant description will be omitted.

(21) The respective phase information are inputted to the DDS 16. The DDS is a general term for a process of updating a phase accumulator at a set frequency (phase update amount) and outputting an amplitude value of a sinusoidal wave corresponding to the content (phase) of the phase accumulator, as shown in FIG. 3.

(22) In the second embodiment, there is used the DDS having a configuration in which the DAC shown in FIG. 3 is not included. In other words, the second embodiment has a configuration in which the processes up to the generation of the sinusoidal wave are performed by FPGA or the like.

(23) Two DDSs 16 are initialized at the same timing and perform processes in a state where phase accumulation values are made to be equal to each other. The phase value obtained by the adder 7 is used for offsetting the phase accumulation values in the respective DDSs 16.

(24) As described above, in accordance with the power amplifying device of the second embodiment of the present invention, in the switching signal generating process, it is possible to eliminate constraints on the operating clock of the digital circuit in generating a pulse and increase the radio frequency range to which the outphasing power amplification can be applied.

(25) The present invention is not limited to the above-described embodiment, and may be embodied with modifications of the constituent elements within the scope of the invention. Further, various inventions can be made by appropriately combining the constituent elements disclosed in the embodiment. For example, some of all the constituent elements disclosed in the embodiment may be omitted.

INDUSTRIAL APPLICABILITY

(26) The present invention is used in the industry for manufacturing a power amplifying device using a class-D power amplifier.

(27) TABLE-US-00001 Description of Reference Numerals 1: modulation unit 2: interpolation unit 3: amplitude calculation unit 4: amplitude-phase converting unit 5: multiplier 6: phase calculation unit 7: adder 8: cos calculation unit 9: sin calculation unit 10: DA converter 11: local signal generator 12: analogue quadrature modulator 13, 13, 13: filter 14: comparator 15: inversion unit 16: DDS 18: normalization unit 19: ON period calculation unit 20: quantization unit 21: counter 22: comparison unit 23: inversion unit 101: class-D power amplifier 102: filter